TWI452661B - 線路直接連接晶片之封裝結構 - Google Patents

線路直接連接晶片之封裝結構 Download PDF

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Publication number
TWI452661B
TWI452661B TW096103287A TW96103287A TWI452661B TW I452661 B TWI452661 B TW I452661B TW 096103287 A TW096103287 A TW 096103287A TW 96103287 A TW96103287 A TW 96103287A TW I452661 B TWI452661 B TW I452661B
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Taiwan
Prior art keywords
wafer
package structure
directly connected
dielectric layer
support plate
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TW096103287A
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English (en)
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TW200832655A (en
Inventor
Kan Jung Chia
Shih Ping Hsu
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Priority to TW096103287A priority Critical patent/TWI452661B/zh
Priority to US12/020,693 priority patent/US7582961B2/en
Publication of TW200832655A publication Critical patent/TW200832655A/zh
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Publication of TWI452661B publication Critical patent/TWI452661B/zh

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    • H01L23/3128Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
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Description

線路直接連接晶片之封裝結構
本發明係關於一種線路直接連接晶片之封裝結構,尤指一種適用於兼具陶瓷剛性與金屬韌性、並可改善非對稱增層所產生之板彎翹情況之線路直接連接晶片之封裝結構。
隨著電子產業的蓬勃發展,電子產品亦逐漸進入多功能、高性能的研發方向。為滿足半導體封裝件高積集度(Integration)以及微型化(M iniaturiZation)的封裝要求,提供多數主被動元件及線路連接之電路板,亦逐漸由單層板演變成多層板,以使在有限的空間下,藉由層間連接技術(Interlayer connection)擴大電路板上可利用的佈線面積而配合高電子密度之積體電路(Integrated Circuit)需求。
惟一般半導體裝置之製程,首先係由晶片載板製造業者生產適用於該半導體裝置之晶片載板,如基板或導線架。之後再將該些晶片載板交由半導體封裝業者進行置晶、灌膠以及植球等製程。最後,方可完成用戶端所需之電子功能之半導體裝置。其間涉及不同製造業者,因此於實際製造過程中不僅步驟繁瑣且界面整合不易。況且,若客戶端欲進行變更功能設計時,其牽涉變更與整合層面更是複雜,亦不符合需求變更彈性與經濟效益。
另習知之半導體封裝結構是將半導體晶片黏貼於基板頂面後進行打線接合(wire bonding)或是將晶片接合於基板表面之焊錫凸塊之覆晶接合(Flip chip)封裝方式,爾後再於基板之背面植以錫球以進行電性連接。如此,雖可達到高腳數的目的。但是在更高頻使用時或高速操作時,其將因電性連接路徑過長而產生電氣特性之效能無法提昇,而有所限制。另外,因傳統封裝需要多次的連接介面,相對地增加製程之複雜度。
為此,許多研究採用將晶片埋入封裝基板內,該嵌埋於封裝基板中之晶片係可直接與外部電子元件導通,用以縮短電性傳導路徑,並可減少訊號損失、訊號失真及提昇高速操作之能力。
在嵌埋有晶片之承載板結構下,為了防止在雷射鑽孔時會破壞承載板上之晶片,如圖1所示,於晶片主動面之電極墊表面上增加了一金屬層。該嵌埋有晶片之承載板結構包括:一載板11,且該載板11形成有開口;一晶片12,該晶片12容置於該開口中,且該晶片12之主動面具有複數個電極墊13;一形成於嵌埋有該晶片12之載板11上,並對應顯露出電極墊13之保護層14;複數個形成於電極墊13表面上之金屬層15;以及一形成於該載板11及該晶片12表面之線路增層結構16。其中,線路增層結構16形成於晶片12及載板11表面,並電性連接該載板11及晶片12之電極墊13。
而前述之該封裝結構僅有單向之線路增層結構,其不但可縮短電訊傳導路徑,亦可較習知的球閘陣列封裝基板之厚度大幅降低。但因單向線路增層的關係,線路增層面與非增層面兩者應力不均,故承載板的非對稱線路增層結構會使支承板產生板彎翹情況,導致生產不易,且其成品也會因為板彎翹過大而良率偏低、可靠度不佳。因此,為了降低線路單向增層封裝結構產品因線路單面增層而產生的板彎翹情況,並且提高生產良率,單一材料之載板已不能滿足使用要求。
鑒於上述習知技術之缺點,本發明之主要目的,係在提供一種線路直接連接晶片之封裝結構,其以一金屬層或具有氧化金屬層之支承板,藉以增加封裝結構之抗彎曲強度。
為達上述及其他目的,本發明係提供一種線路直接連接晶片之封裝結構,其包括:一支承板,其係形成有一貫穿該支承板之貫穿開口;一晶片,其係配置於該支承板所形成之貫穿開口內,且該晶片具有一主動面,而該主動面配置有複數個電極墊;至少一線路增層結構,其係配置於該支承板及該晶片的主動面側之表面,且該線路增層結構係包括有一介電層,該介電層係部分表面顯露於該支承板之貫穿開口,又該介電層內及其表面具有複數個線路層及導電結構,且該晶片之電極墊係經由該部分導電結構而與該等線路層電性導通;以及一黏著材料,係形成於該介電層顯露於貫穿開口之表面上,且該黏著材料係形成於該晶片之側表面,但不與支承板接合。
在本發明的封裝結構中,支承板係可為一金屬板。較佳地,此金屬板兩側係形成有一氧化金屬層。此外,在本發明的支承板所包含的金屬板其使用的材料較佳係可為鋁。而此金屬板兩側的氧化金屬層則可形成氧化鋁,並且此支承板在形成貫穿開口後其係可作為本發明封裝結構的框架。此外,在支承板內的晶片上電極墊較佳可為銅墊或鋁墊。
在本發明的封裝結構中,介電層以及黏著材料係可為相同或不相同的材料,此等材料係至少一選自由ABF(Ajinomoto Build-up Film)、雙順丁醯二酸醯亞胺/三氮阱(BT,Bismaleimide triazine)、聯二苯環丁二烯(benzocyclo -butene;BCB)、液晶聚合物(Liquid Crystal Polymer)、聚亞醯胺(Polyimide;PI)、聚乙烯醚(Poly(phenylene ether))、聚四氟乙烯(Poly(tetra-fluoroethylene))、芳香尼龍(Aramide)、環氧樹脂以及玻璃纖維等材質中任一種所組成。當介電層與黏著材料使用不同之材料時,介電層較佳則可使用ABF(Ajinomoto Build up Film),而黏著材料較佳則可使用環氧樹脂。當黏著材料與介電層使用的材料相同時,較佳可為ABF。更進一步的說明,此黏著材料可在將線路增層結構中之介電層配置於該支承板表面時同時填入開口中以固定晶片。
另外,在介電層內的線路層及導電結構的材料係分別可為銅、錫、鎳、鉻、鈀、鈦、錫/鉛或其合金。其中,線路層與導電結構較佳則可為銅。
本發明的封裝結構中,顯露於該貫穿開口之介電層之表面或部分表面係形成有一保護材料,且該保護材料係包覆該黏著材料之側表面。且該保護材料較佳係係可為環氧樹脂,以加強固定或保護晶片。
本發明的封裝結構中,顯露於該貫穿開口之介電層之表面或部分表面係形成有一防焊層,其不但可以保護介電層,同時也可以防止外界水氣進入之基板中造成爆板等可靠度問題。且該防焊層係為感光性樹脂材料。
在本發明的封裝結構中,該線路增層結構未接置有晶片側之介電層最外表面之線路層係具有複數個電性連接墊。
而在本發明的封裝結構中,復包括於線路增層結構之外部表面形成圖案化防焊層,且該圖案化防焊層係形成有複數個開孔,以顯露出線路層作為電性連接墊部分。同時,顯露出之電性連接墊表面則配置有焊料凸塊。
因此,在本發明之線路直接連接晶片之封裝結構,解決了因為無核心層封裝結構之非對稱線路增層造成應力分佈不均所產生翹曲的現象。此封裝結構中之支承板具有較強之剛性,故可抗衡非對稱線路增層所造成應力分布不均,進而降低彎翹之情形。而使用氧化方法使支承板(金屬材料)表面氧化,例如用陽極氧化方法,使支承板至少一表面形成有氧化金屬層(陶瓷)材料,而且支承板中的金屬與氧化金屬層之間的介面接合緊密。因此,本發明之線路直接連接晶片之封裝結構可同時兼具金屬的韌性、與陶瓷的剛性。
以下係藉由特定的具體實施例說明本發明之實施方式,熟習此技藝之人士可由本說明書所揭示之內容輕易地了解本發明之其他優點與功效。本發明亦可藉由其他不同的具體實施例加以施行或應用,本說明書中的各項細節亦可基於不同觀點與應用,在不悖離本發明之精神下進行各種修飾與變更。
本發明之實施例中該等圖式均為簡化之示意圖。惟該等圖式僅顯示與本發明有關之元件,其所顯示之元件非為實際實施時之態樣,其實際實施時之元件數目、形狀等比例為一選擇性之設計,且其元件佈局型態可能更複雜。
請參考圖2及圖3,係為本發明的封裝結構剖視圖。在圖2中的封裝結構中,其包括:一支承板2、一晶片3以及一線路增層結構5a(如圖2所示),5b(如圖3所示)。此支承板2係形成有一貫穿此支承板2之貫穿開口201。在此,此支承板2係包括有一金屬板21,此金屬板的兩側係具有氧化金屬層22。而本實施例中之金屬板21可以使用的材料係為鋁金屬。此外,本發明的支承板2在形成貫穿開口201後係可作為本發明封裝結構的一框架。而晶片3係配置於支承板2所形成之貫穿開口201內,且此晶片3的側表面由一黏著材料4所包覆,此黏著材料4並不與支承板2接合。同時,此晶片3係具有一主動面32,而此主動面32配置有複數個電極墊31。在本發明包覆於晶片3側表面的黏著材料4係可使用環氧樹脂,而在晶片3主動面32的電極墊31中,其材質係可為銅。在此,該貫穿開口201尚未形成大孔徑之前,此貫穿開口201的孔徑係較小(略比晶片之寬度稍大),因此,黏著材料4則會填滿此較小孔徑的貫穿開口201內,接著,後續的線路增層結構5a配置於此支承板2的表面及晶片3的主動面後,則將貫穿開口201的孔徑加大,使得黏著材料4不與支承板2接合。在此,線路增層結構5a則包括有一介電層51,其係至少一選自由ABF(Ajinomoto Build-up Film)、雙順丁醯二酸醯亞胺/三氮阱(BT,Bismaleimide triazine)、聯二苯環丁二烯(benzocyclo-butene;BCB)、液晶聚合物(Liquid Crystal Polymer)、聚亞醯胺(Polyimide;PI)、聚乙烯醚(Poly(phenylene ether))、聚四氟乙烯(Poly(tetra-fluoro-ethylene))、芳香尼龍(Aramide)、環氧樹脂以及玻璃纖維等材質中任一種所組成。在本實施例中的介電層51則使用ABF(Ajinomoto Build up Film)。此介電層51係配置於支承板2及晶片3的主動面32之一表面,此介電層51係部分表面顯露於貫穿開口201且部分表面與黏著材料4接合以固定該晶片3。在介電層51表面具有複數個線路層52及介電層51的開孔531內填滿有導電材料之導電結構53a(如圖2所示)或未填滿有導電材料之導電結構53b(如圖3所示),且晶片3上之電極墊31係經由填滿有導電材料之導電結構53a或未填滿有導電材料之導電結構53b而與線路層52向外與外界電子元件電性導通。
請參考圖4及圖5所示,其中,圖4係為本發明封裝結構之剖視圖。圖5係為本發明封裝結構之上視圖。如圖4所示,其係可使用如圖2或圖3所示之結構,以圖2為例,在此封裝結構中,係在顯露於貫穿開口201之介電層51表面全面塗覆一層防焊層6,其係可使用感光性樹脂材料作為防焊層6。此防焊層6係可用以保護介電層51,不受外界環境的污染。因此,可參考圖4及圖5,係為本發明在貫穿開口201內全面形成防焊層6的一封裝結構。
請參考圖6a、6b及圖7a、7b,其中,圖6a及6b係為本發明封裝結構之剖視圖。圖7a及7b係為本發明封裝結構之上視圖。如圖6a所示,其係可使用如圖2所示之結構,將在顯露於貫穿開口201內的介電層51表面形成一保護材料7,其中,該保護材料7與支承板2接合,而此保護材料7可為環氧樹脂。同時,此保護材料7除了可保護介電層51以外,亦可經由黏著材料4而加強固定及保護晶片3。因此,在此貫穿開口201內則包含有如圖7a所示之保護材料7的一封裝結構上視圖。再如圖6b所示,其係可使用如圖4所示之結構,將於貫穿開口201內的防焊層6以曝光以及顯影之方式形成另一開口210a,並且於此該另一開口210a內形成一保護材料7,其中,該保護材料7並未與支承板2接合,而此保護材料7亦可為環氧樹脂。同時,此保護材料7經由黏著材料4而可加強固定及保護晶片3。因此,在此貫穿開口201內則包含有如圖7b所示之保護材料7以及防焊層6的一封裝結構上視圖。
經由上述的結構中,如圖8所示,可以在介電層51的表面利用增層技術形成線路增層結構8a,此線路增層結構8a可視需要增加層數。此線路增層結構8a亦於一介電層81內形成有線路層82以及於介電層81的開孔831內填滿有導電材料之導電結構83a,而線路增層結構8a未接置有晶片側之介電層81最外表面之線路層係形成有一電性連接墊84,同時於此線路增層結構8a表面形成一圖案化防焊層85,此圖案化防焊層85係顯露出線路增層結構8a表面之電性連接墊84。而此防焊層85的材料可為感光性樹脂材料。最後,再於對應於電性連接墊84之處以電鍍或印刷的方式形成焊料凸塊86,而此焊料凸塊86的材料則可為銅、錫、鉛、銀、鎳、金、鉑及其合金所形成之群組之一者。
又可得到如圖9所示,其與圖8不同的是,於介電層81的開孔831內形成有未填滿導電材料之導電結構83b。而可得到一與圖8不同之線路增層結構8b,進而得到此一封裝結構。
再請參考圖10,本實施例之線路直接連接晶片之封裝結構係與圖2及圖3大致上相同,除了晶片3固定於支承板2的方法不同之外,其餘均與圖2及圖3相同。
本實施例將晶片3固定於支承板2的結構係如圖10所示,其係在將晶片3固定至支承板2前,先將形成有貫穿開口201之支承板2一側貼覆一離形膜(圖未示),爾後將晶片3置放於貫穿開口201中,以離形膜暫時固定晶片2,再於製作線路之前,壓合介電層51於晶片主動面側之支承板2表面,如此介電層51(即如ABF)同時填充於貫穿開口201中並完整包覆於晶片3的側表面,其中在將介電層51包覆在晶片3側表面之前,此貫穿開口201的孔徑較小(略比晶片之寬度稍大),當將介電層51填滿於貫穿開口201後,再使支承板2中的貫穿開口201的孔徑加大,而形成本發明的貫穿開口201。在本結構中係以此介電層51作為一黏著材料。其餘結構則與圖2及圖3相同。最後,得到本發明的一線路直接連接晶片之封裝結構。
上述實施例僅係為了方便說明而舉例而已,本發明所主張之權利範圍自應以申請專利範圍所述為準,而非僅限於上述實施例。
11...載板
12,3...晶片
13,31...電極墊
14...保護層
15...金屬層
16...線路增層結構
2...支承板
21...金屬板
22...氧化金屬層
201...貫穿開口
32...主動面
4...黏著材料
51,81...介電層
86...焊料凸塊
52,82...線路層
53a,53b,83a,83b...導電結構
6,85...防焊層
7...保護材料
84...電性連接墊
5a,5b,8a,8b...線路增層結構
210a...開口
531,831...開孔
圖1係習知之嵌埋有晶片之載板之剖面示意圖。
圖2及圖3係本發明一較佳實施例之線路直接連接晶片之封裝結構剖視圖。
圖4係本發明另一較佳實施例之線路直接連接晶片之封裝結構剖視圖。
圖5係為圖4之線路直接連接晶片之封裝結構上視圖。
圖6a及6b係分別本發明之線路直接連接晶片之封裝結構剖視圖。
圖7a及7b係分別為圖6a及6b之線路直接連接晶片之封裝結構上視圖。
圖8及圖9係分別為一較佳實施例之與焊料凸塊電性連接之線路直接連接晶片之封裝結構剖視圖。
圖10係本發明再一較佳實施例之於支承板內固定晶片之剖視圖。
20...支承板
21...金屬板
22...氧化金屬層
3...晶片
31...電極墊
32...主動面
4...黏著材料
5a...線路增層結構
51...介電層
52...線路層
53a...導電結構
201...貫穿開口
531...開孔

Claims (16)

  1. 一種線路直接連接晶片之封裝結構,包括:一支承板,其係形成有一貫穿該支承板之貫穿開口;一晶片,其係配置於該支承板所形成之貫穿開口內,且該晶片具有一主動面,而該主動面配置有複數個電極墊;至少一線路增層結構,其係配置於該支承板及該晶片的主動面側之表面,且該線路增層結構係包括有一介電層,該介電層係部分表面顯露於該支承板之貫穿開口,又該介電層內及其表面具有複數個線路層及導電結構,且該晶片之電極墊係經由該部分導電結構而與該等線路層電性導通;以及一黏著材料,係形成於該介電層顯露於貫穿開口之表面上,且該黏著材料係形成於該晶片之側表面,但不與支承板接合。
  2. 如申請專利範圍第1項所述之線路直接連接晶片之封裝結構,其中,該支承板係可為一金屬板。
  3. 如申請專利範圍第2項所述之線路直接連接晶片之封裝結構,其中,該金屬板兩側係形成有一氧化金屬層。
  4. 如申請專利範圍第2項所述之線路直接連接晶片之封裝結構,其中,該金屬板的材料係為鋁。
  5. 如申請專利範圍第1項所述之線路直接連接晶片之封裝結構,其中,該電極墊係為銅墊或鋁墊。
  6. 如申請專利範圍第1項所述之線路直接連接晶片之封裝結構,其中,該介電層係至少一選自由ABF(Ajinomoto Build-up Film)、雙順丁醯二酸醯亞胺/三氮阱(BT,Bismaleimide triazine)、聯二苯環丁二烯(benzocyclo-butene;BCB)、液晶聚合物(Liquid Crystal Polymer)、聚亞醯胺(Polyimide;PI)、聚乙烯醚(Poly(phenylene ether))、聚四氟乙烯(Poly(tetra-fluoroethylene))、芳香尼龍(Aramide)、環氧樹脂以及玻璃纖維等材質中任一種所組成。
  7. 如申請專利範圍第1項所述之線路直接連接晶片之封裝結構,其中,該等線路層及該等導電結構的材料係分別為銅、錫、鎳、鉻、鈀、鈦、錫/鉛或其合金。
  8. 如申請專利範圍第1項所述之線路直接連接晶片之封裝結構,其中,該黏著材料係為環氧樹脂。
  9. 如申請專利範圍第1項所述之線路直接連接晶片之封裝結構,其中,該黏著材料係與該線路增層結構中的介電層材料相同。
  10. 如申請專利範圍第1項所述之線路直接連接晶片之封裝結構,其中,顯露於該貫穿開口之介電層表面係形成有一防焊層。
  11. 如申請專利範圍第1項所述之線路直接連接晶片之封裝結構,其中,顯露於該貫穿開口之介電層表面上,且與該黏著材料之側表面處係包覆有一保護材料。
  12. 如申請專利範圍第11項所述之線路直接連接晶片之封裝結構,其中,該保護材料不與支承板接合,且未被保護材料所覆蓋之介電層表面係形成有一防焊層。
  13. 如申請專利範圍第11或12項所述之線路直接連接晶片之封裝結構,其中,該保護材料係為環氧樹脂,以加強固定或保護晶片。
  14. 如申請專利範圍第10或12項所述之線路直接連接晶片之封裝結構,其中,該防焊層係為感光性樹酯材料。
  15. 如申請專利範圍第1項所述之線路直接連接晶片之封裝結構,其中,該線路增層結構未接置有晶片側之介電層最外表面之線路層係包括有複數個電性連接墊。
  16. 如申請專利範圍第15項所述之線路直接連接晶片之封裝結構,復包括複數個焊料凸塊,該等焊料凸塊係配置於該電性連接墊表面。
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