TWI445077B - 電漿蝕刻過渡金屬氧化物之方法 - Google Patents

電漿蝕刻過渡金屬氧化物之方法 Download PDF

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Publication number
TWI445077B
TWI445077B TW097107254A TW97107254A TWI445077B TW I445077 B TWI445077 B TW I445077B TW 097107254 A TW097107254 A TW 097107254A TW 97107254 A TW97107254 A TW 97107254A TW I445077 B TWI445077 B TW I445077B
Authority
TW
Taiwan
Prior art keywords
etching
plasma
transition metal
carbon monoxide
oxide
Prior art date
Application number
TW097107254A
Other languages
English (en)
Chinese (zh)
Other versions
TW200842976A (en
Inventor
Usha Raghuram
Michael W Konevecki
Original Assignee
Sandisk 3D Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sandisk 3D Llc filed Critical Sandisk 3D Llc
Publication of TW200842976A publication Critical patent/TW200842976A/zh
Application granted granted Critical
Publication of TWI445077B publication Critical patent/TWI445077B/zh

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Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23FNON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00Etching metallic material by chemical means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01BCABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B13/00Apparatus or processes specially adapted for manufacturing conductors or cables
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • H01L21/31122Etching inorganic layers by chemical means by dry-etching of layers not containing Si, e.g. PZT, Al2O3
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011Manufacture or treatment of multistable switching devices
    • H10N70/061Shaping switching materials
    • H10N70/063Shaping switching materials by etching of pre-deposited switching material layers, e.g. lithography
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20Multistable switching devices, e.g. memristors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/821Device geometry
    • H10N70/826Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/881Switching materials
    • H10N70/883Oxides or nitrides
    • H10N70/8833Binary metal oxides, e.g. TaOx
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B63/00Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/20Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having two electrodes, e.g. diodes

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Computer Hardware Design (AREA)
  • General Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • Inorganic Chemistry (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Semiconductor Memories (AREA)
TW097107254A 2007-03-01 2008-02-29 電漿蝕刻過渡金屬氧化物之方法 TWI445077B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/681,022 US7955515B2 (en) 2005-07-11 2007-03-01 Method of plasma etching transition metal oxides

Publications (2)

Publication Number Publication Date
TW200842976A TW200842976A (en) 2008-11-01
TWI445077B true TWI445077B (zh) 2014-07-11

Family

ID=39760705

Family Applications (1)

Application Number Title Priority Date Filing Date
TW097107254A TWI445077B (zh) 2007-03-01 2008-02-29 電漿蝕刻過渡金屬氧化物之方法

Country Status (7)

Country Link
US (1) US7955515B2 (enExample)
EP (1) EP2115187A4 (enExample)
JP (1) JP5042319B2 (enExample)
KR (1) KR20090125244A (enExample)
CN (1) CN101657567A (enExample)
TW (1) TWI445077B (enExample)
WO (1) WO2008106222A1 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7955515B2 (en) * 2005-07-11 2011-06-07 Sandisk 3D Llc Method of plasma etching transition metal oxides
US8916067B2 (en) 2011-10-19 2014-12-23 The Aerospace Corporation Carbonaceous nano-scaled materials having highly functionalized surface
GB201416483D0 (en) * 2014-09-18 2014-11-05 Rolls Royce Plc A method of machinging a gas turbine engine component
US20190385828A1 (en) * 2018-06-19 2019-12-19 Lam Research Corporation Temperature control systems and methods for removing metal oxide films

Family Cites Families (24)

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US4659426A (en) * 1985-05-03 1987-04-21 Texas Instruments Incorporated Plasma etching of refractory metals and their silicides
JPS63244848A (ja) 1987-03-31 1988-10-12 Toshiba Corp ドライエツチング方法
JP2871632B2 (ja) * 1996-11-15 1999-03-17 日本電気株式会社 ドライエッチング方法及びガス処理装置
US5915167A (en) * 1997-04-04 1999-06-22 Elm Technology Corporation Three dimensional structure memory
KR100397860B1 (ko) 1997-09-22 2003-12-18 카가쿠기쥬쯔죠 킨조쿠자이료 기쥬쯔켄큐죠 반응성이온에칭법및그장치
JP2000114246A (ja) * 1998-08-07 2000-04-21 Ulvac Seimaku Kk ドライエッチング方法および装置、フォトマスクおよびその作製方法、ならびに半導体回路およびその製作方法
US6555455B1 (en) * 1998-09-03 2003-04-29 Micron Technology, Inc. Methods of passivating an oxide surface subjected to a conductive material anneal
JP4257808B2 (ja) 1999-05-11 2009-04-22 独立行政法人科学技術振興機構 磁性材料のエッチング方法及びプラズマエッチング装置
JP3433721B2 (ja) * 2000-03-28 2003-08-04 ティーディーケイ株式会社 ドライエッチング方法及び微細加工方法
JP4852213B2 (ja) * 2000-05-12 2012-01-11 東京エレクトロン株式会社 高選択性のsacのエッチングの方法
US6225202B1 (en) * 2000-06-21 2001-05-01 Chartered Semiconductor Manufacturing, Ltd. Selective etching of unreacted nickel after salicidation
US6525953B1 (en) * 2001-08-13 2003-02-25 Matrix Semiconductor, Inc. Vertically-stacked, field-programmable, nonvolatile memory and method of fabrication
US7229563B2 (en) * 2002-01-29 2007-06-12 Tokyo Electron Limited Plasma etching of Ni-containing materials
US6806095B2 (en) * 2002-03-06 2004-10-19 Padmapani C. Nallan Method of plasma etching of high-K dielectric materials with high selectivity to underlying layers
JP4377698B2 (ja) 2002-04-08 2009-12-02 東京エレクトロン株式会社 プラズマエッチング方法及びプラズマエッチング装置
US7094704B2 (en) * 2002-05-09 2006-08-22 Applied Materials, Inc. Method of plasma etching of high-K dielectric materials
US20040014327A1 (en) * 2002-07-18 2004-01-22 Bing Ji Method for etching high dielectric constant materials and for cleaning deposition chambers for high dielectric constant materials
US6946719B2 (en) * 2003-12-03 2005-09-20 Matrix Semiconductor, Inc Semiconductor device including junction diode contacting contact-antifuse unit comprising silicide
KR100773537B1 (ko) * 2003-06-03 2007-11-07 삼성전자주식회사 한 개의 스위칭 소자와 한 개의 저항체를 포함하는비휘발성 메모리 장치 및 그 제조 방법
US7338907B2 (en) * 2004-10-04 2008-03-04 Sharp Laboratories Of America, Inc. Selective etching processes of silicon nitride and indium oxide thin films for FeRAM device applications
US7656696B2 (en) * 2005-02-14 2010-02-02 Samsung Electronics Co., Ltd. Resistive memory device having resistor part for controlling switching window
US20060250836A1 (en) * 2005-05-09 2006-11-09 Matrix Semiconductor, Inc. Rewriteable memory cell comprising a diode and a resistance-switching material
US7955515B2 (en) * 2005-07-11 2011-06-07 Sandisk 3D Llc Method of plasma etching transition metal oxides
US20070010100A1 (en) * 2005-07-11 2007-01-11 Matrix Semiconductor, Inc. Method of plasma etching transition metals and their compounds

Also Published As

Publication number Publication date
TW200842976A (en) 2008-11-01
CN101657567A (zh) 2010-02-24
US20070295690A1 (en) 2007-12-27
WO2008106222A1 (en) 2008-09-04
JP2010521062A (ja) 2010-06-17
US7955515B2 (en) 2011-06-07
EP2115187A1 (en) 2009-11-11
EP2115187A4 (en) 2011-12-28
KR20090125244A (ko) 2009-12-04
JP5042319B2 (ja) 2012-10-03

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