TWI400615B - 記憶體系統 - Google Patents

記憶體系統 Download PDF

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Publication number
TWI400615B
TWI400615B TW098105693A TW98105693A TWI400615B TW I400615 B TWI400615 B TW I400615B TW 098105693 A TW098105693 A TW 098105693A TW 98105693 A TW98105693 A TW 98105693A TW I400615 B TWI400615 B TW I400615B
Authority
TW
Taiwan
Prior art keywords
logical
data
management unit
storage area
block
Prior art date
Application number
TW098105693A
Other languages
English (en)
Chinese (zh)
Other versions
TW200947213A (en
Inventor
Junji Yano
Hidenori Matsuzaki
Kosuke Hatsuda
Original Assignee
Toshiba Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Kk filed Critical Toshiba Kk
Publication of TW200947213A publication Critical patent/TW200947213A/zh
Application granted granted Critical
Publication of TWI400615B publication Critical patent/TWI400615B/zh

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0804—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with main memory updating
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0893—Caches characterised by their organisation or structure
    • G06F12/0897—Caches characterised by their organisation or structure with two or more cache hierarchy levels
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1016—Performance improvement
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7203—Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7205—Cleaning, compaction, garbage collection, erase control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Read Only Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Memory System (AREA)
TW098105693A 2008-03-01 2009-02-23 記憶體系統 TWI400615B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008051473A JP4498426B2 (ja) 2008-03-01 2008-03-01 メモリシステム

Publications (2)

Publication Number Publication Date
TW200947213A TW200947213A (en) 2009-11-16
TWI400615B true TWI400615B (zh) 2013-07-01

Family

ID=41055699

Family Applications (1)

Application Number Title Priority Date Filing Date
TW098105693A TWI400615B (zh) 2008-03-01 2009-02-23 記憶體系統

Country Status (7)

Country Link
US (2) US7904640B2 (https=)
EP (1) EP2250567A4 (https=)
JP (1) JP4498426B2 (https=)
KR (1) KR101018766B1 (https=)
CN (1) CN101647007A (https=)
TW (1) TWI400615B (https=)
WO (1) WO2009110126A1 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI792322B (zh) * 2020-12-15 2023-02-11 日商鎧俠股份有限公司 記憶體系統及控制方法

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CN101632068B (zh) 2007-12-28 2015-01-14 株式会社东芝 半导体存储装置
JP4461170B2 (ja) 2007-12-28 2010-05-12 株式会社東芝 メモリシステム
JP4510107B2 (ja) * 2008-03-12 2010-07-21 株式会社東芝 メモリシステム
JP4691122B2 (ja) * 2008-03-01 2011-06-01 株式会社東芝 メモリシステム
JP4745356B2 (ja) * 2008-03-01 2011-08-10 株式会社東芝 メモリシステム
JP4653817B2 (ja) * 2008-03-01 2011-03-16 株式会社東芝 メモリシステム
KR101067457B1 (ko) 2008-03-01 2011-09-27 가부시끼가이샤 도시바 메모리 시스템
JP4762261B2 (ja) * 2008-03-12 2011-08-31 株式会社東芝 メモリシステム
JP4439569B2 (ja) * 2008-04-24 2010-03-24 株式会社東芝 メモリシステム
JP5221332B2 (ja) * 2008-12-27 2013-06-26 株式会社東芝 メモリシステム
JP5317690B2 (ja) 2008-12-27 2013-10-16 株式会社東芝 メモリシステム
JP5323199B2 (ja) 2009-02-12 2013-10-23 株式会社東芝 メモリシステム及びメモリシステムの制御方法
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KR102244618B1 (ko) * 2014-02-21 2021-04-26 삼성전자 주식회사 플래시 메모리 시스템 및 플래시 메모리 시스템의 제어 방법
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TWI792322B (zh) * 2020-12-15 2023-02-11 日商鎧俠股份有限公司 記憶體系統及控制方法

Also Published As

Publication number Publication date
US20100274950A1 (en) 2010-10-28
EP2250567A4 (en) 2011-09-28
WO2009110126A1 (en) 2009-09-11
TW200947213A (en) 2009-11-16
US7904640B2 (en) 2011-03-08
JP4498426B2 (ja) 2010-07-07
EP2250567A1 (en) 2010-11-17
KR101018766B1 (ko) 2011-03-07
CN101647007A (zh) 2010-02-10
US20110099349A1 (en) 2011-04-28
KR20090117935A (ko) 2009-11-16
US8176237B2 (en) 2012-05-08
JP2009211227A (ja) 2009-09-17

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