JP4498426B2 - メモリシステム - Google Patents

メモリシステム Download PDF

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Publication number
JP4498426B2
JP4498426B2 JP2008051473A JP2008051473A JP4498426B2 JP 4498426 B2 JP4498426 B2 JP 4498426B2 JP 2008051473 A JP2008051473 A JP 2008051473A JP 2008051473 A JP2008051473 A JP 2008051473A JP 4498426 B2 JP4498426 B2 JP 4498426B2
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JP
Japan
Prior art keywords
data
logical
storage unit
logical block
track
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2008051473A
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English (en)
Japanese (ja)
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JP2009211227A5 (https=
JP2009211227A (ja
Inventor
純二 矢野
秀則 松崎
幸輔 初田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
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Toshiba Corp
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Filing date
Publication date
Priority to JP2008051473A priority Critical patent/JP4498426B2/ja
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to KR1020097018121A priority patent/KR101018766B1/ko
Priority to US12/529,270 priority patent/US7904640B2/en
Priority to CN200880006648A priority patent/CN101647007A/zh
Priority to PCT/JP2008/067600 priority patent/WO2009110126A1/en
Priority to EP08872744A priority patent/EP2250567A4/en
Priority to TW098105693A priority patent/TWI400615B/zh
Publication of JP2009211227A publication Critical patent/JP2009211227A/ja
Publication of JP2009211227A5 publication Critical patent/JP2009211227A5/ja
Application granted granted Critical
Publication of JP4498426B2 publication Critical patent/JP4498426B2/ja
Priority to US12/984,337 priority patent/US8176237B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0804—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with main memory updating
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0893—Caches characterised by their organisation or structure
    • G06F12/0897—Caches characterised by their organisation or structure with two or more cache hierarchy levels
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1016—Performance improvement
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7203—Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7205—Cleaning, compaction, garbage collection, erase control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Read Only Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Memory System (AREA)
JP2008051473A 2008-03-01 2008-03-01 メモリシステム Expired - Fee Related JP4498426B2 (ja)

Priority Applications (8)

Application Number Priority Date Filing Date Title
JP2008051473A JP4498426B2 (ja) 2008-03-01 2008-03-01 メモリシステム
US12/529,270 US7904640B2 (en) 2008-03-01 2008-09-22 Memory system with write coalescing
CN200880006648A CN101647007A (zh) 2008-03-01 2008-09-22 存储器系统
PCT/JP2008/067600 WO2009110126A1 (en) 2008-03-01 2008-09-22 Memory system
KR1020097018121A KR101018766B1 (ko) 2008-03-01 2008-09-22 메모리 시스템
EP08872744A EP2250567A4 (en) 2008-03-01 2008-09-22 MEMORY SYSTEM
TW098105693A TWI400615B (zh) 2008-03-01 2009-02-23 記憶體系統
US12/984,337 US8176237B2 (en) 2008-03-01 2011-01-04 Solid state drive with input buffer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008051473A JP4498426B2 (ja) 2008-03-01 2008-03-01 メモリシステム

Publications (3)

Publication Number Publication Date
JP2009211227A JP2009211227A (ja) 2009-09-17
JP2009211227A5 JP2009211227A5 (https=) 2010-04-02
JP4498426B2 true JP4498426B2 (ja) 2010-07-07

Family

ID=41055699

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008051473A Expired - Fee Related JP4498426B2 (ja) 2008-03-01 2008-03-01 メモリシステム

Country Status (7)

Country Link
US (2) US7904640B2 (https=)
EP (1) EP2250567A4 (https=)
JP (1) JP4498426B2 (https=)
KR (1) KR101018766B1 (https=)
CN (1) CN101647007A (https=)
TW (1) TWI400615B (https=)
WO (1) WO2009110126A1 (https=)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009211220A (ja) * 2008-03-01 2009-09-17 Toshiba Corp メモリシステム
TWI567554B (zh) * 2014-11-06 2017-01-21 慧榮科技股份有限公司 緩存及讀取即將寫入儲存單元之資料的方法以及使用該方法的裝置

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KR100842680B1 (ko) * 2007-01-08 2008-07-01 삼성전자주식회사 플래시 메모리 장치의 오류 정정 컨트롤러 및 그것을포함하는 메모리 시스템
CN101632068B (zh) 2007-12-28 2015-01-14 株式会社东芝 半导体存储装置
JP4461170B2 (ja) 2007-12-28 2010-05-12 株式会社東芝 メモリシステム
JP4510107B2 (ja) * 2008-03-12 2010-07-21 株式会社東芝 メモリシステム
JP4691122B2 (ja) * 2008-03-01 2011-06-01 株式会社東芝 メモリシステム
JP4745356B2 (ja) * 2008-03-01 2011-08-10 株式会社東芝 メモリシステム
KR101067457B1 (ko) 2008-03-01 2011-09-27 가부시끼가이샤 도시바 메모리 시스템
JP4762261B2 (ja) * 2008-03-12 2011-08-31 株式会社東芝 メモリシステム
JP4439569B2 (ja) * 2008-04-24 2010-03-24 株式会社東芝 メモリシステム
JP5221332B2 (ja) * 2008-12-27 2013-06-26 株式会社東芝 メモリシステム
JP5317690B2 (ja) 2008-12-27 2013-10-16 株式会社東芝 メモリシステム
JP5323199B2 (ja) 2009-02-12 2013-10-23 株式会社東芝 メモリシステム及びメモリシステムの制御方法
TWI408689B (zh) * 2009-04-14 2013-09-11 Jmicron Technology Corp 存取儲存裝置的方法及相關控制電路
TW201102812A (en) * 2009-07-15 2011-01-16 A Data Technology Co Ltd A storage device and data processing method thereof
JP5221593B2 (ja) * 2010-04-27 2013-06-26 株式会社東芝 メモリシステム
CN102375698B (zh) * 2010-08-23 2014-06-25 群联电子股份有限公司 数据串分派与传送方法、存储器控制器与存储器储存装置
JP5535128B2 (ja) 2010-12-16 2014-07-02 株式会社東芝 メモリシステム
JP2012141946A (ja) * 2010-12-16 2012-07-26 Toshiba Corp 半導体記憶装置
KR101734199B1 (ko) * 2010-12-29 2017-05-24 삼성전자주식회사 멀티-비트 메모리 장치를 포함한 데이터 저장 시스템 및 그것의 동작 방법
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KR101792867B1 (ko) 2011-06-16 2017-11-02 삼성전자주식회사 멀티-레벨 메모리 장치를 포함한 데이터 저장 시스템 및 그것의 동작 방법
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JP5713926B2 (ja) * 2012-01-13 2015-05-07 株式会社東芝 磁気ディスク装置及び同磁気ディスク装置におけるデータバッファリング方法
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JP5813589B2 (ja) * 2012-07-13 2015-11-17 株式会社東芝 メモリシステムおよびその制御方法
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JP6028670B2 (ja) * 2013-04-22 2016-11-16 株式会社デンソー データ記憶装置
CN103544995B (zh) * 2013-08-27 2016-09-21 华为技术有限公司 一种坏道修复方法及装置
KR102244618B1 (ko) * 2014-02-21 2021-04-26 삼성전자 주식회사 플래시 메모리 시스템 및 플래시 메모리 시스템의 제어 방법
CN105243071A (zh) * 2014-07-12 2016-01-13 航天恒星科技有限公司 一种适用于无文件系统的可检索文件存取方法
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JP2018041204A (ja) 2016-09-06 2018-03-15 東芝メモリ株式会社 メモリ装置及び情報処理システム
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JP2022094705A (ja) * 2020-12-15 2022-06-27 キオクシア株式会社 メモリシステムおよび制御方法
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TWI567554B (zh) * 2014-11-06 2017-01-21 慧榮科技股份有限公司 緩存及讀取即將寫入儲存單元之資料的方法以及使用該方法的裝置
US9779022B2 (en) 2014-11-06 2017-10-03 Silicon Motion, Inc. Methods for caching and reading data to be programmed into a storage unit and apparatuses using the same

Also Published As

Publication number Publication date
US20100274950A1 (en) 2010-10-28
EP2250567A4 (en) 2011-09-28
TWI400615B (zh) 2013-07-01
WO2009110126A1 (en) 2009-09-11
TW200947213A (en) 2009-11-16
US7904640B2 (en) 2011-03-08
EP2250567A1 (en) 2010-11-17
KR101018766B1 (ko) 2011-03-07
CN101647007A (zh) 2010-02-10
US20110099349A1 (en) 2011-04-28
KR20090117935A (ko) 2009-11-16
US8176237B2 (en) 2012-05-08
JP2009211227A (ja) 2009-09-17

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