KR101018766B1 - 메모리 시스템 - Google Patents

메모리 시스템 Download PDF

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Publication number
KR101018766B1
KR101018766B1 KR1020097018121A KR20097018121A KR101018766B1 KR 101018766 B1 KR101018766 B1 KR 101018766B1 KR 1020097018121 A KR1020097018121 A KR 1020097018121A KR 20097018121 A KR20097018121 A KR 20097018121A KR 101018766 B1 KR101018766 B1 KR 101018766B1
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South Korea
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data
logical
storage area
management unit
track
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KR1020097018121A
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English (en)
Korean (ko)
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KR20090117935A (ko
Inventor
준지 야노
히데노리 마츠자키
고스케 하츠다
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가부시끼가이샤 도시바
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0804Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with main memory updating
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0893Caches characterised by their organisation or structure
    • G06F12/0897Caches characterised by their organisation or structure with two or more cache hierarchy levels
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10Program control for peripheral devices
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1016Performance improvement
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7203Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7205Cleaning, compaction, garbage collection, erase control

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Read Only Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Memory System (AREA)
KR1020097018121A 2008-03-01 2008-09-22 메모리 시스템 Expired - Fee Related KR101018766B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2008051473A JP4498426B2 (ja) 2008-03-01 2008-03-01 メモリシステム
JPJP-P-2008-051473 2008-03-01

Publications (2)

Publication Number Publication Date
KR20090117935A KR20090117935A (ko) 2009-11-16
KR101018766B1 true KR101018766B1 (ko) 2011-03-07

Family

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KR1020097018121A Expired - Fee Related KR101018766B1 (ko) 2008-03-01 2008-09-22 메모리 시스템

Country Status (7)

Country Link
US (2) US7904640B2 (https=)
EP (1) EP2250567A4 (https=)
JP (1) JP4498426B2 (https=)
KR (1) KR101018766B1 (https=)
CN (1) CN101647007A (https=)
TW (1) TWI400615B (https=)
WO (1) WO2009110126A1 (https=)

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CN101632068B (zh) 2007-12-28 2015-01-14 株式会社东芝 半导体存储装置
JP4461170B2 (ja) 2007-12-28 2010-05-12 株式会社東芝 メモリシステム
JP4510107B2 (ja) * 2008-03-12 2010-07-21 株式会社東芝 メモリシステム
JP4691122B2 (ja) * 2008-03-01 2011-06-01 株式会社東芝 メモリシステム
JP4745356B2 (ja) * 2008-03-01 2011-08-10 株式会社東芝 メモリシステム
JP4653817B2 (ja) * 2008-03-01 2011-03-16 株式会社東芝 メモリシステム
KR101067457B1 (ko) 2008-03-01 2011-09-27 가부시끼가이샤 도시바 메모리 시스템
JP4762261B2 (ja) * 2008-03-12 2011-08-31 株式会社東芝 メモリシステム
JP4439569B2 (ja) * 2008-04-24 2010-03-24 株式会社東芝 メモリシステム
JP5221332B2 (ja) * 2008-12-27 2013-06-26 株式会社東芝 メモリシステム
JP5317690B2 (ja) 2008-12-27 2013-10-16 株式会社東芝 メモリシステム
JP5323199B2 (ja) 2009-02-12 2013-10-23 株式会社東芝 メモリシステム及びメモリシステムの制御方法
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JP6028670B2 (ja) * 2013-04-22 2016-11-16 株式会社デンソー データ記憶装置
CN103544995B (zh) * 2013-08-27 2016-09-21 华为技术有限公司 一种坏道修复方法及装置
KR102244618B1 (ko) * 2014-02-21 2021-04-26 삼성전자 주식회사 플래시 메모리 시스템 및 플래시 메모리 시스템의 제어 방법
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JP2022094705A (ja) * 2020-12-15 2022-06-27 キオクシア株式会社 メモリシステムおよび制御方法
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Also Published As

Publication number Publication date
US20100274950A1 (en) 2010-10-28
EP2250567A4 (en) 2011-09-28
TWI400615B (zh) 2013-07-01
WO2009110126A1 (en) 2009-09-11
TW200947213A (en) 2009-11-16
US7904640B2 (en) 2011-03-08
JP4498426B2 (ja) 2010-07-07
EP2250567A1 (en) 2010-11-17
CN101647007A (zh) 2010-02-10
US20110099349A1 (en) 2011-04-28
KR20090117935A (ko) 2009-11-16
US8176237B2 (en) 2012-05-08
JP2009211227A (ja) 2009-09-17

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