TWI399138B - 印刷電路板 - Google Patents

印刷電路板 Download PDF

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Publication number
TWI399138B
TWI399138B TW099128175A TW99128175A TWI399138B TW I399138 B TWI399138 B TW I399138B TW 099128175 A TW099128175 A TW 099128175A TW 99128175 A TW99128175 A TW 99128175A TW I399138 B TWI399138 B TW I399138B
Authority
TW
Taiwan
Prior art keywords
signal transmission
transmission line
circuit board
printed circuit
signal
Prior art date
Application number
TW099128175A
Other languages
English (en)
Other versions
TW201210421A (en
Inventor
Shou Kuo Hsu
Yung Chieh Chen
Hsien Chuan Liang
Wenlaing Tseng
Shen Chun Li
Chia Nan Pai
Original Assignee
Hon Hai Prec Ind Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hon Hai Prec Ind Co Ltd filed Critical Hon Hai Prec Ind Co Ltd
Priority to TW099128175A priority Critical patent/TWI399138B/zh
Priority to US12/875,156 priority patent/US8383957B2/en
Publication of TW201210421A publication Critical patent/TW201210421A/zh
Application granted granted Critical
Publication of TWI399138B publication Critical patent/TWI399138B/zh

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • H05K1/025Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
    • H05K1/0251Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance related to vias or transitions between vias and transmission lines
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09836Oblique hole, via or bump
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24917Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structure Of Printed Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Description

印刷電路板
本發明系關於一種印刷電路板。
為了連接不同層之間的走線,印刷電路板各層之間通常會設置過孔,目前設計在兩層之間的過孔均是與各層垂直的,但這種過孔設計並不一定是最佳的,因為若過孔與各層之間形成一角度的話,則會使訊號傳輸距離縮短,有可能會降低訊號傳輸的損耗,如此,對過孔來說仍有一定的設計空間來改善訊號的傳輸品質。
鑒於上述內容,有必要提供一種具有較佳過孔設計的印刷電路板。
一種印刷電路板,包括設於兩不同層上的訊號傳輸線,且該兩訊號線透過一過孔電性相連,該過孔的中心線與該兩層的垂直線之間成一銳角,且該銳角小於等於cos-1[(Lv2-Lt2)/(Lv2+Lt2)],其中Lt為單位長度的訊號傳輸線的損耗,Lv為單位長度的過孔的損耗。
上述的印刷電路板透過將該過孔設計成傾斜的結構,從而使 訊號傳輸的損耗大大降低,進而提高了訊號的傳輸品質。
100‧‧‧印刷電路板
10‧‧‧第一訊號層
30‧‧‧第二訊號層
20‧‧‧介質層
12‧‧‧第一訊號傳輸線
32‧‧‧第二訊號傳輸線
40‧‧‧過孔
圖1係本發明印刷電路板較佳實施方式的截面示意圖。
圖2-4係圖1印刷電路板三種不同過孔設計的簡易圖。
請參考圖1,本發明印刷電路板100的較佳實施方式包括第一訊號層10、第二訊號層30及設置與該第一與第二訊號層10與30之間的介質層20。該第一訊號層10上設有第一訊號傳輸線12,該第二訊號層30上設有第二訊號傳輸線32,該第一訊號傳輸線12透過過孔40與該第二訊號傳輸線32電性相連,以實現訊號的傳輸,該過孔40的中心線42與印刷電路板100的垂直線110之間成一銳角θ,以下段落將對該銳角θ的具體設計進行詳細說明。本實施方式僅以三層板為例舉例說明,本發明也可應用於多層板。
請參考圖2,設AC段為第一訊號傳輸線12,其長度為1/2;設BD段為第二訊號傳輸線32,其長度為1/2;設CD段為過孔40,其長度為h。其中,CD段與AC及BD段均垂直(即過孔是垂直設置方式),設單位長度的過孔的損耗(loss)為Lv,單位長度的訊號傳輸線的損耗為Lt,則由A至B的路徑(ACDB)的總的損耗α 1=Lt*1+Lv*h。
請參考圖3,將圖2中的過孔作最大範圍的傾斜設計,即將AB段直接作為過孔40。則AB段沿垂直方向上的傾斜角度為θ,則由A至B的路徑(AB)的總的損耗α 2=Lv*h*sec θ。
請參考圖4,將圖2中的過孔作部份的傾斜設計,即設AF段為第一訊號傳輸線12,FG段為過孔40,GB段為第二訊號傳輸線32。設FG段沿垂直方向上的傾斜角度為θ c,且θ c為損耗最小的角度(θ的最佳值),由於Lv>Lt,故可計算出θ c,設損耗差為α(θ),則有:α(θ)=α 1-α 2=(Lt*1+Lv*h)-Lv*h*sec θ=Lv*h*(1-sec θ)+Lt*h*tan θ
若要滿足α(θ)最大,則對α(θ)求導後使其等於0,有:α(θ)′=0-Lt*h*sec2 θ+Lv*h*sec θ*tan θ=0
Lt/Lv=sin θ
θ c=sin-1(Lt/Lv)
實際設計時,由於布線工藝的要求,有時不能完全按上述公式得出的最佳θ c進行設計過孔,例如會在+/-5度範圍內進行微調,但最大不能超過某一值θ e(θ的最大值)。該θ e即為α(θ)=0時計算出來的角度,因為如果角度大於θ e,則傾斜設計的過孔反而比垂直設計的過孔的損耗還要大,θ e計算公式如下:α(θ)=α 1-α 2=0
(Lt*1+Lv*h)-Lv*h*sec θ=0
θ e=cos-1[(Lv2-Lt2)/(Lv2+Lt2)]
其中,Lt及Lv可使用公式計算,或以量測的方式得到,其公式如下:
Lv=0.11(R/Zv+G*Zv)
其中,DF為損耗正切(loss tangent),f為訊號頻率,W為訊號傳輸線的寬度,Z0為訊號傳輸線的特徵阻抗,Zv為過孔的特徵阻抗,R為過孔等效電路單位長度的電阻值,G為過孔等效電路單位長度的電導值,εeff為訊號傳輸線等效介電常數。
本發明印刷電路板100在具體設計時,若布線工藝的要求允許的話,則過孔40中心線42與印刷電路板100的垂直線110的傾斜角度θ等於sin-1(Lt/Lv),如此,該第一訊號傳輸線12與第二訊號傳輸線32上訊號的損耗最小,若布線工藝的要求不允許的話,則將該傾斜角度θ在小於cos-1[(Lv2-Lt2)/(Lv2+Lt2)]的範圍內進行微調,此時雖然不能達到訊號的損耗最小,但也能在一定程度上減小損耗,印刷電路板100上的其他布線也可根據此來進行設計,如此一來可大大提高了印刷電路板的訊號傳輸品質。
綜上所述,本發明符合發明專利要件,爰依法提出專利申請 。惟,以上所述者僅為本發明之較佳實施例,舉凡熟悉本案技藝之人士,在爰依本發明精神所作之等效修飾或變化,皆應涵蓋於以下之申請專利範圍內。
100‧‧‧印刷電路板
10‧‧‧第一訊號層
30‧‧‧第二訊號層
20‧‧‧介質層
12‧‧‧第一訊號傳輸線
32‧‧‧第二訊號傳輸線
40‧‧‧過孔

Claims (2)

  1. 一種印刷電路板,包括設於兩不同層上的訊號傳輸線,且該兩訊號線透過一過孔電性相連,其改良在於:該過孔的中心線與該兩層的垂直線之間成一銳角,且該銳角小於等於cos-1[(Lv2-Lt2)/(Lv2+Lt2)],其中Lt為單位長度的訊號傳輸線的損耗,Lv為單位長度的過孔的損耗,其中Lt與Lv的計算公式為:Lv=0.11(R/Zv+G*Zv),其中,DF為損耗正切,f為訊號頻率,W為訊號傳輸線的寬度,Z0為訊號傳輸線的特徵阻抗,Zv為過孔的特徵阻抗,R為過孔等效電路單位長度的電阻值,G為過孔等效電路單位長度的電導值,εeff為訊號傳輸線等效介電常數。
  2. 如申請專利範圍第1項所述之印刷電路板,其中該銳角等於sin-1(Lt/Lv)。
TW099128175A 2010-08-24 2010-08-24 印刷電路板 TWI399138B (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW099128175A TWI399138B (zh) 2010-08-24 2010-08-24 印刷電路板
US12/875,156 US8383957B2 (en) 2010-08-24 2010-09-03 Printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW099128175A TWI399138B (zh) 2010-08-24 2010-08-24 印刷電路板

Publications (2)

Publication Number Publication Date
TW201210421A TW201210421A (en) 2012-03-01
TWI399138B true TWI399138B (zh) 2013-06-11

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10537024B2 (en) 2018-01-30 2020-01-14 General Electric Company Process for fabricating printed circuit assembly and printed circuit assembly thereof
CN110716128A (zh) * 2019-10-29 2020-01-21 广州兴森快捷电路科技有限公司 一种pcb损耗测试方法
GB202000401D0 (en) * 2020-01-10 2020-02-26 Cantor Tech Limited Substrate and method

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI246384B (en) * 2004-11-22 2005-12-21 Benq Corp Multi-layer printed circuit board layout and manufacturing method thereof

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5585675A (en) * 1994-05-11 1996-12-17 Harris Corporation Semiconductor die packaging tub having angularly offset pad-to-pad via structure configured to allow three-dimensional stacking and electrical interconnections among multiple identical tubs
WO1997019579A1 (fr) * 1995-11-17 1997-05-29 Kabushiki Kaisha Toshiba Tableau de connexion multicouches, materiau prefabrique pour ce tableau, procede de fabrication de ce dernier groupement de composants electroniques et procede de formation de connexions verticales conductrices
JP5021216B2 (ja) * 2006-02-22 2012-09-05 イビデン株式会社 プリント配線板およびその製造方法
JP5013973B2 (ja) * 2007-05-31 2012-08-29 株式会社メイコー プリント配線板及びその製造方法、並びに、このプリント配線板を用いた電子部品収容基板及びその製造方法
TW201228507A (en) * 2010-12-17 2012-07-01 Hon Hai Prec Ind Co Ltd Printed circuit board

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI246384B (en) * 2004-11-22 2005-12-21 Benq Corp Multi-layer printed circuit board layout and manufacturing method thereof

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US8383957B2 (en) 2013-02-26
TW201210421A (en) 2012-03-01
US20120048610A1 (en) 2012-03-01

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