TWI396771B - 形成矽化鎳之強化方法 - Google Patents

形成矽化鎳之強化方法 Download PDF

Info

Publication number
TWI396771B
TWI396771B TW099128213A TW99128213A TWI396771B TW I396771 B TWI396771 B TW I396771B TW 099128213 A TW099128213 A TW 099128213A TW 99128213 A TW99128213 A TW 99128213A TW I396771 B TWI396771 B TW I396771B
Authority
TW
Taiwan
Prior art keywords
nickel
silver
plating
wafer
layer
Prior art date
Application number
TW099128213A
Other languages
English (en)
Other versions
TW201127988A (en
Inventor
約翰P 卡哈蘭
蓋瑞 韓
喬治R 阿蒂斯
大衛L 傑克森
Original Assignee
羅門哈斯電子材料有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 羅門哈斯電子材料有限公司 filed Critical 羅門哈斯電子材料有限公司
Publication of TW201127988A publication Critical patent/TW201127988A/zh
Application granted granted Critical
Publication of TWI396771B publication Critical patent/TWI396771B/zh

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/10Electroplating with more than one layer of the same or of different metals
    • C25D5/12Electroplating with more than one layer of the same or of different metals at least one layer being of nickel or chromium
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601Process or apparatus
    • C23C18/1603Process or apparatus coating on selected surface areas
    • C23C18/1605Process or apparatus coating on selected surface areas by masking
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601Process or apparatus
    • C23C18/1633Process of electroless plating
    • C23C18/1635Composition of the substrate
    • C23C18/1639Substrates other than metallic, e.g. inorganic or organic or non-conductive
    • C23C18/1642Substrates other than metallic, e.g. inorganic or organic or non-conductive semiconductor
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601Process or apparatus
    • C23C18/1633Process of electroless plating
    • C23C18/1646Characteristics of the product obtained
    • C23C18/165Multilayered product
    • C23C18/1653Two or more layers with at least one layer obtained by electroless plating and one layer obtained by electroplating
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601Process or apparatus
    • C23C18/1633Process of electroless plating
    • C23C18/1655Process features
    • C23C18/1664Process features with additional means during the plating process
    • C23C18/1667Radiant energy, e.g. laser
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601Process or apparatus
    • C23C18/1633Process of electroless plating
    • C23C18/1689After-treatment
    • C23C18/1692Heat-treatment
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/31Coating with metals
    • C23C18/32Coating with nickel, cobalt or mixtures thereof with phosphorus or boron
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/48After-treatment of electroplated surfaces
    • C25D5/50After-treatment of electroplated surfaces by heat-treatment
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00Electroplating characterised by the article coated
    • C25D7/12Semiconductors
    • C25D7/123Semiconductors first coated with a seed layer or a conductive layer
    • C25D7/126Semiconductors first coated with a seed layer or a conductive layer for solar cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28518Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • H01L21/76889Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances by forming silicides of refractory metals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • H01L31/022408Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Mechanical Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Electrochemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Development (AREA)
  • Inorganic Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Sustainable Energy (AREA)
  • Electromagnetism (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Chemically Coating (AREA)
  • Other Surface Treatments For Metallic Materials (AREA)

Description

形成矽化鎳之強化方法
本申請基於35 U.S.C. §119(e),主張於2009年8月25日提出之美國臨時申請案第61/275,085號的優先權,該臨時申請案之整體內容係藉由引用形式併入本文。
本發明係關於形成矽化鎳之強化方法。更具體而言,本發明係關於使加工步驟數減少之形成矽化鎳的強化方法。
於半導體及先進封裝技術中,矽化物通常可用於多種目的,如形成閘電極、歐姆接觸、互連線、蕭特基能障二極體接觸(Schottky barrier diode contact)、光伏裝置、太陽能電池及光電元件。矽化物可藉由各種技術形成,該等技術包括共沉積,如沉積於矽基板上之金屬層的共濺鍍、共蒸鍍、化學氣相沉積(CVD)及熱退火。舉例而言,當藉由共蒸鍍或共濺鍍形成金屬矽化物時,係將該金屬沉積於矽基板上,隨後進行高溫退火,致使該金屬擴散進入該矽中,使該金屬於該處與矽結合產生金屬矽化物。退火典型係發生於真空或惰性氣體氛圍中以防止該金屬沉積物氧化。該沉積製程以及於惰性環境中或真空下之退火皆需要使用經特別設計且昂貴之設備。
退火之後,典型係將金屬層沉積於該金屬矽化物上以構建並形成導電軌道或電極。典型地,於沉積此等金屬層之前必須先活化該矽化物。可藉由將催化性材料沉積於該矽化物上而進行活化;然而,此需要於整體製程外增加多個步驟或需要使用催化性膠體化合物。催化性膠體化合物可能會黏附至選擇性塗覆於該矽上之介電材料,並造成金屬於該介電材料上之非所欲、過度及非選擇性的沉積。金屬之非選擇性沉積可能會導致表面污染;導電材料非所欲地擴散進入介電材料中;甚至是由短路及其他裝置的不規則導致的裝置故障。這些不僅使加工步驟數增加,而且,每當鍍金屬(metallization)之前包括有活化步驟時即存在未適當地活化該金屬層之風險,因此造成金屬層間之黏合失效(adhesion failure)。
U.S. 6,787,450揭露了於半導體裝置上形成矽化物以及使用無電金屬沉積來形成導體之方法。該等半導體可為矽系、矽-鍺、鍺或砷化鎵。該半導體材料係選擇性地塗覆有絕緣層,留下該半導體之曝露區域。藉由化學氣相沉積將鈦層沉積於曝露之半導體上,並將該半導體熱退火至足以形成矽化鈦之高溫。除了鈦之外,還可使用其他金屬如鎢、鈷及鎳來形成矽化物;然而,鈦為較佳之金屬,因為矽化鈷及矽化鎳兩者皆具有高矽消耗及n+接面漏電流(junction leakage)之缺點。
於該退火製程過程中,並非所有的鈦皆於該矽化物形成時消耗掉。任何餘留在該矽化物表面上的鈦皆是藉由使用包括氫氧化銨與過氧化氫之混合物的溶液進行蝕刻或剝離(stripping)而移除。移除該鈦之後,在將任何金屬層沉積於該矽化物上之前,先活化該矽化物。該活化作用係自該矽化鈦移除氧化物及含氧化物之化合物。此等氧化物會危及金屬對該矽化物之黏合性,並於最終危及任何使用該半導體之電子裝置的可靠性。於活化過程中,該矽化鈦層被輕微地蝕刻。可使用含有過氧化銨之蝕刻溶液進行活化。其他活化方法係包括使該矽化物與氫氟酸(HF)單獨接觸或使該矽化物與HF及氯化鈀之混合物接觸。各種界面活性劑也可包含於該活化溶液中。若形成矽化鈷或矽化鎳而非矽化鈦時,還需要在無電構建形成導體之前活化該矽化物。活化之後,沖洗該半導體,隨後無電鍍覆鎳、鎳合金、鈷或鈷合金以形成導體。
儘管存在多種於半導體晶圓上形成金屬矽化物的方法,但仍需要形成矽化物之強化且更有效的方法。
一種方法,係包括:提供含矽基板;於該含矽基板上沉積鎳層;於該鎳層上沉積銀層;以及將該具有鎳層及銀層之含矽基板加熱至足夠溫度以形成矽化鎳。
該鎳金屬層係與該含矽基板相鄰,與該鎳金屬層相鄰之銀金屬層保護該鎳金屬不被矽化物形成時所使用之高溫損壞。此外,該銀層允許於標準室內環境(standard room environment)或含氧氛圍中形成矽化物,因此消除了對於經特別設計且昂貴之設備以及額外的耗時製程步驟的需求。該方法可消除在將銀沉積於鎳上之前必須先活化矽化鎳的耗時步驟。此活化步驟之消除係降低了鎳與銀之間黏合失效的可能性。該銀層於燒結過程中防止非所欲之氧化物的形成,因此降低了金屬層分離的可能性,並於最終防止使用該半導體之電子裝置的故障。因此,該矽化鎳方法提供了比許多形成矽化物之傳統方法更為強化且更有效的方法。
如本說明書通篇所使用者,術語“沉積”與“鍍覆”可互換使用。術語“電流軌道”與“電流線”可互換使用。術語“組成物”與“浴”可互換使用。不定冠詞“一(a及an)”係意圖包括單數及複數兩者。術語“矽化物”係意指矽與另一元素之二元化合物,該另一元素通常為金屬。術語“選擇性沉積”係意指沉積係發生於基板上之具體所欲區域。術語“lux=lx”為照明單位,其等於流明/平方米;且頻率為540兆赫(tetrahertz)時,1 lux=1.46毫瓦之輻射電磁(EM)功率。除了內文中明確另行指出者之外,下列縮寫係具有下述意義:℃=攝氏度;g=公克;mL=毫升;L=公升;A=安培;dm=分米;cm=公分;μm=微米;nm=奈米;UV=紫外線;以及IR=紅外線。除了另行指出者外,所有百分比及比例皆是以重量計。所有範圍皆包含上、下限值,且可以任何順序組合使用,除非此等數值範圍於邏輯上受到總和至多為100%之限制。
光伏裝置(photovoltaics)及太陽能電池可由含單晶矽或多晶矽或非晶矽之半導體晶圓構成。此等晶圓典型係具有p-型基極摻雜。
該半導體晶圓之形狀可以是圓形、正方形或長方形,或可為任何其他適當之形狀。此等晶圓可具有多種尺寸及表面電阻。舉例而言,圓形晶圓可具有150nm、200nm、300nm、400nm或更大之直徑。
將晶圓之背面予以鍍金屬(metallize)以提供低電阻晶圓。可使用任何傳統方法。典型地,該半導體晶圓之表面電阻(亦稱為片電阻)為40至90歐姆(ohm)/平方單位(square),或諸如40 ohm/square至60 ohm/square,或諸如60 ohm/square至80 ohm/square。
可於該整個背面塗覆金屬或可於該背面之一部分塗覆金屬例如形成網格(grid)。可藉由各種技術來提供此等背面鍍金屬(back side metallization),且該背面鍍金屬可在將該晶圓之正面鍍金屬之前進行。於一具體實施例中,係將金屬塗層以導電膠如含銀膠(paste)、含鋁膠或含銀及鋁之膠的形式施加至該背面;然而,也可使用該技藝中已知之其他適當的膠。典型地,此等導電膠係包括包埋於玻璃基質中的導電顆粒及有機黏合劑。可藉由各種技術如網版印刷將導電膠施加至該晶圓。施加該膠之後,燃燒以移除該有機黏合劑。當使用含鋁之導電膠時,該鋁係部分地擴散進入該晶圓之背面,或者,若使用亦含有銀之膠時,鋁可能會與銀形成合金。使用此含鋁膠可提升電阻接觸,並提供“p+”摻雜區域。可藉由先施加鋁或硼隨後再進行相互擴散而製造重度摻雜之“p+”型區域。於另一具體實施例中,可將種晶層沉積於該晶圓之背面,並可藉由無電鍍覆或電解鍍覆將金屬塗層沉積於該種晶層上。
可視需要對該晶圓之正面進行晶體定向紋理蝕刻(crystal-oriented texture etching),以使該表面具有降低反射之經提升之光入射幾何學。此可藉由使該半導體晶圓與酸(如氫氟酸)或鹼接觸,而將該表面紋理化或粗糙化。
為了製造半導體接面,係於該晶圓之正面上進行磷擴散或離子植入以製造n摻雜(n+或n++)區域,並對該晶圓提供PN接面。該n摻雜區域可稱為射極層(emitter layer)。
將抗反射層加至該晶圓之正面或射極層。此外,該抗反射層可作為鈍化層。適當之抗反射層係包括但不限於,氧化矽層如SiOx ;氮化矽層如Si3 N4 ;氧化矽層及氮化矽層之組合;以及氧化矽層、氮化矽層與氧化鈦層如TiOx 之組合。於前述式中,x為氧原子之數目。可藉由多種技術如各種氣相沉積方法如化學氣相沉積及物理氣相沉積來沉積此等抗反射層。
晶圓之正面係含有金屬化圖案。舉例而言,晶圓之正面可由電流收集線(current collecting line)及電流匯流排(current busbar)構成。典型地,電流收集線係橫切於匯流排,並典型地具有相對於電流匯流排而言相對細微之結構(亦即尺寸)。
該圖案穿透該抗反射層以曝露該晶圓之半導體本體的表面。或者,可於開口中形成溝槽以產生選擇性射極。此等溝槽可為高摻雜之區域。可使用各種製程來形成該圖案,該等製程為例如但不限於,雷射剝蝕、機械方式以及微影製程,所有製程皆為該技藝中習知者。此等機械方式係包括鋸切及擦刻(scratching)。典型之光微影製程係包括將可成像之材料配置於該晶圓之表面上,圖案化該可成像之材料以在該抗反射層中形成開口,將該圖案轉移至該晶圓,於該開口中沉積鎳層,以及移除該可成像之材料。於一具體實施例中,係於在開口中沉積鎳層之步驟前將該可成像之材料移除。於另一具體實施例中,係於在開口中沉積鎳層之步驟後將該可成像之材料移除。當該可成像之材料於該鎳沉積步驟期間存在時,此可成像之材料典型地係避免任何會吸收該鎳沉積步驟期間所使用之輻射波長的染料如對比染料(contrast dye)。於該鍍覆步驟中存在之可圖像化之材料典型係含有最小透光率為40%至60%的染料。
當該可成像之材料為液體時,此材料可藉由任何適當之技術(例如但不限於,旋塗、噴墨印刷、淋幕式塗佈以及輥塗)配置於該晶圓之表面上。當該可成像之材料為乾膜時,此材料可藉由真空層壓(vacuum lamination)配置於該晶圓之表面上。
藉由將該可成像之材料透過光罩曝露於光化輻射而將該可成像之材料圖案化。光化輻射之選擇將取決於所挑選之特定可成像之材料。可使用雷射及其他傳統光化輻射源將該可成像之材料圖案化。
然後,將該可成像之材料中的圖案轉移至該半導體晶圓基板。可使用濕式化學蝕刻技術或使用乾式蝕刻技術進行圖案轉移。適當之乾式蝕刻技術係包括,但不限於,電漿蝕刻如反應性離子蝕刻。典型地,該圖案係由具有相對窄之橫截面尺寸的線(其為電流收集線)及具有相對厚之橫截面尺寸的線(其為匯流排)所構成。該匯流排係橫切於該等電流收集線。
可使用任何適當之聚合物移除劑,如彼等由羅門哈斯電子材料公司(Rohm and Haas Electronic Materials(Marlborough,Massachusetts))售賣者來移除該可成像之材料。此等移除劑可為鹼性、酸性或實質中性。
將鎳種晶層沉積於該正面導電圖案上。可藉由任何該技藝中已知之傳統鎳沉積方法來沉積鎳種晶層。典型地,係藉由光輔助鎳沉積來沉積鎳種晶層。若該鎳來源為無電鎳組成物,則於無施加外電路電流(external current)之情況下進行鍍覆。若該鎳來源係來自電解質鎳組成物,則將後側電位(rear side potential)(整流器)施加至該半導體晶圓基板。該光可為連續光或脈衝光。舉例而言,可藉由使用機械斷路器中斷該光或使用電子裝置基於所欲之循環間歇地將能量循環至該光來達成脈衝照明。於沉積鎳之前,典型係使用1%氫氟酸溶液將表面氧化物自該導電圖案移除。
於一具體實施例中,係將該半導體浸漬於該鎳鍍覆組成物中,並於整個鎳沉積過程中施加光。於另一具體實施例中,係將該半導體浸漬於該鎳鍍覆組成物中,於預定量之時間內以起始強度將光施加至該半導體,之後再將該起始光強度降低至用於剩餘之鍍覆循環的預定量,以將鎳層沉積於該摻雜半導體之n摻雜正面的曝露部分上。於該起始光強度之後施加至該半導體基板的光強度以及施加於剩餘之鍍覆循環的光強度永遠低於該起始強度。該起始光強度的絕對值以及於起始時期之後降低之光強度的絕對值可於鍍覆製程過程中改變以達成最佳鍍覆結果,只要該起始光強度高於用於剩餘之鍍覆循環的光強度。若該起始光強度於起始時間期(initial time period)內有變化,則施加於剩餘之鍍覆循環的光強度可以該起始光強度的平均值為基準。可進行少量試驗來決定適當之起始光強度、用於施加該起始光強度之適當的起始時間期、以及施加於剩餘之鍍覆循環的光強度。
通常,用於施加該起始光強度之起始時間期係大於0秒至15秒。典型地,係對該半導體施加該起始光強度0.25秒至15秒,更典型地2秒至15秒,最典型地5秒至10秒。通常,該降低之光強度為該起始光強度之5%至50%。典型地,該降低之光強度為該起始光強度之20%至50%,或諸如30%至40%。
可用於起始該鍍覆製程之光係包括,但不限於,可見光、IR、UV及X射線。光源係包括,但不限於,白熾燈、LED光(發光二極體)、紅外線燈、螢光燈、鹵素燈及雷射。通常,最初施加至該半導體之光的量可為8000 lx至20,000 lx,或諸如10,000 lx至15,000 lx。通常,於剩餘之鎳鍍覆循環中施加至該半導體晶圓之光的量可為400 lx至10,000 lx,或諸如500 lx至7500 lx。
典型地,係使用無電鎳鍍覆組成物將鎳透過該抗反射層之開口沉積於該半導體晶圓之曝露表面上。該無電鎳鍍覆組成物可以包括或可不包括還原劑。典型地,該無電鎳鍍覆組成物係包括還原劑。此等還原劑係包括,但不限於次磷酸鈉、次磷酸鉀、硫脲及硫脲衍生物、乙內醯脲及乙內醯脲衍生物、氫醌及氫醌衍生物、間苯二酚、甲醛及甲醛衍生物、DEA(n-二乙基-胺硼烷)、硼氫化鈉及肼。此等還原劑可依傳統之量使用,如0.1g/L至40g/L。可於市場上購得的無電鎳組成物之實例係包括DURAPOSITTM SMT 88無電鎳(Electroless Nickel)及NIPOSITTM PM 980與PM 988無電鎳。全部皆可自羅門哈斯電子材料有限公司(Rohm and Haas Electronic Materials,LLC,Marlborough,MA,U.S.A.)購得。
或者,可使用電解質鎳組成物。當使用電解質組成物時,除了光以外,還需施加後側電位(整流器)以沉積鎳。典型之電流密度為0.1A/dm2 至2A/dm2 ,更典型為0.5A/dm2 至1.5A/dm2 。特定之電流需求係取決於所使用之晶圓的特定尺寸。所使用電鍍製程為習知者。適當之電解質鎳鍍覆浴可於市場上購得,且很多係揭露於文獻中。可於市場上購得之電解質鎳浴之實例為可自羅門哈斯電子材料有限公司獲得之NICKEL GLEAMTM 電解質鎳產品。適當之電解質鎳鍍覆浴之其他實例為揭露於U.S. 3,041,255中之瓦茨(Watts)型浴。
該鍍覆組成物中之鎳離子可藉由使用任何適當之溶液可溶性(solution-soluble)鎳化合物(典型為水溶性鎳鹽)來提供。此等鎳化合物係包括,但不限於,硫酸鎳、氯化鎳、胺基磺酸鎳及磷酸鎳。鎳化合物之混合物可用於該鍍覆組成物中。此等混合物可為具有相同金屬但為不同化合物之金屬化合物,如硫酸鎳與氯化鎳的混合物。該鎳化合物係以足以對該鍍覆組成物提供0.1g/L至150g/L,典型0.5g/L至100g/L,更典型1g/L至70g/L之鎳離子濃度的量加入該鍍覆組成物中。
該鎳化合物係以足以對該鍍覆組成物提供0.1g/L至150g/L,更典型0.5g/L至100g/L,再更典型1g/L至70g/L之鎳離子濃度的量加入該鍍覆組成物中。
多種電解質之任一者,包括酸及鹼,皆可用於該鎳鍍覆組成物中。例示性電解質係包括但不限於,烷磺酸如甲烷磺酸、乙烷磺酸及丙烷磺酸;烷醇磺酸類;芳基磺酸如甲苯磺酸、苯磺酸及酚磺酸;含胺基之磺酸如醯胺基磺酸;胺磺酸;無機酸;羧酸如甲酸及鹵乙酸;氫鹵酸;及焦磷酸鹽。酸及鹼之鹽也可用作該電解質。再者,該電解質可含有酸之混合物、鹼之混合物、或一種或多種酸與一種或多種鹼之混合物。此等電解質通常可自各種來源如埃德瑞希化學公司(Aldrich Chemical Company(Milwaukee,Wisconsin))於市場上購得。
視需要,可將多種界面活性劑用於該鎳鍍覆組成物中。只要不影響該鎳鍍覆之效能,任何陰離子型、陽離子型、兩性型及非離子型界面活性劑皆可使用。界面活性劑可以該技藝中習知之傳統用量包含於該組成物中。
視需要,該鎳鍍覆組成物可含有一種或多種額外之成分。此等額外之成分係包括,但不限於,增亮劑、晶粒細化劑及延展性增強劑。此等額外之成分為該技藝中習知者,且係以傳統之量使用。
該鎳鍍覆組成物可視需要含有緩衝劑。例示性緩衝劑係包括,但不限於,硼酸鹽緩衝劑(如硼砂)、磷酸鹽緩衝劑、檸檬酸鹽緩衝劑、碳酸鹽緩衝劑及氫氧化物緩衝劑。所使用之該緩衝劑的量為足以將該鍍覆組成物之pH維持於所欲之程度的量,如熟悉該技藝之人士習知的量。
通常,係將該圖案化之半導體晶圓浸入容置於鍍覆槽內之鎳鍍覆組成物中。設置光源以使用光能量將該半導體晶圓照明。舉例而言,該光源可以是提供半導體光伏敏感性(photovoltaically sensitive)之波長範圍內的能量之螢光燈或LED燈。可使用各種其他光源,例如但不限於,白熾燈如75瓦及250瓦燈、汞燈、鹵素燈及150瓦紅外線燈。
該鍍覆槽係由對該鎳鍍覆組成物呈化學惰性之材料所製成,且具有40%至60%之最小透光率。或者,該晶圓可水平地設置於該鍍覆槽中並自該鎳鍍覆組成物之上方進行照明,於該例中,該鍍覆槽至少不需要具有最小透光率。
藉由使用光能量照明該半導體晶圓之正面,鍍覆係發生於該正面。該照射光能量於該半導體中產生電流。可藉由調節該光強度、浴溫度、還原劑活性、起始晶圓條件(starting wafer condition)、摻雜程度以及該技藝之工作者已知的其他參數來控制該正面之鍍覆速率。若該鍍覆浴為電解浴,則亦也可藉由整流器來調節鍍覆速率。厚度為20nm至300nm,或諸如50nm至150nm之鎳層為典型所欲者,其確切厚度係取決於各種因素如用途、尺寸、圖案及幾何學。
鎳鍍覆組成物可具有1至14,典型1至12,更典型1至8之pH範圍。該鎳鍍覆組成物於鍍覆過程中之工作溫度可為10℃至100℃,或諸如20℃至50℃。
在透過該開口將鎳沉積於鄰近該半導體晶圓基板之曝露表面之後,立即將銀沉積至與鎳相鄰。典型地,係於鍍覆鎳之後在少於1分鐘之內沉積銀,更典型係於鍍覆鎳之後在少於30秒之內沉積銀,最典型係於鍍覆鎳之後在1至30秒之內沉積銀。若沒有在鎳沉積之後於短時間內將銀沉積於鎳上,鎳會變為鈍化且必須於鍍銀之前進行活化。鈍化為用於描述抗拒鍍覆之金屬層的一般術語。當鍍覆發生於鈍化之金屬上時,該鈍化之金屬與沉積於其上之金屬間的黏合性極差且不可靠。典型地,所沉積之金屬會輕易地自該鈍化之金屬剝離。因此,高度希望在鍍鎳之後於1分鐘或更短時間之內將銀沉積於鎳上,否則可能需要進行活化步驟以達成鎳與銀之間的可靠黏合。
可使用傳統之電鍍銀組成物。該等銀組成物可為含氰化物之銀組成物或不含氰化物之銀組成物。銀離子之來源可包括但不限於:氰化銀鉀;硝酸銀;硫代硫酸銀鈉;葡萄糖酸銀;銀-胺基酸錯合物如銀-半胱胺酸錯合物;烷基磺酸銀,如甲烷磺酸銀。可使用銀化合物之混合物,如硝酸銀與銀-半胱胺酸錯合物之混合物。於該組成物中,銀離子之濃度典型為2 g/L至40 g/L之量。此等銀化合物通常可自各種來源(如埃德瑞希化學公司(Milwaukee,Wisconsin))於市場上購得。市場上可使用之銀鍍覆組成物之實例為可自羅門哈斯電子材料限公司(Marlborough,Massachusetts)購得之ENLIGHTTM Silver Plate 600及620。
多種傳統界面活性劑如陰離子型、陽離子型、兩性型及非離子型界面活性劑皆可用於該銀鍍覆組成物中。界面活性劑可以傳統之量包含於該組成物中。該等銀鍍覆組成物可含有一種或多種額外之傳統成分。此等額外之成分係包括但不限於,電解質、緩衝劑、增亮劑、晶粒細化劑、螯合劑、錯合劑、還原劑、整平劑(leveler)以及延展性增強劑。此等額外之成分為該技藝中習知者且係以傳統之量使用。
銀鍍覆組成物可具有1至14,典型1至12,更典型1至8之pH範圍。該鍍覆組成物於金屬鍍覆過程中的工作溫度為10℃至100℃,如20℃至60℃。該工作溫度之範圍典型為10℃至20℃,更典型15℃至20℃。典型地,係使用冷卻器將該銀鍍覆組成物之溫度維持在室溫以下。
可藉由光誘導鍍覆(light induced plating;LIP)或該技藝中習知之傳統銀電鍍方法來沉積銀。LIP鍍覆之過程與用於鍍覆上述電解鎳種晶層之過程相似。通常,係將圖案化之半導體晶圓浸入容置於鍍覆槽中之銀組成物中。將該半導體晶圓之後側與外電路電流之來源(整流器)相連接。將放置於該銀鍍覆組成物中之銀陽極與該整流器相連接,從而於組件之間形成完整之電路。典型之電路密度為0.1A/dm2 至5A/dm2 ,更典型為1A/dm2 至3A/dm2 。總電流需求係取決於所使用之晶圓的特定尺寸。此外,該銀陽極係提供現成之銀離子來源以補充該銀鍍覆組成物之銀離子,而不需要使用外加之來源。設置光源以使用光能量照明該半導體晶圓。舉例而言,該光源可為提供半導體晶圓光伏敏感性之波長範圍內的能量之螢光燈或LED燈。可使用各種其他光源,例如但不限於,白熾燈如75瓦及250瓦燈、汞燈、鹵素燈及150瓦紅外線燈。
該鍍覆槽係由對該銀鍍覆組成物呈化學惰性之材料所製成,且具有40%至60%之最小透光率。或者,該晶圓可水平地設置於該鍍覆槽中並自該銀鍍覆組成物之上方進行照明,於該例中,該鍍覆槽至少不需要具有最小透光率。
藉由使用光能量照明該半導體晶圓之正面,銀鍍覆係發生於該鎳種晶層上。光強度之範圍為5000 lx至15000 lx。該照射光能量於該太陽能電池中產生電流。當該銀鍍覆浴為電解浴時,亦使用傳統整流器施加外部電流(outside current)。可藉由調節該光強度、浴溫度、起始晶圓條件、摻雜程度、電流量以及該技藝之工作者已知之其他參數來控制該正面之鍍覆速率。厚度為1μm至30μm,或諸如5μm至15μm之銀層為典型所欲者,其確切厚度係取決於各種因素如用途、尺寸、圖案及幾何學。
視需要,可於鍍金屬之前對該半導體晶圓進行邊緣隔離(edge isolation)。邊緣隔離係降低在鍍金屬過程中由於金屬沉積物自該半導體晶圓之n型射極層橋接至p型層造成該半導體晶圓分流(shunting)的可能性。可藉由在鍍金屬之前,沿著該半導體晶圓之邊緣施加傳統鍍覆阻劑(亦即邊緣遮罩)而進行邊緣隔離。此等鍍覆阻劑可以是蠟系組成物,其係包括一種或多種蠟,如褐煤蠟、石蠟、豆蠟(soy)、植物蠟及動物蠟。此外,此等阻劑可包括一種或多種交聯劑如傳統丙烯酸酯、二丙烯酸酯及三丙烯酸酯,以及一種或多種固化劑,以在曝露於輻射如UV及可見光後即固化該阻劑。固化劑係包括但不限於,使用於光阻及其他光敏組成物中之傳統光起始劑。此等光起始劑為該技藝中習知者且係公開於文獻中。可藉由傳統網版印刷程序或藉由選擇性噴墨製程來施加此等鍍覆阻劑。或者,可使用抗反射層對該半導體晶圓進行邊緣隔離。此可藉由在形成該抗反射層之過程中,沉積用以在該半導體層之邊緣產生該反射層之材料來進行。
將該銀金屬沉積於鎳上且與鎳相鄰之後,接著燒結該半導體以形成矽化鎳。燒結係在銀沉積於鎳表面上後進行,以提升銀與鎳之間的黏合性。在銀鍍覆於鎳上後進行燒結可擴大燒結窗。也就是說,可相對於傳統製程延長於特定峰值溫度(peak temperature)之燒結,以提供經提升之鎳與矽間之結合,而不必擔心損壞該晶圓。於許多傳統製程中,使半導體在烘箱中於特定溫度維持過長時間,可能造成鎳擴散進入該晶圓過深,滲入該射極層,因而造成晶圓分流。經提升之鎳與矽間之結合會降低矽化鎳與銀間之黏合失效的可能性。再者,銀不會因該燒結溫度而併入該矽化物中,因此銀係於燒結過程中保護鎳不被氧化而形成矽化鎳。可使用提供380℃或更高或400℃至550℃之晶圓峰值溫度的爐。不使用超過650℃之峰值溫度,係因為於此高溫下可能會形成矽化鎳及二矽化鎳兩者。二矽化鎳之形成係非所欲者,因為其具有會降低該半導體晶圓中之電流的高接觸電阻。典型地,峰值溫度時間範圍為2秒至20秒,或諸如5秒至15秒。適當之爐的實例為燈式爐(lamp based furnace;IR)。
因為該銀層於燒結過程中保護鎳不被氧化,所以可在與惰性氣體氛圍或真空形成對比之含氧環境中進行燒結。因此,消除了在惰性或真空環境中燒結所需之步驟與裝置以及此等過程所需之昂貴設備。此外,特定惰性氣體之消除亦進一步降低了成本及該燒結製程之複雜性。一般而言,燒結係進行至少3分鐘,諸如4至10分鐘,或諸如5至8分鐘。半導體通過該爐之線速度可隨所使用之爐改變。可進行少量實驗來決定適宜之線速度。典型地,該線速度為330公分(cm)/分鐘至430cm/分鐘,或諸如370cm/分鐘至420cm/分鐘。
已說明與太陽能電池中所使用之矽半導體晶圓特別相關之燒結製程;然而,該燒結方法亦可用於製造其它物件之元件,如光伏裝置、閘電極、歐姆接觸、互連線、蕭特基能障二極體接觸及光電元件。
所包括之下列實施例係用以例示性說明本發明,而非意圖限制本發明之範圍。
實施例1
提供六個經摻雜之單晶矽晶圓。各個經摻雜之矽晶圓於晶圓之正面具有n+摻雜區,形成射極層以及位於該射極層下方之pn接面。各個晶圓之正面係塗覆有由Si3 N4 構成之鈍化層或抗反射層。各個晶圓之正面具有用於電流軌道之圖案,其穿透該抗反射層並曝露出該矽晶圓之表面。各個電流軌道橫貫該晶圓之總體長度。該等電流軌道與匯流排交會於各個晶圓之末端及各個晶圓之中心。各個晶圓之背面係經p+摻雜並含有鋁電極。
使用SCHMID DOD 300噴墨裝置沿著各個矽晶圓之該射極層區域的邊緣選擇性地施加熱熔鍍覆阻劑,以防止在鍍金屬過程中造成該晶圓分流。該熱熔鍍覆阻劑係包括90重量份之石蠟、10重量份之80%豆蠟與20%棕櫚蠟的摻合物、10重量份之堪地里拉蠟(candelilla wax)以及1重量份之螢光染料。隨後用1%氫氟酸水溶液將各個晶圓活化60秒,以移除該矽上之任何表面氧化物。隨後用水沖洗該等晶圓。
將各個經摻雜之單晶矽晶圓浸沒於容置在透光之化學惰性鍍覆槽中的傳統低溫之NIPOSITTM PM 988Electroless Nickel之無電鎳鍍覆組成物水溶液中。鍍覆溫度為35℃。於整個鍍覆循環中對該晶圓施以人造光。光源為螢光燈。橫跨各個晶圓所施加之平均強度經測定為13000 lx。使用傳統費舍爾科學測光表(Fisher Scientific light meter)測量該光。進行鍍鎳30秒以提供厚度為200nm之鎳層。
隨後用水沖洗該等鍍鎳之矽晶圓,並立即鍍銀以在該矽晶圓上形成電流軌道。在鍍銀之前不使用活化步驟來活化鎳。提供含有不具氰化物之銀電鍍組成物ENLIGHTTM Silver Plate 620及銀陽極的透光之化學惰性鍍覆槽。該電鍍組成物之溫度為35℃。亦提供螢光燈作為人造光源。將該等鍍鎳之晶圓置於該銀電鍍組成物中。將各個晶圓之背面上的各個鋁電極以及該銀陽極連接至整流器以形成完整電路。用於各個晶圓之背面電位為0.9伏特,於鍍覆過程中施加之電流密度為1.5至2A/dm2 。平均光強度為10,000 lx。進行LIP銀4分鐘以在該鎳層之上形成厚度為5μm之銀電流軌道。隨後將各個晶圓自該銀電鍍組成物中移除,用水沖洗並乾燥。
隨後,將各個經鍍覆之矽晶圓置於爐(Sierra Therm furnace 7500系列w/T-3 Qz. IR燈)中以燒結該等矽晶圓並形成矽化鎳。以10秒之時間將該爐中之溫度自室溫升至425℃,並設定峰值燒結溫度425℃係維持10秒之時間。該等晶圓通過該爐之速度為150cm/分鐘。將該等晶圓冷卻至室溫之後,接著將Scotch透明膠帶Cat. # 600貼至各個晶圓之金屬鍍覆面,然後用手自該晶圓撕下。四條膠帶樣本移除了絕大部份之該銀電流軌道。剩餘兩條樣本包括少量之該銀電流軌道,大部份之該銀電流軌道仍黏附於該晶圓。
實施例2
使用四個單晶半導體晶圓重複實施例1所述之方法。如實施例1中所述者,將該等晶圓摻雜並鍍覆金屬。於Sierra Therm爐中燒結該等鍍覆金屬之晶圓,自室溫開始,於10秒內將爐溫升至425℃,並於設定之峰值475℃燒結10秒。該等晶圓到達室溫之後,將Scotch透明膠帶Cat. # 600貼至各個晶圓之金屬鍍覆表面,隨後用手將該膠帶自該晶圓撕下。兩條膠帶樣本具有少量黏附於其表面上之銀。剩餘兩條膠帶樣本未顯示任何銀被移除之可見記號。
實施例3
使用兩個單晶半導體晶圓重複實施例1所述之方法。如實施例1中所述者,將該等晶圓摻雜並鍍覆金屬。於Sierra Therm爐中燒結該等鍍覆金屬之晶圓,自室溫開始,於10秒內將爐溫升至425℃,並於設定之峰值500℃燒結10秒。該等晶圓到達室溫之後,將Scotch透明膠帶Cat. # 600貼至各個晶圓之金屬鍍覆表面,隨後用手將該膠帶自該晶圓撕下。兩條膠帶樣本皆未顯示任何銀從該等電流軌道被移除之可見記號。
實施例4
使用兩個單晶半導體晶圓重複實施例1所述之方法。如實施例1中所述者,將該等晶圓摻雜並鍍覆金屬。於Sierra Therm爐中燒結該等鍍覆金屬之晶圓,自室溫開始,於10秒內將爐溫升至425℃,並於設定之峰值525℃燒結10秒。該等晶圓到達室溫之後,將Scotch透明膠帶Cat. # 600貼至各個晶圓之金屬鍍覆表面,隨後用手將該膠帶自該晶圓撕下。兩條膠帶樣本皆未顯示任何銀從該等電流軌道被移除之可見記號。
實施例5
使用四個單晶半導體晶圓重複實施例1所述之方法。如實施例1中所述者,將該等晶圓摻雜並鍍覆金屬。於Sierra Therm爐中燒結該等鍍覆金屬之晶圓,自室溫開始,於10秒內將爐溫升至425℃,於設定之峰值550℃燒結10秒。該等晶圓到達室溫之後,將Scotch透明膠帶Cat. # 600貼至各個晶圓之金屬鍍覆表面,隨後用手將該膠帶自該晶圓撕下。所有膠帶樣本皆未顯示任何銀從該等電流軌道被移除之可見記號。
實施例6
使用兩個單晶半導體晶圓重複實施例1所述之方法。如實施例1中所述者,將該等晶圓摻雜並鍍覆金屬。於Sierra Therm爐中燒結該等鍍覆金屬之晶圓,自室溫開始,於10秒內將爐溫升至425℃,於設定之峰值600℃燒結10秒。該等晶圓到達室溫之後,將Scotch透明膠帶Cat. # 600貼至各個晶圓之金屬鍍覆表面,隨後用手將該膠帶自該晶圓撕下。兩條膠帶樣本皆未顯示任何銀從該等電流軌道被移除之可見記號。

Claims (8)

  1. 一種方法,係包括:a)提供含矽基板;b)於該含矽基板上沉積鎳層;c)於該鎳層上沉積銀層;以及d)將該具有鎳層及銀層之含矽基板加熱至足夠溫度以形成矽化鎳。
  2. 如申請專利範圍第1項所述之方法,其中,該鎳層之厚度為50nm至500nm。
  3. 如申請專利範圍第1項所述之方法,其中,該銀層之厚度為1μm至30μm。
  4. 如申請專利範圍第1項所述之方法,其中,加熱係以380℃或更高之峰值溫度進行。
  5. 如申請專利範圍第1項所述之方法,其中,該鎳係藉由無電製程、光輔助製程或電解製程予以沉積。
  6. 如申請專利範圍第1項所述之方法,其中,該銀係藉由電解製程或光誘導鍍覆製程予以沉積。
  7. 如申請專利範圍第1項所述之方法,其中,該加熱步驟係於含氧環境中進行。
  8. 如申請專利範圍第1項所述之方法,其中,該含矽基板為太陽能電池、閘電極、歐姆接觸、互連線、蕭特基能障二極體接觸、光伏裝置或光電元件。
TW099128213A 2009-08-25 2010-08-24 形成矽化鎳之強化方法 TWI396771B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US27508509P 2009-08-25 2009-08-25

Publications (2)

Publication Number Publication Date
TW201127988A TW201127988A (en) 2011-08-16
TWI396771B true TWI396771B (zh) 2013-05-21

Family

ID=43384182

Family Applications (1)

Application Number Title Priority Date Filing Date
TW099128213A TWI396771B (zh) 2009-08-25 2010-08-24 形成矽化鎳之強化方法

Country Status (7)

Country Link
US (1) US7955978B2 (zh)
EP (1) EP2290128B1 (zh)
JP (1) JP5631113B2 (zh)
KR (2) KR20110021686A (zh)
CN (1) CN102034695B (zh)
SG (1) SG169302A1 (zh)
TW (1) TWI396771B (zh)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8802461B2 (en) * 2011-03-22 2014-08-12 Micron Technology, Inc. Vertical light emitting devices with nickel silicide bonding and methods of manufacturing
US20130071967A1 (en) * 2011-09-21 2013-03-21 Atomic Energy Council-Institute Of Nuclear Energy Research Method for Making a Nickel Film for Use as an Electrode of an N-P Diode or Solar Cell
TWI464784B (zh) * 2011-10-28 2014-12-11 Iner Aec Executive Yuan 一種製作微晶矽薄膜的方法
US9496432B2 (en) 2011-11-23 2016-11-15 Imec Method for forming metal silicide layers
CN103367468A (zh) * 2012-03-29 2013-10-23 无锡尚德太阳能电力有限公司 一种太阳电池、组件及太阳电池电极的制造方法
JP5472950B2 (ja) * 2012-06-19 2014-04-16 Jeインターナショナル株式会社 マスキング剤および表面処理基材の製造方法
US20140110264A1 (en) * 2012-10-24 2014-04-24 Atomic Energy Council-Institute of Nuclear Research Light induced nickel plating method for p-type silicon and n/p solar cell material
CN104517833A (zh) * 2013-09-30 2015-04-15 扬州倍英斯微电子有限公司 一种肖特基势垒二极管的制造方法
KR20150089592A (ko) * 2014-01-28 2015-08-05 현대중공업 주식회사 태양전지의 도핑 및 전극 형성방법과 그 태양전지
CN116435167A (zh) * 2015-11-09 2023-07-14 应用材料公司 底部处理
JP6405553B2 (ja) * 2015-12-18 2018-10-17 石原ケミカル株式会社 不導態形成性の軽金属上への導電性皮膜形成方法
US10020204B2 (en) * 2016-03-10 2018-07-10 Applied Materials, Inc. Bottom processing
TWI658506B (zh) 2016-07-13 2019-05-01 美商英奧創公司 電化學方法、元件及組成
KR101843035B1 (ko) * 2016-09-09 2018-03-29 주식회사 티지오테크 모판 및 마스크의 제조 방법
WO2018097533A1 (ko) * 2016-11-22 2018-05-31 주식회사 티지오테크 프레임 일체형 마스크 및 그 제조방법
KR101867467B1 (ko) * 2016-11-22 2018-06-15 주식회사 티지오테크 프레임 일체형 마스크 및 그 제조방법
WO2018097532A1 (ko) * 2016-11-22 2018-05-31 주식회사 티지오테크 프레임 일체형 마스크의 제조 방법
CN109490193B (zh) * 2018-11-27 2021-07-23 东北大学 一种镀铬板表面覆膜的结合力评价方法
JP2022134922A (ja) * 2021-03-04 2022-09-15 株式会社Jcu 無電解ニッケルめっき浴および無電解ニッケル合金めっき浴
CN114059048A (zh) * 2021-11-09 2022-02-18 株洲中车时代半导体有限公司 一种化学镀缺陷优化装置及方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070167009A1 (en) * 2005-09-08 2007-07-19 Yi-Wei Chen Method of fabricating nickel silicide

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2011565A (en) * 1934-02-28 1935-08-20 Gladeon M Barnes Suspension for vehicles
US3041255A (en) 1960-03-22 1962-06-26 Metal & Thermit Corp Electrodeposition of bright nickel
US4042951A (en) * 1975-09-25 1977-08-16 Texas Instruments Incorporated Gold-germanium alloy contacts for a semiconductor device
US4144139A (en) * 1977-11-30 1979-03-13 Solarex Corporation Method of plating by means of light
US4321283A (en) * 1979-10-26 1982-03-23 Mobil Tyco Solar Energy Corporation Nickel plating method
US4424241A (en) * 1982-09-27 1984-01-03 Bell Telephone Laboratories, Incorporated Electroless palladium process
US4451969A (en) * 1983-01-10 1984-06-05 Mobil Solar Energy Corporation Method of fabricating solar cells
US4609565A (en) * 1984-10-10 1986-09-02 Mobil Solar Energy Corporation Method of fabricating solar cells
US5011565A (en) 1989-12-06 1991-04-30 Mobil Solar Energy Corporation Dotted contact solar cell and method of making same
JPH06252091A (ja) * 1993-02-24 1994-09-09 Hitachi Ltd 半導体装置およびその製造方法
US5803957A (en) * 1993-03-26 1998-09-08 C. Uyemura & Co.,Ltd. Electroless gold plating bath
US5543333A (en) * 1993-09-30 1996-08-06 Siemens Solar Gmbh Method for manufacturing a solar cell having combined metallization
US5494710A (en) * 1994-07-05 1996-02-27 Mallory, Jr.; Glenn O. Electroless nickel baths for enhancing hardness
US5712191A (en) * 1994-09-16 1998-01-27 Semiconductor Energy Laboratory Co., Ltd. Method for producing semiconductor device
DE69829018T2 (de) * 1997-06-10 2006-03-23 Canon K.K. Substrat und Verfahren zu dessen Herstellung
US6406743B1 (en) * 1997-07-10 2002-06-18 Industrial Technology Research Institute Nickel-silicide formation by electroless Ni deposition on polysilicon
US6620718B1 (en) * 2000-04-25 2003-09-16 Advanced Micro Devices, Inc. Method of forming metal silicide regions on a gate electrode and on the source/drain regions of a semiconductor device
JP2003037083A (ja) * 2001-07-25 2003-02-07 Fujitsu Ltd 半導体装置の製造方法
US6899816B2 (en) * 2002-04-03 2005-05-31 Applied Materials, Inc. Electroless deposition method
US6905622B2 (en) * 2002-04-03 2005-06-14 Applied Materials, Inc. Electroless deposition method
US6787450B2 (en) * 2002-05-29 2004-09-07 Micron Technology, Inc. High aspect ratio fill method and resulting structure
US20040005468A1 (en) * 2002-07-03 2004-01-08 Steinecker Carl P. Method of providing a metallic contact on a silicon solar cell
US7256498B2 (en) * 2004-03-23 2007-08-14 Taiwan Semiconductor Manufacturing Co., Ltd. Resistance-reduced semiconductor device and methods for fabricating the same
US20050212058A1 (en) * 2004-03-23 2005-09-29 Yi-Chun Huang Resistance-reduced semiconductor device and fabrication thereof
JP2006237374A (ja) * 2005-02-25 2006-09-07 Toshiba Corp 半導体集積回路装置及びその製造方法
WO2006102180A2 (en) * 2005-03-18 2006-09-28 Applied Materials, Inc. Contact metallization methods and processes
US20080035489A1 (en) * 2006-06-05 2008-02-14 Rohm And Haas Electronic Materials Llc Plating process
MY158347A (en) * 2007-02-15 2016-09-30 Massachusetts Inst Technology Solar cells with textured surfaces

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070167009A1 (en) * 2005-09-08 2007-07-19 Yi-Wei Chen Method of fabricating nickel silicide

Also Published As

Publication number Publication date
KR20170018878A (ko) 2017-02-20
JP5631113B2 (ja) 2014-11-26
EP2290128B1 (en) 2013-10-02
EP2290128A3 (en) 2012-03-28
CN102034695A (zh) 2011-04-27
EP2290128A2 (en) 2011-03-02
KR20110021686A (ko) 2011-03-04
CN102034695B (zh) 2014-02-26
US7955978B2 (en) 2011-06-07
JP2011102429A (ja) 2011-05-26
TW201127988A (en) 2011-08-16
SG169302A1 (en) 2011-03-30
US20110065274A1 (en) 2011-03-17

Similar Documents

Publication Publication Date Title
TWI396771B (zh) 形成矽化鎳之強化方法
KR101578035B1 (ko) 반도체 상에서의 광 유도 플레이팅 방법
JP5301115B2 (ja) めっき方法
KR101567783B1 (ko) 백그라운드 도금을 방지하는 방법
TWI481743B (zh) 於矽光伏打電池上之金屬的光誘鍍敷
US20090139568A1 (en) Crystalline Solar Cell Metallization Methods
TWI538042B (zh) 用以改善金屬黏附之活化製程
TWI525666B (zh) 金屬鍍覆半導體之改良方法
TWI493615B (zh) 半導體的電化學蝕刻方法
TWI408253B (zh) 光誘導無電鍍敷

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees