TWI390702B - 具有內部佈線匯流排之半導體封裝 - Google Patents
具有內部佈線匯流排之半導體封裝 Download PDFInfo
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- TWI390702B TWI390702B TW097114373A TW97114373A TWI390702B TW I390702 B TWI390702 B TW I390702B TW 097114373 A TW097114373 A TW 097114373A TW 97114373 A TW97114373 A TW 97114373A TW I390702 B TWI390702 B TW I390702B
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Description
本發明涉及經封裝的半導體。
為了增強經封裝的半導體之功能性,較偏好在同一封裝中提供各自具有不同功能性的多個半導體晶粒。利用金佈線將不同的半導體晶粒組合和連接在一起。然後透過外部封裝管腳向半導體晶粒提供電源。外部封裝管腳連接到內部接合指,其通常被導線接合到每個半導體晶粒。然而,有時很難向每個半導體晶粒提供電源。例如,由於物理限制或互連製程限制,對內部接合指的接近是有限的,或者可能沒有任何額外的內部接合指可用。
透過包括向半導體晶粒提供對內部接合指的間接接近之中介層而解決了上述的情況。
因此,在一個特點中,一種經封裝的半導體包括內部接合指、至少第一和第二半導體晶粒以及中介層。該經封裝的半導體進一步包括第一和第二半導體晶粒與內部接合指之間的佈線、中介層與內部接合指之間的佈線、以及中介層與第一和第二半導體晶粒之間的佈線。中介層與第一和第二半導體晶粒之間的佈線從而減少了第一和第二半導體晶粒與內部接合指之間的佈線所需的內部接合指的數目。
由於中介層在內部,並且做為第一和第二半導體晶粒與內部接合指之間的橋樑,因此中介層進一步當內部接合指不能被第一和第二半導體晶粒接近時提供了對內部接合指的間接接近。
在一個示例性實施例中,中介層可放置在第一和第二半導體晶粒之間。內部接合指透過內部接合指與第一和第二半導體晶粒之間的佈線連接向第一和第二半導體晶粒提供電源、電氣接地和電信號。內部接合指還透過中介層與內部接合指之間的佈線連接向中介層提供電源、電氣接地和電
信號。中介層進而當內部接合指不能被第一和第二半導體晶粒接近時,透過中介層與第一和第二半導體晶粒之間的佈線連接向第一和第二半導體晶粒提供電源、電氣接地和電信號。從而,第一和第二半導體晶粒能夠對電源、電氣接地和電信號進行完全接近。
透過參考以下詳細描述和所附圖式可獲得更完整的理解。
圖1表示依據本發明第一示例性實施例的半導體封裝100的頂視圖。如圖1所示,半導體封裝100包括半導體晶粒101和102、中介層103、電氣接地106、佈線107和內部接合指108。中介層103表示為包括接地連接104和電源連接105。半導體晶粒101和102表示為分別包括連接器110和111。
圖1進一步表示半導體晶粒101和102經由連接器110和111連接到內部接合指108,其也被稱為接合指。半導體晶粒101和102與內部接合指108之間的連接是利用導線接合方法透過佈線107來進行的。佈線107例如可為金、鋁或銅佈線,並且導線接合方法可包括球形接合或楔形接合。半導體晶粒101和102與內部接合指108的連接向半導體晶粒101和102提供電源、接地及/或信號。此外,半導體晶粒101和102還利用導線接合方法透過佈線107連接到電氣接地106。電氣接地106是環形的並且圍繞半導體晶粒101和102,以便為充分的接地連接提供額外的來源。
如圖1所示,半導體晶粒101和102被並排放置,從而半導體晶粒101和半導體晶粒102可利用導線接合方法透過佈線107互連。然而,在半導體晶粒101和102每一個的面向相對的半導體晶粒的那一側,半導體晶粒101和102都無法接近內部接合指108,也無法接近電氣接地106,因為半導體晶粒101和102的每一個在物理上阻擋了相對的半導體晶粒接近內部接合指108或電氣接地106。由於分別在兩個半導體晶粒101和102的一側之連接器110和111被阻擋了接近內部接合指108和電氣接地106,因此半導體晶粒101和102不能對電源、接地及/或信號進行完全接近。此外,由於半導體晶粒101和102都可能需要接近每個半導體晶粒101和102的所
有側面上的內部接合指108,因此沒有足夠的內部接合指108來連接每個半導體晶粒。因此,在半導體封裝100中包括了中介層103,以便為半導體晶粒101和102提供對內部接合指108的間接接近,並且減少提供電源所需的內部接合指108的數目。
如圖1所示,中介層103位於半導體晶粒101和102之間。半導體晶粒101和102利用導線接合方法透過佈線107連接到中介層103的電源連接105和電氣接地連接104。利用導線接合方法,電源連接105透過佈線107連接到內部接合指108並且電氣接地連接104透過佈線107連接到電氣接地106。因此,當內部接合指108和電氣接地106不可接近時,中介層103做為用於向半導體晶粒101和102提供電源、電氣接地及/或信號的橋樑。
由於半導體晶粒101和102透過中介層103而能夠對電源、接地及/或信號進行完全接近,並且半導體晶粒101和102被互連,因而形成了具有不同功能性的經封裝的半導體。經封裝的半導體可被諸例如行動電話、個人電腦或數位音樂播放器之類的任何電子裝置所使用。其他實施例在下文中參考圖5A至5H來描述。
半導體晶粒101和102可從不同的晶圓處理形成,或者半導體晶粒101和102可從相同的晶圓處理形成但是在半導體封裝100內執行不同的功能性。例如,半導體晶粒101和102可為特殊應用積體電路(ASIC)、快閃記憶體或者雙倍資料速率同步動態隨機存取記憶體(DDR SDRAM)。然而,半導體封裝100並不限於只包括這些特定類型的半導體晶粒;更確切地說,半導體封裝100可依據需要而包括其他形式的半導體晶粒。在此實施例中,表示兩個半導體晶粒;然而,在其他實施例中,半導體封裝可依據需要而包括多於兩個的半導體晶粒,以便為半導體封裝獲得所需量的多重功能性。
在其他實施例中,如果包括更多的半導體晶粒,則依據需要也可包括額外的中介層,以便為每個半導體晶粒提供對電源、接地及/或信號的接近。中介層103還可具有基本的電氣功能,諸如電容和電感。另外,中介層103可為球閘陣列(BGA)基底材料,諸如具有銅痕跡線/平面的雙順丁烯二酸醯亞胺三氮口井(BT)或者簡單金屬化的矽晶粒。
現在將討論圖2,以進一步說明本發明的第一示例性實施例的內部結構。圖2表示依據本發明第一示例性實施例的半導體封裝的截面圖。如圖2所示,半導體封裝100進一步包括晶粒座201、晶粒附接材料202、成型材料203和外部封裝管腳204。
如圖2所示,半導體晶粒101和102透過導線接合方法利用佈線107連接到內部接合指108、連接到彼此並且連接到中介層103。內部接合指108連接到外部封裝管腳204,並且從外部封裝管腳204接收電源、電氣接地及/或信號。如上所述,當內部接合指108和電氣接地106不可接近時,中介層103向半導體晶粒101和102提供電源、電氣接地及/或信號。此外,半導體晶粒101和102利用晶粒附接材料202安裝到晶粒座201。晶粒座201或者可如圖2所示曝露在半導體封裝100的下表面上,或者晶粒座201可曝露在成型材料203之內。曝露晶粒座201是為了溫度調節。此外,電氣接地106被提升到高於晶粒座201,以便為導線接合提供更容易的接近。
現在將討論圖3,以說明本發明的第二以及更複雜的示例性實施例。圖3表示依據本發明的這個第二示例性實施例的半導體封裝300的頂視圖。如圖3可見,半導體封裝300包括半導體晶粒301、302、303和304、中介層305、電氣接地306、晶粒座307、內部接合指312以及佈線313。中介層305包括電源連接308和310以及接地連接309和311。半導體晶粒301包括連接器316,半導體晶粒302包括連接器314,並且半導體晶粒303和304包括連接器315。
半導體晶粒301、302、303和304可從不同的晶圓處理形成,或者可從相同的晶圓處理形成但是在半導體封裝300內執行不同的功能性。例如,在圖3中,半導體晶粒301可為ASIC,半導體晶粒302可為快閃記憶體,而半導體晶粒303和304可都是DDR SDRAM。然而,半導體封裝300並不限於只包括這些特定類型的半導體晶粒;更確切地說,半導體封裝300可依據需要而包括其他形式的半導體晶粒。在此實施例中,表示四個半導體晶粒;然而,在其他實施例中,半導體封裝可依據需要而包括兩個或更多個半導體晶粒,以提供半導體封裝所想要的多重功能性。
如圖3所示,半導體晶粒301利用佈線313、透過導線接合經由連接器
316連接到內部接合指312和電氣接地306。內部接合指312提供電源、接地及/或信號,並且電氣接地306提供額外的電氣接地來源。電氣接地306是環形的並且圍繞半導體晶粒301、302、303和304,以提供充分的接地連接。然而,在半導體晶粒301至304中每一個的面向相對的半導體晶粒的那一側,半導體晶粒301、302、303和304都無法接近內部接合指312,也無法接近電氣接地306,因為半導體晶粒301至304的每一個在物理上阻擋了相對的半導體晶粒接近內部接合指312和電氣接地306。由於在半導體晶粒301至304每一個的一側,半導體晶粒302的連接器314、半導體晶粒303和304的連接器315以及半導體晶粒301的連接器316被阻擋了接近內部接合指312和電氣接地306,因此半導體晶粒301至304不能對電源、接地及/或信號進行完全接近。為了使半導體晶粒301至304能對電源和電氣接地進行完全接近,中介層305做為橋樑並且被如以下所述地實現。
在此實施例中,中介層305透過電源連接310和內部接合指312之間的導線接合連接而連接到內部接合指312。中介層305還透過接地連接311和電氣接地306之間的導線接合連接而連接到電氣接地306。電源連接310和接地連接311在中介層305內分別被走線到電源連接308和接地連接309。半導體晶粒301和303透過與電源連接308和接地連接309的導線接合連接,分別經由連接器316和315連接到中介層305。此外,半導體晶粒302透過導線接合連接器314和316連接到半導體晶粒301,並且半導體晶粒304透過導線接合連接器315連接到半導體晶粒303。因此,透過中介層305,半導體晶粒301至304能對電源進行完全接近,其由內部接合指312提供,並且能對電氣接地進行完全接近,其由電氣接地306提供。
半導體晶粒301還透過導線接合連接到半導體晶粒303,從而所有的半導體晶粒301至304都被互連。中介層305還可向半導體晶粒301至304提供對電信號的間接接近,其由內部接合指312提供。上述連接提供了完全集成的經封裝的半導體,其中每個半導體晶粒都被提供了電源、電氣接地及/或信號。
如圖3所示的實施例只包括一個中介層305。然而,依據需要可包括額外的中介層,以便為每個半導體晶粒提供對電源和接地的接近。中介層305
還可具有基本的電氣功能,諸如電容和電感。另外,中介層305可為BGA基底材料,諸如具有銅痕跡線/平面的BT或者簡單金屬化的矽晶粒。
現在將討論圖4,以更清楚說明本發明第二示例性實施例的內部結構和互連。圖4表示依據本發明第二示例性實施例的半導體封裝300的簡化截面圖。
如圖4所示,半導體封裝包括半導體晶粒301、302、303和304、中介層305、晶粒座307、內部接合指312、佈線313、成型材料401、晶粒附接材料402和外部封裝管腳403。在此實施例中,半導體晶粒302被堆疊在半導體晶粒301上,半導體晶粒303被堆疊在中介層305上,並且半導體晶粒304被堆疊在半導體晶粒303上。然而,在其他實施例中,半導體晶粒可被並排放置,並且額外的半導體晶粒可依據需要被堆疊在彼此之上。
半導體晶粒301、302、303和304利用佈線313被導線接合到內部接合指312。內部接合指312連接到外部封裝管腳403,並且從外部封裝管腳403接收電源、電氣接地及/或信號。半導體晶粒302利用佈線313被導線接合到半導體晶粒301。或者,半導體晶粒302可透過也稱為塌陷高度控制晶片連接(C4)的覆晶製程連接到半導體晶粒301。此外,半導體晶粒303利用佈線313透過導線接合與半導體晶粒301互連。而且,半導體晶粒301和303都利用佈線313被導線接合到中介層305。如上所述,當內部接合指312不可接近時,中介層305向半導體晶粒301和303提供電源、電氣接地及/或信號。此外,半導體晶粒304利用佈線313被導線接合到半導體晶粒303。或者,半導體晶粒304可透過覆晶製程連接到半導體晶粒303。半導體晶粒301至304之間的互連以及與內部接合指312的連接向經封裝的半導體提供了多重功能性。在其他實施例中,導線接合也可處於半導體封裝內引腳、E片盤和接合環之間。
在此實施例中,中介層305和半導體晶粒301利用晶粒附接材料402安裝到晶粒座307。晶粒座307或者可曝露在半導體封裝的下表面上,或者可曝露在成型材料401內,以便為半導體晶粒提供溫度調節。此外,電氣接地306被提升到高於晶粒座307,以便為導線接合提供更容易的接近。
一般來說,在所有實施例中,半導體封裝都可為以引腳框為主的封裝,
例如微形四方平面封裝(LQFP)、薄形四方扁平封裝(TQFP)、四方扁平無腳封裝(QFN)、或者薄型小尺寸封裝(TSOP)、或者基板封裝,例如塑膠球閘陣列(PBGA)、細微間距球閘陣列(TFBGA)或平面閘格陣列(LGA)。
現在參考圖5A-5H,其中表示本發明的各種示例性的實現方式。參考圖5A,本發明可實現為硬碟驅動器(HDD)1500中的經封裝的半導體。本發明可實現信號處理及/或控制電路的任一者或兩者,其在圖5A中由1502概括地標識。在一些實現方式中,HDD 1500中的信號處理及/或控制電路1502及/或其他電路(圖中未示)可處理資料、執行編碼及/或加密、執行計算、及/或對輸出到及/或接收自磁性儲存媒體1506的資料進行格式化。
HDD 1500可經由一個或多個有線或無線通信鏈結1508與主機裝置(圖中未示)諸如電腦、行動計算裝置諸如個人數位助理、行動電話、媒體或MP3播放器等,及/或其他裝置通信。HDD 1500可連接到記憶體1509,諸如隨機存取記憶體(RAM)、低延遲非揮發性記憶體諸如快閃記憶體、唯讀記憶體(ROM)及/或其他合適的電子資料儲存裝置。
現在參考圖5B,本發明可實現為多樣化數位光碟(DVD)驅動器1510中的經封裝的半導體。本發明可實現DVD驅動器1510的信號處理及/或控制電路中的任一者或兩者,其在圖5B中由1512概括地標識,及/或大容量資料儲存裝置1518。DVD驅動器1510中的信號處理及/或控制電路1512及/或其他電路(圖中未示)可處理資料、執行編碼及/或加密、執行計算、及/或對讀取自光學儲存媒體1516的資料及/或寫入到光學儲存媒體1516的資料進行格式化。在一些實現方式中,DVD驅動器1510中的信號處理及/或控制電路1512及/或其他電路(圖中未示)還可執行其他功能,諸如編碼及/或解碼及/或任何其他與DVD驅動器相關的信號處理功能。
DVD驅動器1510可經由一個或多個有線或無線通信鏈結1517與輸出裝置(圖中未示)通信。諸如電腦、電視或其他裝置。DVD驅動器1510可與以非揮發方式儲存資料的大容量資料儲存裝置1518通信。大容量資料儲存裝置1518可包括HDD諸如圖5A所示的HDD。HDD可為包括一個或多個具有直徑小於約1.8”的磁盤的迷你HDD。DVD驅動器1510可連接到記憶體1519,諸如RAM、ROM、低延遲非揮發性記憶體諸如快閃記憶體、及/
或其他合適的電子資料儲存裝置。
現在參考圖5C,本發明可實現為高畫質電視(HDTV)1520中的經封裝的半導體。本發明可實現HDTV 1520的信號處理及/或控制電路中的任一者或兩者,其在圖5C中由1522概括地標識、WLAN介面及/或大容量資料儲存裝置。HDTV 1520接收有線或無線格式的HDTV輸入信號,並且為顯示器1526產生HDTV輸出信號。在一些實現方式中,HDTV 1520的信號處理電路及/或控制電路1522及/或其他電路(圖中未示)可處理資料、執行編碼及/或加密、執行計算、格式化資料及/或執行所需要的任何其他類型的HDTV處理。
HDTV 1520可與諸如光學儲存裝置及/或磁性儲存裝置,例如硬碟驅動器及/或DVD驅動器之類的以非揮發方式儲存資料的大容量資料儲存裝置1527通信。至少一個HDD可具有圖5A所示的配置,及/或至少一個DVD驅動器可具有圖5B所示的配置。HDD可為包括一個或多個直徑小於約1.8”的磁盤的迷你HDD。HDTV 1520可連接到記憶體1528諸如RAM、ROM、低延遲非揮發性記憶體諸如快閃記憶體、及/或其他合適的電子資料儲存裝置。HDTV 1520還可支援經由WLAN網路介面1529而與WLAN的連接。
現在參考圖5D,本發明可實現為車輛1530的控制系統、車輛控制系統的大容量資料儲存裝置及/或WLAN介面中的經封裝的半導體。在一些實現方式中,本發明實現了動力傳動控制系統1532,其接收來自諸如溫度感測器、壓力感測器、旋轉感測器、氣流感測器及/或任何其他合適的感測器之類的一個或多個感測器1536的輸入,及/或產生諸如引擎操作參數、傳動操作參數、煞車參數及/或其他控制信號之類的一個或多個輸出控制信號1538。
本發明也可實現在車輛1530的其他控制系統1540中。控制系統1540同樣可接收來自輸入感測器1542的信號及/或輸出控制信號到一個或多個輸出裝置1544。在一些實現方式中,控制系統1540可為防鎖死煞車系統(ABS)、導航系統、遠程資訊服務系統、車輛遠程資訊服務系統、偏移車道系統、適應行駛控制系統、車輛娛樂系統,諸如立體聲、DVD、光碟等的一部分。還可構思其他實現方式。
動力傳動控制系統1532可與以非揮發方式儲存資料的大容量資料儲存裝置1546通信。大容量資料儲存裝置1546可包括光學儲存裝置及/或磁性儲存裝置,例如硬碟驅動器及/或DVD驅動器。至少一個HDD可具有圖5A所示的配置,及/或至少一個DVD驅動器可具有圖5B所示的配置。HDD可為包括一個或多個直徑小於約1.8”的磁盤的迷你HDD。動力傳動控制系統1532可連接到記憶體1547諸如RAM、ROM、低延遲非揮發性記憶體諸如快閃記憶體,及/或其他合適的電子資料儲存裝置。動力傳動控制系統1532還可支援經由WLAN網路介面1548而與WLAN的連接。控制系統1540也可包括大容量資料儲存裝置、記憶體及/或WLAN介面(均未示出)。
現在參考圖5E,本發明可實現為可包括蜂巢式天線1551的行動電話1550中的經封裝的半導體。本發明可實現行動電話1550的信號處理及/或控制電路中的任一者或兩者,其在圖5E中由1552概括地標識、WLAN介面及/或大容量資料儲存裝置。在一些實現方式中,行動電話1550包括麥克風1556、音頻輸出1558諸如揚聲器及/或音頻輸出插孔、顯示器1560及/或輸入裝置1562諸如鍵盤、點選裝置、語音致動器及/或其他輸入裝置。行動電話1550中的信號處理及/或控制電路1552及/或其他電路(圖中未示)可處理資料、執行編碼及/或加密、執行計算、格式化資料及/或執行其他行動電話功能。
行動電話1550可與諸如光學儲存裝置及/或磁性儲存裝置,例如硬碟驅動器及/或DVD驅動器之類的以非揮發方式儲存資料的大容量資料儲存裝置1564通信。至少一個HDD可具有圖5A所示的配置,及/或至少一個DVD驅動器可具有圖5B所示的配置。HDD可為包括一個或多個直徑小於約1.8”的磁盤的迷你HDD。行動電話1550可連接到記憶體1566諸如RAM、ROM、低延遲非揮發性記憶體諸如快閃記憶體及/或其他合適的電子資料儲存裝置。行動電話1550還可支援經由WLAN網路介面1568與WLAN的連接。
現在參考圖5F,本發明可實現為機上盒1580中的經封裝的半導體。本發明可實現機上盒1580的信號處理及/或控制電路中的任一者或兩者,其在圖5F中由1584概括地標識、WLAN介面及/或大容量資料儲存裝置。機上
盒1580接收來自諸如寬頻來源之類的來源信號,並輸出適用於顯示器1588諸如電視及/或監視器及/或其他視訊及/或音頻輸出裝置的標準及/或高清晰音頻/視訊信號。機上盒1580的信號處理及/或控制電路1584及/或其他電路(圖中未示)可處理資料、執行編碼及/或加密、執行計算、格式化資料及/或執行任何其他機上盒功能。
機上盒1580可與以非揮發方式儲存資料的大容量資料儲存裝置1590通信。大容量資料儲存裝置1590可包括光學儲存裝置及/或磁性儲存裝置,例如硬碟驅動器及/或DVD驅動器。至少一個HDD可具有圖5A所示的配置,及/或至少一個DVD驅動器可具有圖5B所示的配置。HDD可為包括一個或多個直徑小於約1.8”的磁盤的迷你HDD。機上盒1580可連接到記憶體1594諸如RAM、ROM、低延遲非揮發性記憶體諸如快閃記憶體及/或其他合適的電子資料儲存裝置。機上盒1580還可支援經由WLAN網路介面1596而與WLAN的連接。
現在參考圖5G,本發明可實現為媒體播放器1600中的經封裝的半導體。本發明可實現媒體播放器1600的信號處理及/或控制電路中的任一者或兩者,其在圖5G中由1604概括地標識、WLAN介面及/或大容量資料儲存裝置。在一些實現方式中,媒體播放器1600包括顯示器1607及/或使用者輸入1608諸如鍵盤、觸控板及其類似物。在一些實現方式中,媒體播放器1600可使用圖形化使用者介面(GUI)其一般經由顯示器1607及/或使用者輸入1608而使用選單、下拉式選單、圖示及/或點擊介面。媒體播放器1600進一步包括音頻輸出1609諸如揚聲器及/或音頻輸出插孔。媒體播放器1600的信號處理及/或控制電路1604及/或其他電路(圖中未示)可處理資料、執行編碼及/或加密、執行計算、格式化資料及/或執行任何其他媒體播放器功能。
媒體播放器1600可與以非揮發方式儲存資料諸如壓縮的音頻及/或視訊內容的大容量資料儲存裝置1610通信。在一些實現方式中,壓縮的音頻檔案包括符合MP3格式或其他合適的壓縮音頻及/或視訊格式的檔案。大容量資料儲存裝置可包括光學及/或磁性儲存裝置,例如HDD及/或DVD驅動器。至少一個HDD可具有圖5A所示的配置,及/或至少一個DVD驅動器可具有圖5B所示的配置。HDD可為包括一個或多個具有直徑小於大約1.8”
的磁盤的迷你HDD。媒體播放器1600可連接到記憶體1614諸如RAM、ROM、諸如快閃記憶體之類的低延遲非揮發性記憶體及/或其他合適的電子資料儲存裝置。媒體播放器1600還可支援經由WLAN網路介面1616而與WLAN的連接。除了上述實現方式以外還可構思其他實現方式。
參考圖5H,本發明可實現為可包括天線1621的網路電話(VoIP)播放器1620中的經封裝的半導體。本發明可實現VoIP播放器1620的信號處理及/或控制電路中的任一者或兩者,其在圖5H中由1622概括地標識、無線介面及/或大容量資料儲存裝置。在一些實現方式中,VoIP播放器1620的一部分包括麥克風1624、音頻輸出1625諸如揚聲器及/或音頻輸出插孔、顯示監視器1626、輸入裝置1627諸如鍵盤、點選裝置、語音致動器及/或其他輸入裝置及/或無線網路高傳真(Wi-Fi)通信模組1628。VoIP播放器1620中的信號處理及/或控制電路1622及/或其他電路(圖中未示)可處理資料、執行編碼及/或加密、執行計算、格式化資料及/或執行其他VoIP播放器功能。
VoIP播放器1620可與諸如光學儲存裝置及/或磁性儲存裝置,例如硬碟驅動器及/或DVD驅動器之類的以非揮發方式儲存資料的大容量資料儲存裝置1623通信。至少一個HDD可具有圖5A所示的配置,及/或至少一個DVD驅動器可具有圖5B所示的配置。HDD包括一個或多個具有直徑小於大約1.8”的磁盤的迷你HDD。VoIP播放器1620可連接到記憶體1629,其可為諸如RAM、ROM、諸如快閃記憶體之類的低延遲非揮發性記憶體及/或其他合適的電子資料儲存裝置。VoIP播放器1620被配置為經由Wi-Fi通信模組1628而建立與VoIP網路(圖中未示)的通信鏈結。
已經參考特定的示例性實施例描述了本發明。應當理解本發明不限於上述實施例,在不脫離本發明的範圍的情況下,可進行各種變化和修改。
100‧‧‧半導體封裝
101‧‧‧半導體晶粒
102‧‧‧半導體晶粒
103‧‧‧中介層
104‧‧‧接地連接
105‧‧‧電源連接
106‧‧‧電氣接地
107‧‧‧佈線
108‧‧‧內部接合指
110‧‧‧連接器
111‧‧‧連接器
201‧‧‧晶粒座
202‧‧‧晶粒附接材料
203‧‧‧成型材料
204‧‧‧外部封裝腳管
300‧‧‧半導體封裝
301‧‧‧半導體晶粒
302‧‧‧半導體晶粒
303‧‧‧半導體晶粒
304‧‧‧半導體晶粒
305‧‧‧中介層
306‧‧‧電氣接地
307‧‧‧晶粒座
308‧‧‧電源連接
309‧‧‧接地連接
310‧‧‧電源連接
311‧‧‧接地連接
312‧‧‧內部接合指
313‧‧‧佈線
314‧‧‧連接器
315‧‧‧連接器
316‧‧‧連接器
401‧‧‧成型材料
402‧‧‧晶粒附接材料
403‧‧‧外物封裝管腳
1500‧‧‧HDD
1502‧‧‧HDD信號處理及/或控制電路
1506‧‧‧磁性儲存媒體
1508‧‧‧有線或無線通信鏈結
1509‧‧‧記憶體
1510‧‧‧DVD
1512‧‧‧DVD信號處理及/或控制電路
1516‧‧‧光學儲存媒體
1517‧‧‧有線或無線通信鏈結
1518‧‧‧大容量資料儲存裝置
1519‧‧‧記憶體
1520‧‧‧HDTV
1522‧‧‧HDTV信號處理及/或控制電路
1526‧‧‧顯示器
1527‧‧‧大容量資料儲存裝置
1528‧‧‧記憶體
1529‧‧‧WLAN網路介面
1530‧‧‧車輛
1532‧‧‧動力傳動控制系統
1536‧‧‧感測器
1538‧‧‧輸出控制信號
1540‧‧‧其他車輛控制系統
1542‧‧‧感測器
1544‧‧‧輸出裝置
1546‧‧‧大容量資料儲存裝置
1547‧‧‧記憶體
1548‧‧‧WLAN網路介面
1550‧‧‧行動電話
1551‧‧‧蜂巢式天線
1552‧‧‧信號處理及/或控制電路
1556‧‧‧麥克風
1558‧‧‧音頻輸出
1560‧‧‧顯示器
1562‧‧‧使用者輸入
1564‧‧‧大容量資料儲存裝置
1566‧‧‧記憶體
1568‧‧‧WLAN網路介面
1580‧‧‧機上盒
1584‧‧‧信號處理及/或控制電路
1588‧‧‧顯示器
1590‧‧‧大容量資料儲存裝置
1594‧‧‧記憶體
1596‧‧‧WLAN網路介面
1600‧‧‧媒體播放器
1604‧‧‧信號處理及/或控制電路
1607‧‧‧顯示器
1608‧‧‧使用者輸入
1609‧‧‧音頻輸出
1610‧‧‧大容量資料儲存裝置
1614‧‧‧記憶體
1616‧‧‧WLAN網路介面
1620‧‧‧VoIP播放器
1621‧‧‧天線
1622‧‧‧信號處理及/或控制電路
1623‧‧‧大容量資料儲存裝置
1624‧‧‧麥克風
1625‧‧‧音頻輸出
1626‧‧‧顯示器
1627‧‧‧使用者輸入
1628‧‧‧Wi-Fi通信模組
1629‧‧‧記憶體
圖1是依據本發明第一示例性實施例的半導體封裝的頂視圖;圖2是依據本發明第一示例性實施例的半導體封裝的截面圖;圖3是依據本發明第二示例性實施例的半導體封裝的頂視圖;圖4是依據本發明第二示例性實施例的半導體封裝的截面圖;圖5A是表示本發明在HDD中的實施例之方塊圖;圖5B是本發明在DVD驅動器中的實施例之方塊圖;圖5C是本發明在HDTV中的實施例之方塊圖;圖5D是本發明在車輛中的實施例之方塊圖;圖5E是本發明在蜂巢式或行動電話中的實施例之方塊圖;圖5F是本發明在機上盒中的實施例之方塊圖;圖5G是本發明在媒體播放器中的實施例之方塊圖;以及圖5H是本發明在VoIP播放器中的實施例之方塊圖。
100‧‧‧半導體封裝
101‧‧‧半導體晶粒
102‧‧‧半導體晶粒
103‧‧‧中介層
104‧‧‧電氣接地連接
105‧‧‧電源連接
106‧‧‧電氣接地
107‧‧‧佈線
108‧‧‧內部接合指
110‧‧‧連接器
111‧‧‧連接器
Claims (15)
- 一種半導體封裝,包括:一晶粒座;一中介層,係安裝在該晶粒座上,該中介層包括一接地連接和一電源連接;一第一半導體晶粒,係安裝在該晶粒座上,該第一半導體晶粒和該中介層被並排放置;一第二半導體晶粒,係安裝在該中介層上;一佈線,該第一半導體晶粒係透過該佈線直接連接至(i)複數個接合指、(ii)該接地連接和(iii)該電源連接;以及一佈線,該第二半導體晶粒係透過該佈線直接連接至(i)複數個接合指、(ii)該接地連接和(iii)該電源連接。
- 依據申請專利範圍第1項所述之半導體封裝,更包括:一第三半導體晶粒,係安裝在該第一半導體晶粒上。
- 依據申請專利範圍第2項所述之半導體封裝,更包括:一佈線,該第三半導體晶粒係透過該佈線直接連接至(i)複數個接合指和(ii)該第一半導體晶粒。
- 依據申請專利範圍第2項所述之半導體封裝,更包括:一第四半導體晶粒,係安裝在該第二半導體晶粒上。
- 依據申請專利範圍第4項所述之半導體封裝,更包括:一佈線,該第四半導體晶粒係透過該佈線直接連接至(i)複數個接合指和(ii)該第二半導體晶粒,其中將該第四半導體晶粒直接連接至該第二半導體晶粒的該佈線進一步電性連接至(i)該接地連接和(ii)該電源連接,透過該佈線,該第二半導體晶粒係直接連接至該接地連接和該電源連接。
- 依據申請專利範圍第1項所述之半導體封裝,其中該接地連接和該電源連接係安裝在該第一半導體晶粒與該第二半導體晶粒之間。
- 依據申請專利範圍第1項所述之半導體封裝,其中 該接地連接係一第一接地連接,該電源連接係一第一電源連接,而該中介層更包括(i)一第二接地連接和(ii)一第二電源連接;該第二接地連接被導線接合到一電氣接地;該第二電源連接被導線接合到複數個接合指;該第一接地連接係與該第二接地連接電性連接,以便為該第一半導體晶粒和該第二半導體晶粒提供對該電氣接地的間接接近;以及該第一電源連接係與該第二電源連接電性連接,以便為該第一半導體晶粒和該第二半導體晶粒提供對複數個接合指的間接接近。
- 依據申請專利範圍第7項所述之半導體封裝,其中該第一接地連接在該中介層內被走線到該第二接地連接;以及該第一電源連接在該中介層內被走線到該第二電源連接。
- 依據申請專利範圍第7項所述之半導體封裝,其中該第一接地連接和該第一電源連接係分別安裝在面向相對的該第一半導體晶粒和該第二半導體晶粒的那一內側;以及該第二接地連接和該第二電源連接係分別沿著該中介層的一側安裝,該側與面向相對的該第一半導體晶粒和該第二半導體晶粒的那一內側實質上彼此垂直。
- 依據申請專利範圍第7項所述之半導體封裝,其中該電氣接地的結構包括環形結構,並且該電氣接地圍繞該第一半導體晶粒和該中介層。
- 依據申請專利範圍第1項所述之半導體封裝,其中該中介層作為一電容器或一電感器。
- 依據申請專利範圍第1項所述之半導體封裝,其中該中介層包括一球閘陣列(BGA)基底材料及一矽晶粒中之至少一者。
- 依據申請專利範圍第1項所述之半導體封裝,其中該晶粒座被曝露,以提供溫度調節。
- 依據申請專利範圍第1項所述之半導體封裝,更包括:一佈線,該第一半導體晶粒係透過該佈線直接連接至該第二半導體晶粒。
- 依據申請專利範圍第4項所述之半導體封裝,其中 該第一半導體晶粒包括特殊應用積體電路(ASIC);該第二半導體晶粒包括隨機存取記憶體;該第三半導體晶粒包括快閃記憶體;以及該第四半導體晶粒包括另一隨機存取記憶體。
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US8183687B2 (en) * | 2007-02-16 | 2012-05-22 | Broadcom Corporation | Interposer for die stacking in semiconductor packages and the method of making the same |
US7893545B2 (en) * | 2007-07-18 | 2011-02-22 | Infineon Technologies Ag | Semiconductor device |
US7675146B2 (en) * | 2007-09-07 | 2010-03-09 | Infineon Technologies Ag | Semiconductor device with leadframe including a diffusion barrier |
US8354742B2 (en) * | 2008-03-31 | 2013-01-15 | Stats Chippac, Ltd. | Method and apparatus for a package having multiple stacked die |
US8049339B2 (en) * | 2008-11-24 | 2011-11-01 | Powertech Technology Inc. | Semiconductor package having isolated inner lead |
-
2008
- 2008-04-17 US US12/105,235 patent/US7911053B2/en active Active
- 2008-04-18 WO PCT/US2008/060932 patent/WO2008137288A1/en active Application Filing
- 2008-04-18 TW TW097114373A patent/TWI390702B/zh active
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2011
- 2011-03-14 US US13/046,903 patent/US8518742B1/en active Active
Also Published As
Publication number | Publication date |
---|---|
US8518742B1 (en) | 2013-08-27 |
US7911053B2 (en) | 2011-03-22 |
US20080258291A1 (en) | 2008-10-23 |
TW200849544A (en) | 2008-12-16 |
WO2008137288A1 (en) | 2008-11-13 |
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