TWI368276B - Reversible leadless package and methods of making and using same - Google Patents

Reversible leadless package and methods of making and using same

Info

Publication number
TWI368276B
TWI368276B TW093125537A TW93125537A TWI368276B TW I368276 B TWI368276 B TW I368276B TW 093125537 A TW093125537 A TW 093125537A TW 93125537 A TW93125537 A TW 93125537A TW I368276 B TWI368276 B TW I368276B
Authority
TW
Taiwan
Prior art keywords
making
methods
same
leadless package
reversible
Prior art date
Application number
TW093125537A
Other languages
English (en)
Other versions
TW200520091A (en
Inventor
Shafidul Islam
San Antonio Romarico Santos
Original Assignee
Advanced Interconnect Tech Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Interconnect Tech Ltd filed Critical Advanced Interconnect Tech Ltd
Publication of TW200520091A publication Critical patent/TW200520091A/zh
Application granted granted Critical
Publication of TWI368276B publication Critical patent/TWI368276B/zh

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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4821Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4828Etching
    • H01L21/4832Etching a temporary substrate after encapsulation process to form leads
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    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/01Chemical elements
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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    • H01L2924/01015Phosphorus [P]
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2924/01027Cobalt [Co]
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
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    • H01L2924/181Encapsulation
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    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/1815Shape
    • H01L2924/1816Exposing the passive side of the semiconductor or solid-state body
    • H01L2924/18161Exposing the passive side of the semiconductor or solid-state body of a flip chip

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
TW093125537A 2003-08-26 2004-08-26 Reversible leadless package and methods of making and using same TWI368276B (en)

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EP (1) EP1668686A4 (zh)
JP (1) JP2007503721A (zh)
KR (1) KR20060121823A (zh)
CN (2) CN101587869B (zh)
TW (1) TWI368276B (zh)
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Families Citing this family (52)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005024937A1 (de) * 2003-09-05 2005-03-17 Rohde & Schwarz Gmbh & Co. Kg Elektronisches bauelement mit kühlfläche
US8319323B2 (en) * 2004-12-20 2012-11-27 Semiconductor Components Industries, Llc Electronic package having down-set leads and method
US7439100B2 (en) * 2005-08-18 2008-10-21 Semiconductor Components Industries, L.L.C. Encapsulated chip scale package having flip-chip on lead frame structure and method
US7943431B2 (en) 2005-12-02 2011-05-17 Unisem (Mauritius) Holdings Limited Leadless semiconductor package and method of manufacture
KR20060004885A (ko) * 2005-12-24 2006-01-16 최현규 반도체 패키지, 그 제조방법 및 이미지 센서용 반도체패키지 모듈
WO2007075007A1 (en) * 2005-12-24 2007-07-05 Hyun-Kyu Choi Semiconductor package, method of fabricating the same and semiconductor package module for image sensor
US7536233B1 (en) * 2006-01-30 2009-05-19 Advanced Micro Devices, Inc. Method and apparatus for adjusting processing speeds based on work-in-process levels
SG135074A1 (en) 2006-02-28 2007-09-28 Micron Technology Inc Microelectronic devices, stacked microelectronic devices, and methods for manufacturing such devices
US7816769B2 (en) 2006-08-28 2010-10-19 Atmel Corporation Stackable packages for three-dimensional packaging of semiconductor dice
US20080174981A1 (en) * 2007-01-24 2008-07-24 Chan Say Teow Pre-molded lead frame and process for manufacturing the same
US20080182434A1 (en) * 2007-01-25 2008-07-31 Analog Devices, Inc. Low Cost Stacked Package
CN101276762B (zh) * 2007-03-26 2010-07-21 矽品精密工业股份有限公司 多芯片堆叠结构及其制法
SG149726A1 (en) 2007-07-24 2009-02-27 Micron Technology Inc Microelectronic die packages with metal leads, including metal leads for stacked die packages, and associated systems and methods
MY154596A (en) 2007-07-25 2015-06-30 Carsem M Sdn Bhd Thin plastic leadless package with exposed metal die paddle
US20090091009A1 (en) * 2007-10-03 2009-04-09 Corisis David J Stackable integrated circuit package
JP2009094118A (ja) * 2007-10-04 2009-04-30 Panasonic Corp リードフレーム、それを備える電子部品及びその製造方法
US8097945B2 (en) * 2007-11-21 2012-01-17 Lynda Harnden, legal representative Bi-directional, reverse blocking battery switch
JP5358089B2 (ja) * 2007-12-21 2013-12-04 スパンション エルエルシー 半導体装置
US7888184B2 (en) * 2008-06-20 2011-02-15 Stats Chippac Ltd. Integrated circuit packaging system with embedded circuitry and post, and method of manufacture thereof
US8174099B2 (en) * 2008-08-13 2012-05-08 Atmel Corporation Leadless package with internally extended package leads
US7858443B2 (en) * 2009-03-09 2010-12-28 Utac Hong Kong Limited Leadless integrated circuit package having standoff contacts and die attach pad
US8349658B2 (en) 2010-05-26 2013-01-08 Stats Chippac, Ltd. Semiconductor device and method of forming conductive posts and heat sink over semiconductor die using leadframe
US9269691B2 (en) 2010-05-26 2016-02-23 Stats Chippac, Ltd. Semiconductor device and method of making an embedded wafer level ball grid array (EWLB) package on package (POP) device with a slotted metal carrier interposer
US8743207B2 (en) * 2010-07-27 2014-06-03 Flir Systems Inc. Infrared camera architecture systems and methods
US9472427B2 (en) 2011-03-22 2016-10-18 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming leadframe with notched fingers for stacking semiconductor die
US8558369B2 (en) * 2011-03-25 2013-10-15 Stats Chippac Ltd. Integrated circuit packaging system with interconnects and method of manufacture thereof
US8786068B1 (en) * 2011-07-05 2014-07-22 International Rectifier Corporation Packaging of electronic circuitry
US8643166B2 (en) 2011-12-15 2014-02-04 Stats Chippac Ltd. Integrated circuit packaging system with leads and method of manufacturing thereof
WO2014006724A1 (ja) * 2012-07-05 2014-01-09 三菱電機株式会社 半導体装置
US9559039B2 (en) 2012-09-17 2017-01-31 STATS ChipPAC Pte. Ltd. Semiconductor device and method of using substrate having base and conductive posts to form vertical interconnect structure in embedded die package
EP2934643A1 (en) 2012-12-18 2015-10-28 Koninklijke Philips N.V. Motion stabilizer system for respiratory interface device
CN205159286U (zh) 2012-12-31 2016-04-13 菲力尔系统公司 用于微辐射热计真空封装组件的晶片级封装的装置
US9165878B2 (en) 2013-03-14 2015-10-20 United Test And Assembly Center Ltd. Semiconductor packages and methods of packaging semiconductor devices
US9087777B2 (en) 2013-03-14 2015-07-21 United Test And Assembly Center Ltd. Semiconductor packages and methods of packaging semiconductor devices
ITMI20130473A1 (it) 2013-03-28 2014-09-29 St Microelectronics Srl Metodo per fabbricare dispositivi elettronici
JP2015035554A (ja) * 2013-08-09 2015-02-19 住友電工デバイス・イノベーション株式会社 半導体装置
CN110379718A (zh) * 2014-10-24 2019-10-25 意法半导体股份有限公司 具有改进电可接入性的封装结构的电子装置和制造方法
US9379087B2 (en) * 2014-11-07 2016-06-28 Texas Instruments Incorporated Method of making a QFN package
KR101718321B1 (ko) * 2014-12-23 2017-03-21 인텔 코포레이션 패키지 온 패키지 제품을 위한 와이어 리드를 포함하는 적층 패키지 어셈블리, 컴퓨팅 디바이스 및 집적 패키지 설계 방법
US9802813B2 (en) * 2014-12-24 2017-10-31 Stmicroelectronics (Malta) Ltd Wafer level package for a MEMS sensor device and corresponding manufacturing process
CN104821306A (zh) * 2015-04-28 2015-08-05 上海凯虹科技电子有限公司 超小型封装方法及封装体
WO2017189367A1 (en) * 2016-04-29 2017-11-02 Uniqarta, Inc. Connecting electronic components to substrates
US10153424B2 (en) 2016-08-22 2018-12-11 Rohm Co., Ltd. Semiconductor device and mounting structure of semiconductor device
JP6597541B2 (ja) * 2016-09-26 2019-10-30 株式会社村田製作所 電子部品
US11273276B2 (en) 2016-10-04 2022-03-15 ResMed Pty Ltd Patient interface with movable frame
US10199312B1 (en) 2017-09-09 2019-02-05 Amkor Technology, Inc. Method of forming a packaged semiconductor device having enhanced wettable flank and structure
US11069601B2 (en) * 2018-02-27 2021-07-20 Stmicroelectronics, Inc. Leadless semiconductor package with wettable flanks
CN109119396A (zh) * 2018-09-14 2019-01-01 上海凯虹科技电子有限公司 引线框架及采用该引线框架的封装体
US11094656B2 (en) 2018-12-31 2021-08-17 Texas Instruments Incorporated Packaged semiconductor device with electroplated pillars
NL2027540B1 (en) 2021-02-11 2022-09-12 Sencio B V Semiconductor Lead-on-Chip Assembly
JP2023071300A (ja) * 2021-11-11 2023-05-23 新光電気工業株式会社 半導体装置
US20230335474A1 (en) * 2022-04-18 2023-10-19 Alpha And Omega Semiconductor International Lp Semiconductor power module package having lead frame anchored bars

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5608262A (en) * 1995-02-24 1997-03-04 Lucent Technologies Inc. Packaging multi-chip modules without wire-bond interconnection
KR100290993B1 (ko) * 1995-06-13 2001-08-07 이사오 우치가사키 반도체장치,반도체탑재용배선기판및반도체장치의제조방법
US6201292B1 (en) * 1997-04-02 2001-03-13 Dai Nippon Insatsu Kabushiki Kaisha Resin-sealed semiconductor device, circuit member used therefor
JP3461720B2 (ja) 1998-04-20 2003-10-27 松下電器産業株式会社 樹脂封止型半導体装置
US6498099B1 (en) * 1998-06-10 2002-12-24 Asat Ltd. Leadless plastic chip carrier with etch back pad singulation
JP3482888B2 (ja) * 1998-10-12 2004-01-06 松下電器産業株式会社 樹脂封止型半導体装置およびその製造方法
KR100526844B1 (ko) * 1999-10-15 2005-11-08 앰코 테크놀로지 코리아 주식회사 반도체패키지 및 그 제조방법
US6483180B1 (en) * 1999-12-23 2002-11-19 National Semiconductor Corporation Lead frame design for burr-free singulation of molded array packages
JP2001185651A (ja) * 1999-12-27 2001-07-06 Matsushita Electronics Industry Corp 半導体装置およびその製造方法
JP3730469B2 (ja) * 2000-01-21 2006-01-05 新電元工業株式会社 樹脂封止型半導体装置及びその製造方法
KR20020086587A (ko) * 2000-03-09 2002-11-18 후지쯔 가부시끼가이샤 반도체 장치 및 그 제조 방법, 및 리드 프레임 및 그 제조방법, 및 리드 프레임을 사용한 반도체 장치의 제조 방법
TW473965B (en) * 2000-09-04 2002-01-21 Siliconware Precision Industries Co Ltd Thin type semiconductor device and the manufacturing method thereof
US6281047B1 (en) * 2000-11-10 2001-08-28 Siliconware Precision Industries, Co., Ltd. Method of singulating a batch of integrated circuit package units constructed on a single matrix base
US6337510B1 (en) * 2000-11-17 2002-01-08 Walsin Advanced Electronics Ltd Stackable QFN semiconductor package
US20020110956A1 (en) 2000-12-19 2002-08-15 Takashi Kumamoto Chip lead frames
US6551859B1 (en) * 2001-02-22 2003-04-22 National Semiconductor Corporation Chip scale and land grid array semiconductor packages
SG120858A1 (en) * 2001-08-06 2006-04-26 Micron Technology Inc Quad flat no-lead (qfn) grid array package, methodof making and memory module and computer system including same
SG111919A1 (en) * 2001-08-29 2005-06-29 Micron Technology Inc Packaged microelectronic devices and methods of forming same
JP2003249604A (ja) * 2002-02-25 2003-09-05 Kato Denki Seisakusho:Kk 樹脂封止半導体装置およびその製造方法、樹脂封止半導体装置に使用されるリードフレーム、ならびに半導体モジュール装置
US6812552B2 (en) * 2002-04-29 2004-11-02 Advanced Interconnect Technologies Limited Partially patterned lead frames and methods of making and using the same in semiconductor packaging
US6713317B2 (en) * 2002-08-12 2004-03-30 Semiconductor Components Industries, L.L.C. Semiconductor device and laminated leadframe package
US6723585B1 (en) * 2002-10-31 2004-04-20 National Semiconductor Corporation Leadless package
US7071545B1 (en) * 2002-12-20 2006-07-04 Asat Ltd. Shielded integrated circuit package
US7378300B2 (en) * 2005-09-22 2008-05-27 Stats Chippac Ltd. Integrated circuit package system

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CN1842906A (zh) 2006-10-04
EP1668686A2 (en) 2006-06-14
WO2005022591A3 (en) 2005-10-20
US20100221872A1 (en) 2010-09-02
JP2007503721A (ja) 2007-02-22
CN101587869A (zh) 2009-11-25
TW200520091A (en) 2005-06-16
US7709935B2 (en) 2010-05-04
US8058104B2 (en) 2011-11-15
WO2005022591A9 (en) 2005-06-02
CN101587869B (zh) 2011-04-13
WO2005022591A2 (en) 2005-03-10
EP1668686A4 (en) 2006-09-13
KR20060121823A (ko) 2006-11-29
US20070111374A1 (en) 2007-05-17
CN100514580C (zh) 2009-07-15

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