TWI358831B - Active matrix electronic array device - Google Patents

Active matrix electronic array device Download PDF

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TWI358831B
TWI358831B TW094120040A TW94120040A TWI358831B TW I358831 B TWI358831 B TW I358831B TW 094120040 A TW094120040 A TW 094120040A TW 94120040 A TW94120040 A TW 94120040A TW I358831 B TWI358831 B TW I358831B
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layer
thin film
patterned
heater element
substrate
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TW200631179A (en
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Peter W Green
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Tpo Hong Kong Holding Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • H01L27/1296Multistep manufacturing methods adapted to increase the uniformity of device parameters
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • H01L27/127Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
    • H01L27/1274Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
    • H01L27/1281Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor by using structural features to control crystal growth, e.g. placement of grain filters
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • H01L27/127Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
    • H01L27/1274Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
    • H01L27/1285Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor using control of the annealing or irradiation parameters, e.g. using different scanning direction or intensity for different transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/6675Amorphous silicon or polysilicon transistors
    • H01L29/66757Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651Silicon transistors
    • H01L29/7866Non-monocrystalline silicon transistors
    • H01L29/78672Polycrystalline or microcrystalline silicon transistor
    • H01L29/78675Polycrystalline or microcrystalline silicon transistor with normal-type structure, e.g. with top gate

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)
  • Recrystallisation Techniques (AREA)

Description

1358831 九、發明說明: 【發明所屬之技術領域】 本發明係關於一種用於對提供於感熱性基板上之半導體 膜之熱處理的方法及設備。詳言之,本發明係關於用於液 晶顯示器(LCD)或有機發光二極體顯示器(OLED)之多晶矽 薄膜電晶體在玻璃基极上之形成。 【先前技術】 主動矩陣液晶顯示器(LCD)及有機發光二極體顯示器 (OLED)使用具有提供於一玻璃基板上之薄膜電晶體(TFT) 之主動矩陣電路。亦有提議在塑料基板上形成該等裝置之 主動面板。 主動矩陣LCD通常使用非晶矽(a-Si)TFT,儘管近來存在 對使用多晶矽(p〇ly-Si)之TFT之許多興趣及發展。此使用 多晶矽TFT之技術可提供較高影像解析度,且亦可允許周 邊驅動電路整合至像素陣列之基板上。對於諸如OLED之 電流定址顯示器而言,多晶矽TFT提供更好的電流驅動性 能。 在電流玻璃基板上製造多晶矽裝置之主要困難為用於自 一經沉積的非晶矽層形成結晶半導體層之熱處理方法及植 入摻雜物之活化。當玻璃相當長時間地在高於攝氏500度 之溫度下曝露時,其易於變形。 已為經沉積的非晶矽層之結晶研究了各種熱處理方法。 固相結晶(SPC)為一種用於結晶非晶矽之通用方法。在 此方法中,非晶矽在接近攝氏600度之溫度下經受為期若 102547.doc 1358831 干小時之久的熱處理。此方法可導致玻璃基板之損壞。詳 言之’若將使用低成本玻璃基板,則會因為溫度太高而無 法使用’否則若在相對低的溫度下完成退火,則退火時間 會過長》 雷射處理方法可在較低溫度下操作,例如準分子雷射結 晶及金屬誘導結晶。準分子雷射結晶使用毫微秒雷射脆衝 以將非晶石夕溶融並固化成一結晶形式。理論上,此提供在 最佳溫度下退火非晶矽而不降級非晶矽安裝於其上之玻璃 • 基板之可能性。然而,此方法在用於大規模生產中具有嚴 重缺陷。遍及此方法之多晶矽膜之晶粒結構對雷射束能量 極其敏感,使得晶粒結構中之均一性及(因此)裝置特徵不 可達成。又,雷射束之尺寸相對較小。小的束尺寸需要多 個雷射通道或多次發射以為大尺寸玻璃完成結晶過程。由 於難以精確控制雷射,故多次發射將非均一性引入結晶過 程中。 金屬誘導結晶過程涉及將諸如Ni、Pd、Au、Ag及Cu之 ^各種金屬元素添加至非晶矽膜上,以增強結晶動力。使用 此方法使得在低於攝氏6〇〇度之低溫下能夠結晶。然而, 此方法丈限於多晶矽之差結晶品質及金屬污染物。金屬污 染物導致在多晶矽TFT之操作中之不利漏電流。此方法之 另一問題為在結晶過程中金屬矽化物之形成。 熱處理亦用於摻雜物沉積後之退火階段中摻雜物之活 化。又’準分子雷射退火可用於此目的,或已提議一所謂 的快速熱退火製程。此製程使用較高溫度而只需較短持續 J02547.doc 1358831 時間。一諸如鶴鹵素或Xe弧光燈之光學加熱源經常用作熱 源。然而,此可導致非吾人所樂見之玻璃基板之過度加 熱。 更多近來的公開案已展示可使用製造於電晶體結構上之 整合金屬加熱器元件自非晶矽形成多晶矽。舉例而言,參 考 Y. Kaneko等人之論文”PoiycrysuiHne silicon Thin-Film Transistors Fabricated by Rapid Joule Heating Method", IEEE EDL,第24卷’第9期’第586頁(2003)。亦參考t. _ Sameshima 4 人之論文"Rapid crystallization of silicon films using Joule heating of metal films", App. Phys. A, A 73 ’ 第 419-423頁(2001)。 在此等提議中’一介電層將一薄膜加熱器與非晶矽隔 離。電流以(例如)1〇至100微秒之脈衝通過加熱器元件,其 足夠熔融下方的非晶矽。然而,基板保持冷卻,使得該過 程有效地為一低溫過程。加熱器亦用於活化植入的源極及 沒極摻雜物。 • 此等過程涉及藉由-沉積於非晶矽層上之薄膜加熱配置 來處理非矽晶層。在加熱過程完成後,移除界定加熱配置 之層,且該裝置以習知方式完成。 【發明内容】 根據本發明,提供一種主動矩陣電子陣列裝置,其包含 J $列’每—裝置元件包含至少-個薄膜電晶 體’其中該裝置包含: ~基板; 1〇2547.d〇c 1358831
*丁礼1 , 一提供於該加氧器元# gjig μ 兀仵配置上之電性絕緣層;及 界定該等薄膜電晶體且提供於電性絕緣層上薄 膜層,該等薄膜層包含-半導體層,且其中界定該等薄: 電晶體之半導體層之至少部分係提供於該加熱器元 上。
本發明之裝置具有一整合至該裝置之結構中之加轨配 置。,由於該加熱配置提供於裝置元件之下,故其可保持在 適當位置處’藉此避免在該處理過程中移除加熱器元件配 置之層的需要。此簡化了製造過程。使用局部化加熱避免 對昂貴的雷射處理技術之需要。 該等加熱器亦可在該裝置的使用期中保持於完成的裝置 中牛例而σ [展示由熱載流子注入引起之tft降級可 藉由退火來反轉(至少部分地反轉)。藉由加熱τρτ,可能 延長其壽命並因此延長陣列裝置之壽命。
另外,畲製造自對準低溫多晶矽(LTps)TFT時,通道接 面之源極/汲極摻雜物會非常陡峭。由於閘極導體在雷射 過私中充當-遮罩’故摻雜水平中之此陡惰程度不能藉由 摻雜物之雷射活化而擴展至任何極大的程度。摻雜水平中 之此陡峭變化導致TFT之汲極處的高場(high fieId),從而 導致在裝置之整個使用期中工作電壓減小。 為了有助於降低高的汲極場且因此向上擴充可使用τρτ 之工作電壓之範圍,可藉由使用本發明之加熱器元件來達 成接面擴展。 102547.doc

Claims (1)

  1. 丄 _ 100年7月27日補充修正_替 、申請專利範圍·· -- -種主動矩陣電子陵列萨置H g‘十替換頁 卜 平夕j裒罝其包含於ϋ件,之 )每裝置70件包含至少—個薄膜電晶體(34),其 中該裝置包括: 签取(12) =1供於該基板上之薄料電加熱H元件配置(1〇); -提供於該加熱器元件配置(10)上之電性絕緣層 (16);及 、> I疋4 H膜電晶體並提供於該電性絕緣層(16)上之 复數個薄膜層’該等薄膜層包含一半導體層(18),且其 中界定4等溥膜電晶體之該半導體層(1 8)之至少部分係 提供於該加熱器元件配置(10)上; 八中4加熱器元件配置包含:一第一圖案化金屬層, 其經圖索化成多個區域以提供局部加熱;及一第二圖案 化透月導電層,其用於提供電連接至該第.一圖案化金屬 層之該等區域。 月长項1之裝置,其中該基板(12)包含一玻璃基板。 月東項1之裝置,其中該基板(】2)包含一塑料基板。 4’ 士幻述5青求項中任一項之裝置,其尹該電性絕緣層(I 6) 包3 —個氧化物或氳化物層。 5. I月求们、2或3令任一項之裝置其中該加熱器元件 配置。〇)包含—圖案化金屬層。 '、貝5之裝置’其中該金屬層包含一銅或鉑層。 7. ·如請求jg 1 、』、2或3中任一項之裝置,其中該半導體層(18) 8. 100年7月27日補充修正_替換頁 ----- ?瓣換頁 Lioom— 項之裝置,其中該半導體層 已由該加熱器元件配置(10) 9. 10. 11. 包含非晶矽 如請求項1 (1 8)包含多 實現》 、2、或3中任一 晶矽,其中結曰 如請求項1、 顯示裝置。 或中任一項之裝置其包含一主動矩陣 如5月求項9之裝置,其句冬 ^ ^ /、匕a —主動矩陣液晶顯示裝置。 一種製造一主動矩陳 _ 皁電子陣列裴置之方法,該裝置包含 裝置元件之一陣列,每一驻¥ Α人 裝置兀件包含至少一個薄膜電 晶體’該方法包含: 於—基板(12)上形成—薄膜導電加熱器元件配置 ()“中幵y成一溥膜導電加熱器元件配置包含:圖案 化一金屬層,其經圖案化成多個區域以提供局部加熱; 及圖案化—透明導電層,其用於提供電連接至該圖案化 金屬層之該等區域; 於該加熱器元件配置⑽上形成一電性絕緣層〇6); 於該電性絕緣層上形成一或多個層’其包含至少一非 晶矽半導體層(1 8); 加熱該半導體層(18)以結晶該層之至少部分從而形成 多晶石夕;及 形成另外的層,藉此界定該等裝置元件。 一種操作一主動矩陣電子陣列裝置之方法,該裝置包含 裝置元件之一陣列,每一裝置元件包含至少一個薄膜電 晶體’該方法包含: 12. 100年7月27日補充修正_替換頁 在該裝置穿诰德^ • 的使用期中,使用-提供於該等薄膜 ^曰Γ34)之下並整合至該褒置之薄膜結構中之薄膜導 ;器元件(1°),以執行該等薄膜電晶體⑽之加 丄中形成該薄膜導電加熱器元件配置包含:圖案化- 宰屬層,其經圖案化成多個區域以提供局部加熱;及圖 茱化—透明導電層,其用於提 層之”㈣。 4連接至該圖案化金屬 月戈項12之方法,其中該加熱係^ ^ ^ ^ ^ ^ 晶體之電屋臨限漂移。 口減小非日“夕電 =項SIT其中該加熱係執行以調整薄膜電晶 •攻,使其自非日日矽形成多晶矽。
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