TWI351604B - - Google Patents

Description

1351604 IX. Description of the Invention: [Technical Field] The present invention relates to the field of semiconductor storage, and more particularly to a flash memory (four) sh, which is a flash memory that can equalize the loss of a flash memory block. Block management method. [Prior Art] Flash memory is more and more widely used because of its high density, large capacity, low read and write time-consuming, non-volatile (n()n_v. secret e). Various fields; at the same time, some of the drawbacks of the flash memory chip itself limit the application of such memory. First, due to the special write and block erase features of the flash memory chip, some special operations of the memory are caused. Generally, the write operation of the flash memory is: in the target block that needs to be cut in this operation. The old data (data, the mainland is called the data) is read out, put into the RAM (random access memory), and then the target block is erased. Since the memory chip block is in accordance with the page (also called the page) ) Write sequentially 'so m writes the old data arranged in the front of the block in the block to the target block after erasing, then writes the new operation data, and then puts the target block in the subsequent order. Data is written, and finally the block management is poor; in such a complicated operation, there is a possibility that unrecoverable errors may occur, such as 'eyes'; during the block erasing process, the system is powered down, and the data of the target block is not processed. Can be written back in time, the mapping table information is not updated, the original old data becomes invalid data. On the other hand, the general flash memory has a lifetime of use, which is determined by the storage principle of the flash memory unit itself. The operation mode of the flash memory unit is usually 5 1351604 will be stored first. Single it's floating gate (Fk) atlng Gate) discharge is also often said to erase, to a common state 'and then in the process of writing data, then charging the floating gate is also often said programming, so that They reach the required state of storing data. During the repeated erasing and programming process, the electrons captured by the floating pole due to the tunneling effect gradually increase. When reaching a certain level, if you want to charge the floating pole, you need a larger one. (4) At this time, that is, the flash memory chip we are talking about has ended its life cycle. The number of erasing or reprogramming of the NOR flash memory is generally tens of thousands of times, and the number of NAND flash memory erasing or reprogramming is generally about 100,000 times. The above is only a theoretical average. In practical applications of flash memory chips, the actual lifetime of flash memory devices is much lower than this theoretical value*> the main reason is the flash memory chip block. The frequency of operation is different. The frequency of some flash memory blocks being erased or reprogrammed is relatively high, which causes the operation to be broken quickly. When the bad blocks reach a certain cumulative amount, the flash memory The body chip can no longer be used, then the flash memory device ends its life, and some blocks are not often operated until 'even until the storage device is used up, and it has not been operated a few times' It will cause a lot of waste. At present, the general flash memory production manufacturers will use a part of the space in the flash memory chip to replace these bad blocks, but this method can only properly extend the flash 5 'Not being able to fully use these flash memory blocks' wastes a lot of flash memory resources. Chinese invention patent application "Flash Media Data Protection Method" (Application No. 03137423) discloses a flash memory 6 memory medium data writing method, the block data is moved to a case containing the current write operation target can be two and the operation process Through the address (a comparison table = block = block addressing, the purpose of the invention is to protect the data broadcast in the flash memory medium while writing the data in the S method]. Contents] Shanling = The purpose of the invention is to provide a block management method that can effectively prolong the use of π-time flash § 己 recall. The technical problem solved by the zone = month is to propose a flash memory. The method ^ can make the flash memory loss more balanced to effectively extend and further improve the flash memory operating speed and data security. To achieve the above object, the present invention adopts the following technical solution: From a flash memory The block management method, the flash memory includes: if a block 'each block is composed of a plurality of pages, each page is divided into data storage items and a plurality of areas', characterized in that. Delimiting - a block or a multi-block as a reserved area of the address mapping table in the block, and storing an address mapping table of a logical address and a physical address of the flash memory block in units of pages; initially selecting one The white block is used as the swap block, and the address mapping table entry of the swap block is established in the redundant area of the address mapping table of the address mapping table; when the write operation is performed, the new data is added according to the address mapping table information. And/or the old y material of the operated target block is correspondingly written into the swap block, the target block is erased, and then the physical address and the target area corresponding to the logical block address of the swap block in the address mapping table are The physical address of the block logical address is interchanged. Further, the address mapping table information updated by each operation is saved to a page of the reserved area of the address mapping table, and is updated according to a predetermined rule as the number of operations increases. The pages of the address mapping table reserved area are cyclically saved. Preferably, the updated address mapping table information is saved in the next page of the reserved area of the address mapping table, and increases with the number of operations. The address mapping table retaining area One page to the last page is stored cyclically. Preferably, the write operation includes the following steps: 1) reading the address mapping table information in the reserved area of the address mapping table 丨 2) according to the address mapping table and the Save the redundant area of the address mapping table page to record information, to determine whether the last operation ended normally; 3) If it ends abnormally, enter the exception handling program; if it is normal, then enter the data writing step; 4) Write data First, the old data in the target block in the target block is first written into the parent swap block, and then the new data of the current operation is written into the swap block, and then the remaining old data is written into the swap block; 5) The target block is erased; 6) the physical address corresponding to the logical address of the swap block in the address mapping table is exchanged with the physical address corresponding to the logical address of the target block; 7) the updated address mapping table and The swap block address mapping table entry is respectively stored in the data storage area and the redundant area of the next page of the address mapping table reserved area, and the exception handling program may include: determining whether the data is being written to the swap block Power down 'if it is then The swap area 1351604 in which the partial content is written is erased. The exception handling program may further include determining whether the power is lost during the target block erasing, and if so, erasing the target block, and then swapping the area The data of the block is copied to the target block, and finally the swap block is erased. The exception handling program may further comprise: determining whether the power is lost during the update of the address mapping table, and if so, finding the target block and the swap block of the last operation according to the information of the address mapping table and the corresponding redundant area. Then, copy the data of the swap block to the target block and erase the swap block.

Further, a parameter seed is established, the value of which is related to the number of cycles in which the address mapping table saves the page save location, and corresponds to the logical address of the set flash memory block, when the seed value changes, according to The address mapping table information is written into the swap block by the data of the flash memory block corresponding to the corresponding logical address, and the physical address corresponding to the logical address of the swap block in the address mapping table is The physical address of the corresponding logical address of the seed value is interchanged.

Preferably, the redundant area of the address mapping table page when the address mapping table is updated is preferably set to a loop parameter N, and the seed value is added every time the address mapping table saves the loop of the page save position N times. i. Preferably, the storage location of the address mapping table is counted as one cycle per time to the first page of the reserved area of the (four) address mapping table. The seed value may also be used to determine the lossy production of the flash memory. (4) The memory is a flash memory chip or a flash memory array including a plurality of flash memory chips. 9 1351604 The beneficial technical effect of the present invention lies in that the flash memory block management method of the present invention By mapping the address mapping table reserved area in the flash memory block, saving the logical address and physical address mapping table of the flash memory block, and establishing an exchange in the redundant area of the address mapping table save page The address mapping table entry of the block, in the write operation, according to the address mapping table information, the data is correspondingly written into the swap block, the target block is erased, and then the logical block address of the swap block in the mapping table page is The corresponding physical address is interchanged with the physical address corresponding to the logical address of the target block of the write operation. This block management method is equivalent to discretely mapping the physical bit & to the logical address of the flash memory block, although Host The file system's call to the flash memory logical address is unbalanced during operation, but the mapping from logical address to physical address is disrupted. This kind of address mapping is a dynamic=changing correspondence. It can realize the operation of distributing the operation to the actual physical flash memory block in the reference and management, so that the service life of the flash memory can be effectively extended. Forcibly pushing the corresponding flash memory block of the seed value size into the above-mentioned management process of implementing the address equalization call. 'As the seed value increases, all the blocks are successively pushed into the wear leveling operation' effectively The invention avoids the appearance of dead blocks that do not participate in wear leveling. The present invention only dynamically maintains one swap block in a flash memory chip 'at the same time, the swap block has an independent swap block map address save area' The method of separating the exchange block information can effectively reduce the time for the flash memory chip to find the swap block, and exchange the block information 10 1351604 Recorded in the redundant area, without occupying the data area, saving operation time and saving space. The invention writes money in the data operation, first writes part of the old data of the target block to the exchange block, and then writes the new data to the exchange. Block, then 'write the remaining old data to the swap block, and then erase the target block. In such a process, the erase operation is completed at the end of the entire operation, even if an abnormal situation occurs, Retain valid #materials and provide clues to achieve recovery of normal data.

[Embodiment] The foregoing and other technical contents, features, and advantages of the present invention will be apparent from the following detailed description of the preferred embodiments. As shown in FIG. 1 , the flash memory storage device 20 mainly includes a interface 20 interface controller 2 快 2, a flash memory controller 2 〇 3, and ^

Therefore, the memory chip array 204 can be efficiently saved. The interface controller 202 typically includes a microcontroller (MCU) and (four) (Finnware). The flash memory device 2 receives the operation command sent by the job application 21 through the interface 2G1, and then the interface 201 transmits the command to the interface controller 2〇2, which is added by the interface controller and the micro control. The host parses the host command into the underlying operation command, and then sends it to the flash memory controller 2〇3, and finally the flash memory controller 203 parses the command flash memory (4) money to (4) the flash memory chip array The operation of the program. The handle body parses the host command into the underlying operation command, which includes its management method for the flash memory chip block. Before managing a flash memory chip, it is first divided into 11 1351604 regions. A typical flash memory chip array 204 includes a plurality of rows and columns of flash memory chips. Each flash memory chip is generally read and written in units of pages, and each page includes 2 to 48 bytes of data storage. Zone and 64Byte redundant area, each 64 pages form a block (Bi〇ck), the number of each flash memory chip block depends on the size of the chip memory space, this description is mainly a single flash memory The body chip storage space is within 64MByte, when the storage space is above 64_pun, each

64MByte has an address mapping table reserved area, and the operation method is similar to a single 64MByte. The method for managing the block of the present invention is to realize the following three aspects: one is to minimize the fast memory erasing or reprogramming operation, thereby reducing the number of loss of the flash memory chip; the second is to try to reduce the number of flash memory chips; The addition or reprogramming operation is evenly distributed to all flash memory blocks, which means that the flash memory blocks have the same probability of operation; the third is to provide a safe block management method and system strategy. , can ensure fast flash

The security of the memory data. The present invention takes into consideration the above three aspects, and mainly includes two methods of dynamic equalization and static equalization in the implementation process. A flowchart of an embodiment of the present invention is shown in Figure 6, which includes dynamic equalization and static equalization of the block management of the present invention. The following is a description of two specific implementations: In the implementation process of the present month, an address map is first established for each flash memory chip to maintain (4) the L bit of the memory block in the file system. The mapping between the address and the actual physical address in the flash memory chip is 12!3516〇4; secondly, in each flash memory chip, a block address table reserved area is reserved to hold this bit. Address mapping table, the size of the reserved area of the address mapping table is related to the lifetime of the data area design of the flash memory chip. 'The updated address mapping table is saved in one page at a time, and the updated address mapping table in this example. Save the data storage area of this page; next, initialize the mapping relationship, and then, in the data area, select a blank block as the exchange block and separately establish an address mapping entry of the exchange block, save each The redundant area of the address mapping table page is saved. As shown in FIG. 2 and FIG. 3, a flash memory chip 1 is divided into a plurality of blocks, and one or several blocks are selected as needed to be allocated to the address mapping table. The number of blocks in the 2' block is designed by the design. (4) Determine the life of the storage device, and ensure that the lifetime of the address mapping table & 2 is longer than the life of the data area. In the example of the figure, two blocks are divided into the address mapping table reservation area 2. Each block includes 64 pages, and the mapping table after each operation is saved in a page. The mapping table mainly records the logical bits & (hereinafter referred to as LBA) and physical addresses (hereinafter referred to as LBA). The correspondence between pBA and hereinafter (referred to as Figure 3). Page 3 of Figure 2 is the current mapping table reserved area operation page, Figure 3 is an enlarged view of page 3, which is the main record information of the mapping table, and the data storage area* records any block of the flash memory crystal 1 The mapping relationship between the LBA and the PBA (refer to the address mapping table), the redundant area 5 records the address mapping entry of the swap block in the flash memory crystal i. In addition, this flash memory chip! The remaining block is used as a data area, and a blank block is divided therefrom as a parent swap block during operation. The dynamic equalization described in the embodiment of the present invention includes the following steps: First, when the write operation of the flash memory chip i is performed, the old data of the current operation target area & middle position is written into the exchange area. Block, secondly, write the current data to the swap block, and then write the remaining old data to the swap block, and then erase the target block of the write operation; then, the PBA corresponding to the LBA of the target block, The pBA corresponding to the LBA of the swap block is exchanged; finally, the updated ticket block address mapping table and the swap block address mapping table are respectively stored in the address map of the reserved flash memory crystal β! The data storage area 4 and the redundant area 5 of one page in the table reserved area 2. • Fig. 4 is a diagram showing a dynamic equalization management method for realizing the flash memory loss equalization of the present embodiment. Page 6 is the page that holds the address mapping table information in the current operation. The mapping relationship 8 is a mapping relationship between the LBA and the PBA of the current operation switching block located in the redundant area. The mapping relationship 7 indicates the mapping relationship between the LBA and the PBA of the current operation target block. Reference numerals 9 and 1 denote the PBA of the current operation target block and the exchange block, respectively, and refer to the actual position in the (4) memory wafer field i. When performing a write operation, the thin body φ of the interface controller 2〇2 first puts the address mapping table recorded in the address storage table of the flash memory in the reserved area 2, and includes the target block address mapping table. And the address mapping table entry of the swap block, according to the correspondence between the LBA and the pBA recorded in the address mapping table, according to the order of the data pages in the target block, first write the old data in the order of the operation target block first. Enter the corresponding position in the swap block and then write the operation. _ data to the location corresponding to the swap block. Then, write the remaining old data to the swap block, and then, the physics corresponding to the logical address of the target block of the operation. The block is erased. Then, the physical address corresponding to the logical address of the swap block is exchanged with the physical bit 14 1351604 corresponding to the logical address of the operation target block. Finally, after all operations are completed, The updated mapping entry is saved to the next physical page in the address mapping table reservation area 2 before power down. In the dynamic equalization process, in order to ensure that the address mapping table of the storage address mapping table retains the area 2 without causing premature failure due to repeated operations, it is generally assigned a plurality of blocks' to be cyclically stored in accordance with the order of the PBA. Through dynamic equalization, it is basically guaranteed that blocks can be averaged.

In the data writing operation of the present invention, the erasing operation is completed at the end of the entire operation', even if an abnormal situation occurs, the exception handling program can retain the valid data and provide clues to restore the normal data. The exception handling and processing mode handled by the exception handler is as follows: If the data is in the process of writing to the swap block, the device is illegally powered down; since the operation is not completed, the address mapping table is not updated. After the operation is normal, the original bead material can still be read through the address mapping table. Only the swap block in the address mapping table needs to be erased, so that the state before the operation can be restored.

β abnormal case 2: If all the data has been written to the swap block, but the device is illegally powered down during the target block erase process; due to the address mapping: no update, the read address mapping table finds the old data due to the last time Abnormal operation: deleted by the knife' and the swap block is non-empty due to the completion of the last data write operation, the object only needs to be based on these judgment conditions, and then the target block is erased' and then the data of the swap block is copied to the target area. Block, so that the witness block breaks the new data, and finally erases the swap block. ^ /, * Case 3: If the device is illegal during the update of the address mapping table, 15 1351604 power down, according to The information of the last address mapping table and the information of the intersection block recorded in the redundant area, find the target block and the swap block of the last operation. In this case, the target block is a blank block, and the swap block is Normal non-blank • The f block block only needs to judge (4) according to these judgments, then copy the data of the swap block to the target block, erase the swap block, and finally write the updated address map. The address mapping table is reserved. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 2 «The dynamic equalization method enables most of the flash memory blocks to be operated with the same probability, but there are also dead blocks that have never been operated. The so-called dead block refers to a flash memory block that has never been operated and does not participate in the loss equalization operation. The above-mentioned dynamic equalization cannot solve the problem, and therefore a static equalization method is proposed. In the address mapping table reserved area of the present invention, the 'address mapping table is sequentially stored in the block of the flash memory chip in units of pages. When a block is written once, it is written in the order of PBA. The next block is entered until the entire address mapping area is broken to complete the cycle - and then back to the beginning of the reserved area of the address mapping table. In general, the loop of the address map reservation area needs to perform a 64-times write operation of the number of blocks in the reserved area of the address mapping table. In the static equalization process, first establish a parameter 'name it as seed, and maintain the value of the seed in the following way. Each time the address mapping table is reserved, the loop of the reserved area is required. The value is incremented by 1 ' or set to a loop number of parameters N. When the loop is N times, the seed value is incremented by 1; then, the seed value is saved to the redundant area of the map table each time the map is updated. When the seed value changes, the strong 16 1351604 system copies the data corresponding to the physical value of the flash memory LBA corresponding to the seed value to the swap block, and the flash memory logical region corresponding to the swap block and the seed value. The block is subjected to dynamic balancing, and then erased and saved. Statically balanced mother-and-child will promote a logical block and forcefully participate in dynamic equalization. 'When there is a dead material in the flash memory, the dead block will be added to the management of this wear leveling as the seed gradually increases. When you join in, you will be assigned a balanced operation. In this embodiment, in addition to the dynamic equalization management method and the abnormal operation processing method in the embodiment, the above-described flash memory block static equalization management method is included. As shown in Fig. 5, in the present embodiment, the flash memory chip is preselected by two blocks as the address mapping table (four) area. The remaining blocks are classified as data area 12 in this example. During the current operation, the physical page bit saved by the address mapping entry is 13, and after the operation is completed, according to the general operation method, the firmware will add its physical address and then save it to the reserved block, but in the In this example, if the mapping table save page is written to the location 15 shown in the data area 12, in this example, the dynamic body will re-circulate the mapping table save page to the initial position, such as the position in the figure. . At the same time, each time such a loop operation is performed, or a loop parameter n is set, when the loop is performed N times, the seed value of the firmware maintenance (hereinafter referred to as the Seed value) is added to record the loop. The number of times or the loop parameter N, each time the Seed value is added, the firmware will force an operation to write the data of the physical address of the seed value of the Seed value to the swap block, and at the same time, the target area corresponding to the Seed value. The block is erased. Then, the physical address of the parent block is exchanged with the physical address of the block corresponding to the seed size of the seed value, and the block corresponding to the seed value is exchanged. Finally, The data block address mapping table entry is saved to the next physical page, and the swap block address mapping table is saved to the redundant area of the page. In doing so, it will forcibly push all the blocks into the wear leveling operation one by one, which can effectively avoid the occurrence of dead blocks that do not participate in the wear leveling. Fig. 6 is a flow chart showing the operation of the block management method of the flash memory of the present embodiment in combination with the foregoing two embodiments, and the write operation is taken as an example. First, in step 301, the address mapping information corresponding to the write operation in the reserved area of the address mapping table is read, and the address mapping table and the address mapping table entry in the page are included. Then, in step 3〇2, it is determined whether the last operation is normally ended according to the address mapping table and the target block and the swap block. If the determination in step 3〇2 is no, the exception handling procedure in step 3〇3 is executed (as described in the above-mentioned page 15 on line 11 to page 16 on line 6 for exception handling). If the determination in step 302 is YES, proceed to step 3〇4, copy the old data in the target block before the new data in the swap block, and then write the new data into the parent swap block, and then copy the target. The remaining old data in the block is in the exchange block. After step 3〇4 is over, continue with step 3〇s. In step 3〇5, the erase target block 'interchanges the physical address corresponding to the logical address of the swap block in the mapping table with the physical address corresponding to the logical address of the target block to update the address mapping table information n In the step rule to determine whether the condition of the Seed value plus i is met, whether the completion-secondary ring operation is 3 times N times, in detail, the bit = the page in the reserved area of the mapping table to be written to update the address mapping information is Page: or return to the first page for the Nth time. If the step rule determines that it is YES, in step 307, the updated address mapping table and the exchange block address mapping 18 1351604 table entries are respectively stored in the address mapping table reserved area - the page mapping table area and the mapping table A few intervals, and add 1 to the Seed value and perform static equalization (as described in the static equalization on line 8 to page 18, line 5 above) to effectively avoid the appearance of dead blocks that do not participate in wear leveling. If the step 3〇6 is negative, the updated address mapping table and the swap block address mapping table are respectively stored in the mapping table area and the mapping table redundant area of the next page of the address mapping table reserved area. To complete the write operation.

In summary, the block management method of the flash memory of the present invention uses a swap block to replace the target block to perform a write operation dynamic equalization method, and a static equalization method that performs a forced write operation with a Seed value change to force All blocks are added and the operation is evenly distributed to the flash memory blocks participating in the management' to make the flash memory loss more balanced to effectively extend its lifetime, thereby improving the operating speed of the flash memory and Data security.

However, the above is only the preferred embodiment of the present invention, and the scope of the invention is not limited thereto, that is, the simple equivalent change and modification according to the scope of the patent and the description of the invention in the present invention. All remain within the scope of the invention patent. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic structural view of a flash memory storage device. Figure 2 is a schematic diagram showing the division of the flash memory chip in the present invention. Figure 3 is an enlarged view of the page 3 of Figure 2. Dynamic picture in the present invention, embodiment of the block management method for flash memory invention 19 1351604

FIG. 5 is a schematic diagram of static equalization in an embodiment of a block management method for a flash memory according to the present invention. Fig. 6 is a flow chart showing an embodiment of a block management method of the flash memory of the present invention. 20 1351604 [Description of main component symbols] 20 flash memory storage device 201 interface 202 interface controller 203 flash memory controller 204 flash memory chip array 21 application program 1 flash memory chip 2 address mapping table retention Zone 3 page 4 data storage area 5 redundant area 6 pages 7, 8 mapping relationship 9 PBA of the target block 10 PBA of the exchange block 11 address mapping table reserved area 12 data area 13 address mapping table saved physical page Position 14, 15 position 301~309 steps

twenty one

Claims (1)

1351604 X. Patent application scope: 1·: A block management method for flash memory, the flash memory includes a right-hand block, the mother block is composed of a plurality of pages, and each page is divided into data storage. The area and the redundant area, the method comprises the steps of: delineating - block or multi-block as the address mapping table reserved area in the area filling, storing the logical address of the flash memory block in units of pages and An address mapping table of a physical address; initially selecting a blank block as a swap block, establishing a bit-drilling mapping entry of the swap block in a plurality of areas of the address mapping table; and writing the S In operation, according to the address mapping table information, the new data and/or the old data of the operated target block are correspondingly written into the swap block, the target block is erased, and then the swap area in the address mapping table is The physical address corresponding to the block logical address is interchanged with the physical address corresponding to the logical address of the target block. 2. The block management method of the flash memory according to item i of the patent application scope, wherein the information of the address mapping table updated in each operation is saved to a page of the reserved area of the address mapping table, and As the number of operations increases, it is cyclically saved in each page of the address mapping table reserved area according to a predetermined rule. 3. According to the block management method of the flash memory described in claim 2, wherein the updated rule is that the updated address mapping table information is saved to the next of the address mapping table reserved area. In the page, and as the number of operations increases, it is cyclically saved from the first page of the address mapping table reserved area to the last page 22 1351604. 4. According to the patent application area block management method, the flash memory of the 1 or 2 or 3 item of the write operation includes the following steps: 1) reading the bit in the reserved area of the address mapping table The address mapping table information 2) judges whether the last operation ends normally according to the address mapping table and the redundant area description information of the saved address mapping table page; 3) If the abnormal end is ended, the exception handling program is entered. If it is normal, it will enter the data writing step; 4) When writing data, first write the old data in the target block to the swap block, and then write the new data of this operation to the swap block. 'Write the remaining old data to the swap block; 5) erase the target block; 6) match the physical address corresponding to the logical address of the swap block in the address mapping table with the logical address of the target block The physical address is exchanged; and 7) the updated address mapping table and the exchange block address mapping table entry are respectively stored in the data storage area and the redundant area of the next page of the address mapping table reserved area. 5. The method for managing a block of a flash memory according to claim 4, wherein the exception handling program includes: determining whether power is lost during writing of data to the swap block, if yes, The swap block erase of the partial content is written. 6. The block management method of the flash memory according to claim 4, wherein the exception handling program includes: determining whether the target erasing process is powered off in the target 23 1351604, if it is (four) target Block erase, copy the data of the swap block to the target block, and finally remove the swap block. 1 7. The block management method of the flash memory according to item 4 of the patent scope of the patent application, wherein the exception processing program includes: #断断的 power down during the address mapping table update process, if yes According to the information of the address mapping table and the corresponding redundant area, the target block and the swap block of the last operation are found, then the data of the swap block is copied to the target block, and the swap block is erased. 8. The method for managing a block of a flash memory according to claim 2 or 3, wherein a parameter seed is established, the value of which is related to the number of cycles in which the map saves the page save position, and is set Corresponding to the logical address of the flash memory block, when the seed value changes, according to the address mapping table information, the data of the flash memory block corresponding to the corresponding logical address is written into the exchange area. The block further exchanges the physical address corresponding to the logical address of the swap block in the mapping table with the physical address corresponding to the logical address of the seed value. 9. The block management method of the flash memory according to claim 8 wherein the seed value is saved to the redundant area of the save address map page when the address mapping table is updated. The block management method of the flash memory according to claim 8, wherein a loop parameter N is set, and each time the address mapping table is n times, the page saves the position of the page save position, the seed Add 1 to the value. II According to the patent management scope of claim 10, the block management of the flash memory 24 1JD10U4 method, t, the first page of the reserved address address mapping table of the address mapping table of the address mapping table It is only a loop to the above. Π·According to item 8 of the scope of patent application. Block management of ancient and earthy gentlemen, the seed value can be used to judge the degree of flashing. π phase consumption 13. (4): The block method of the flash memory according to the first or second or third aspect of the patent range, wherein the flash memory is a flash memory chip or contains a plurality of A flash memory array of flash memory chips. ~ 25