TWI253564B - Method of efficient data management with flash storage system - Google Patents

Abstract

A data management for flash memory device is disclosed. The device includes a screen virtual sector table and a virtual unit versus physical unit table (V2P table) for each block. With the auxiliary of the screen virtual sector table and V2P table, the data programming into the target block of the flash memory is in accordance with the data receiving order, which is from lower page number to higher page number in case the target block is free. The data can be written into the target block contains data already through one or two temporal block(s). The conventional LBA data transfer protocol can still be applied to the flash memory device of this invention.

Description

1253564 V. Description of the Invention (1) Technical Field of the Invention The present invention relates to a flash memory data access management system and a method, in particular, a host writes a flash in a logical sector. Memory component ':, when the body is remembered: ❿ also - and record the virtual section of the block to which it belongs to y money tabulation to achieve the premise of not affecting the host in accordance with the access section agreement, Iraq, # fans Access data. [Prior Art] Flash memory system is a kind of low-power consumption, ancient ten mobility, high stability and other security data: f: take speed... square shock, record resistance (or elimination). In addition, the ^丨"blocks method does not require any power supply to protect: save, flash 5 recall 2, technology even if the power is turned off after the turn off, -3, to see Above. This advantage is that you have to store the information for at least 10 years, compared with the traditional computer, the storage system is eclipsed. Case or floppy storage data storage device: use For example, a hard disk needs to be used in a zone or a slogan. Since the hard disk or the soft material is rotated to a designated position, the magnetic material of the stomach will be stored. It will be detrimental to the error of the electric brain device; very:; "can be caused by the vibration problem, this storage flash memory has a full mouth and compared with other storage media, page 8 1235564 five, invention description (3 ) Flash memory body m hidden data u section capacity This host access to the data and flash flash and ^ use block / view fV,

Edit section and virtual section conversion table. Flash ^f 11 ^ J sex, that is, the flash memory is initially used to write the heart of the moon, and the data of each e-memory in the block is erased (^ase) all (floating) The charge of the gate, this day, the mother-in-law, the net gate of the memory, said. When the data is written, the voltage level 1 (p r 〇 g r a m m i n g) of the designated area and the mother cell is the private charge of the '$° cell in the block. That is, the voltage level 1 is changed to Thai = some memory floating gate is stored in the traditional flash memory can only be used as a block % | | bit _ quasi 0. According to this feature, there are still enough memory pages to be written or erased in the block, that is, data intrusion into the logical segment and virtual segment conversion table. Therefore, when writing the corresponding virtual segment for the matching segment, the protocol is written, and the data must be moved from the logical data (m〇ve), and the memory in the memory page of the memory is used. Life expectancy is unfavorable. 1 的 action. This is not good for writing efficiency for flash: 4. In view of this, the present invention will provide a concept of a table (Vlrtual bl0ck t0 physi sorting mechanism and establishing a V2P under this mechanism, I table of data). , the basis, and the "page or seat area is no longer inquiries... The virtual area of the block should be empty and continuous J-series::: The logical section should be matched! When writing the f material, you can : According to this hair; ΐ: Recalling the page is enough to accommodate these memory pages, and contends τ Γςρ Μ according to the method of this seven Ming to write the data into the state of the sub-correction FSP. Here: the ten 舄 舄 舄 户Remember

Page 10 1253564 V. INSTRUCTIONS (4) Recalling pages means that the memory page is available (a v a 1丨a b 1 e ) memory pages that are allowed to be written to the data. When the virtual block corresponding to the logical segment has no empty consecutive memory pages, or if there is, the continuous memory page is insufficient to accommodate the data to be written, according to the method of the present invention, the data can be written into the new Within the 0th sector (0th memory page) of the virtual block, and simultaneously record its correspondence in the sorting mechanism table. Therefore, the data can be quickly accessed without affecting the host's logical section access agreement, but the number of flash memory data movements can be significantly reduced, thereby achieving the purpose of extending the service life. SUMMARY OF THE INVENTION The present invention discloses a flash memory data access management, in particular, when a host writes a physical memory of a flash memory component in a logical segment, and simultaneously records the virtuality of the tile to which it belongs. The sorting mechanism table and the V 2P table of the section and the logical section number are compared, so that the fast access data can be achieved without affecting the host according to the logical sector access agreement, but the flash memory data can be significantly reduced. Move the number of times to achieve the purpose of extending the service life. The invention can be divided into the following cases when writing the data to be written in the data buffer (logical segment N or / and logical segment Μ) into the following cases: (1) when the target block is empty When it is written in the 0th sector (or 0th memory page) of the corresponding flash memory block, regardless of whether the 0th sector (or 0th memory page) is the logical sector The location, the logical segment above and below Ν indicates that the logical segment is a total of n logical segments.

Page 11 1253564 V. Description of the invention (6) The Μ' -1 section (memory page) is written in the block C and then the second logical section Μ is written into the block C, and then the zone is The data from the first block of block B from '+ πι segment to Ν' + η-1 is copied into block C, and the data from the Ν' + η of the target block and the subsequent data are written into the block. In C, the block C is finally marked as the target block. (6) When the target block has data and the corresponding target segment (or target page) is not enough to accommodate the logical segment :: find a new block written in the target block. [Embodiment] As described in the background of the invention, conventional flash memory is block-based regardless of stylization or data erasure. In addition, the logical sector data blocks transmitted by the host must be written in new blocks so that the logical segments correspond to the virtual segments in the flash memory. The present invention can break through the above limitations, and can be sequentially written from a low memory page to a high memory page in sequence as long as the target block is empty. In addition, if the target block has data, the control chip of the flash memory component can easily find any block of data that can be written in the flash memory and its section, and the tribute is broken. For convenience of description, in the present specification, a memory page is equivalent to one segment, and any person skilled in the art should be able to apply the spirit of the present invention to one memory page equivalent to four segments. Because the conversion between the logical segment and the virtual segment is only between the two. According to the method of the present invention, each block of the flash memory (b 1 〇 c k)

Page 13 I253564

status. In addition, the most, and when the highest bit is (9) invention description ^ 70 [that is, the F-th bit) is used to describe the physical physicist position of the block is 1, when the block (bl ock) is good ^ ' Indicates that the block (bl 〇ck) is defective. Below, we will use the flow chart to explain how the FSP and the sorting mechanism SVST achieve the premise of not affecting the use of the main H into the V2F table, JL /1, & Write efficiency. The use of the Changsha Flash Particles The present invention can be divided into several cases for the data buffer to be written. The following flash memory temporary storage area buffers F's capital. We also assume that the order of the Becco's queue is a logical section and the second. The pen data contains, "匕3 has 11 lbs. Inch MU3 has ^ logical sections. The rushing area refers to the speed memory (R AM) in the host or flash memory. The typical situation is as follows: λ^ ^ 〇, ^t (1) When the target block is empty. (2) When the younger brother is poor, the block of the tribute to us and the younger brother are all When it is empty. (3) When the target area 堍 ρ is wide, ice, bucket, and AA hundred, W, — brothers and sisters have a shake and the corresponding target section (or 4 pages) is enough Logic parent par $ Μ , a,,,, η α 科 k. (4) When the target block has a tribute and the corresponding target area JU slave (or target page) is enough to accommodate the first data N and The second data Μ (and 俨 俨 ,, ^ only) 疋 乐 乐 乐 乐 贝 λ λ 彳 彳 彳 彳 彳 彳 彳 彳 彳 彳 彳 彳 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及器#广^ ^ ^ ^ ^ . Located in the section of N (5) When the target block has a poor material and corresponds to the first data N and the second data M, < N, (6) when the block has data and corresponds = section of the economy (or target

1253564 V. Invention description (10) page) is not enough to accommodate data N.

First, the case of (1) and (2) will be explained: when the target block is empty; the first data N, the second data Μ. First, please refer to step 4 1 0 in the flowchart of Fig. 3 to determine whether the target start segment Ν' of the first data 就 is the 0th segment. If π is ", please refer to step 4 2 0 to write the first data Ν into the 0th segment of the block (b 1 oc k ) 起 to the η-1 segment, and update the V2P table. The FSP is such that FSP = n and η is represented by binary. The positional relationship between the logical segment and the virtual segment number is recorded in SVST

After step 420, step 4 3 0 is performed to determine whether there is a second data Μ. If the result of step 430 is π No " then step 431 ends. If the result of step 4 30 is η is ", then step 44 0 is performed to determine whether the target block written by the second data is also in the block. If the result of step 44 0 is π is " Then refer to step 4 5 0: to determine whether the starting segment Μ ' of the second data Μ is immediately after the first data ,, that is, starting from the η segment. If the result of step 4 50 If π is "", proceed to step 4 6 0: write the second data Μ into the virtual block (b lock ) and update the FSP. Also update SVSP as above. If the result of step 4 50 is "No", then the m segment data is still written in the segment from the end of the first data N, and the SVST is also updated, but the current FSP index is changed to 0. If the result of step 4 4 0 is π no π, then please refer to step 441: end block Β and then find empty block C. To process the second data,

Page 17 1253564 _ V. Description of invention (Π). And the current F S P index =1 is the same as the above. Yes will be: Ξ: Ν step: 410. If the result is "no", please refer to step 421 also to insert the virtual section of block B (the second section) from the SRO in the ^ state table (four) to make FSP = Q, and record sorting Material. ^ Ϊ .: 4 Steps 23=2 Fruit Steps Step 4 2 3 Determine if there is a second pen f Step 42 3 If the gentleman is Γ曰 目 目 No " then as shown in step 4 2 5:, end. If the target block/no/household, then step 424 determines that the second data is written. If the result of step 424 is "No", it would be like: _ί;: ί=·· "Fallow block C ° then refer to step ^ ^SP „,:, - the result of step 424 is "θ " r σ 录 录 Sorting the branches in the SRAM. If the segment data is in the area: B: the first: from: = "Test step 4 2 6 will be m area SRAM. 〇 £ & inside 'simultaneous record sorting mechanism table. Then explain the (3) corresponding situation The target section (or the standard * test flow chart of Figure 4. Condition: when the target block A has data and pages) is enough to accommodate the first data N: please

Page 18

1253564 V. Description of invention (13) The second logical segment Μ, but the starting position of the logical segment μ is located before the logical segment ··· the case of writing the first data and the step 5 of the case (2) 2 0 to 5 5 0 are the same, so this will not be described again, and then refer to the flowchart of FIG. 6 . As shown in step 7 1 0: find a new blank block (b丨〇 c k ), such as block C. Next, please refer to step 72〇··The block of the block (M〇ck)B. The data of the section 1 is copied to the block (b丨〇 c ^ ) c. Please refer to step 7 3 0 ·· and then write the second data M of the buffer to the section of the block. Then, as in step 74, the data between the block (b丨〇ck) B M+ra to the Ν' + nl segment is copied into the block (M〇ck) c, and then, as Step 750: Write the data of the section N' + η of the block (b 1 〇 ck ) A into the section corresponding to the block C. At this time, the block (bi〇ck)c is already a replica of the block (b]_ 〇 c k) A plus N and Μ two strings of logical segments. Therefore, please refer to step 760: erase the data of block A and block (M〇ck) B, and the main block (b 1 〇 ck ) C is the original block (Μ 〇 ck) A. Next, the case (6) is explained: when the target block has data and the ticket segment (or target page) is insufficient to accommodate the logical segment N: the new block is written in the target block. . Therefore, according to the method of the present invention, when Bend ^ 13⁄4 ^ ^ ap 〇 π π ^ field master Qian Shuo Shuo flash memory 1 valley s 守 right found FSP = 0 day $, only need apricot% after Zhao # U4 γ Shi will check the 5th sorting mechanism SVST, but the order listed in the table, you can read the virtual broadcast (4) off # 4 k 4 and the opposite side of the logical section, off you. If you find FSP #〇, then you will be deaf. correspond

By the existence of the clothing sorting mechanism SVST, when the block in which the "J line breaks in is blank, this

Page 20 1253564 V. Description of the Invention (14) The invention can write the logical sector data in the writing order at the beginning of the block, and then use the sorting mechanism SVST to provide the correspondence between the virtual segment and the logical segment. When the block to be written is blank, but the logical segment to be written is blank, the present invention can insert the logical segment data into the virtual segment corresponding to the destination block in the logical segment order. The reuse sorting mechanism SVST provides a correspondence between virtual segments and logical segments to make data reading more efficient. The above description is only for the preferred embodiment, and is not intended to limit the scope of the claims of the present invention; any other equivalent changes or modifications which are not departing from the spirit of the present invention should be included in the application below. Within the scope of the patent.

Page 21 1253564 BRIEF DESCRIPTION OF THE DRAWINGS The preferred embodiment of the present invention will be explained in more detail in the following description with the following figures: Figure 1 shows a 16-bit virtual block physical area designed in accordance with the present invention. Block comparison table (V2P). Figure 2A shows a schematic diagram of flash memory virtual sector write logic segments not arranged according to logical sector numbers in accordance with the present invention. Figure 2B shows the intent of the sorting mechanism table according to the present invention to find the corresponding virtual segment by logical sector number arrangement. Fig. 3 is a flow chart showing the case (1) and (2) of the embodiment of the present invention. Fig. 4 is a flow chart showing the case (3) of the embodiment of the present invention. Fig. 5 is a flow chart showing the case (4) of the embodiment of the present invention. Fig. 6 is a flow chart showing the case (5) of the embodiment of the present invention. Figure number comparison description: 0, 1, ... D, E, F is 16-bit V2P table format VS virtual segment LS logical segment FSP empty segment index SVST sorting mechanism SRAM static random access memory 410 to 4 6 0 is the flow chart of FIG. 3, step 5 2 0 to 5 7 0 is the flow chart of FIG. 4, step 6 1 0 to 6 4 0 is the flow chart of FIG. 5, step 7 1 0 to 7 6 0 is the flow chart step of FIG.

Page 22 1253564 Schematic description N 'The first data N is written to the beginning of the block of the flash memory (page) M' second data Μ written to the block of the flash memory The beginning section (page) η The first data Ν There are η sections m The second data Ν There are m sections

Claims (1)

1253564 ~, patent application scope 1) &amp; supply-control program, the control program for the flash memory Ϊ 鬼 ghost to create - U-bit V2P table, the V2P table contains the = block corresponding position, blank memory page The index (FSP) and the block f or the soil, the gamma k &lt; α ^ ” and the block in the ^ where the FSP = 0, the segment that does not exclude the zone needs the sorting machine =; rsp = #, when Indicates that the section after the ##memory page is blank (2) for one of the different write bars to be written to the data provider (A), (B) or (C) Option step: (A) When you want to write the data N of n logical segments into the virtual segment of the flashing intelligence, write the flash memory empty block: H virtual segment, and update the block The FSP value; (B) When the above information N is to be written into the flash memory, the non-walking 口 二 二 豆 豆 豆 豆 豆 豆 豆 豆 豆 豆 豆 豆 豆 豆The body of the body and the annotation FSP = 〇 and the login sorting mechanism table; the initial virtual (C) of the Gongbai block when the above information n is to be written into the non-blank labeled block A and the starting The target virtual area ~ flash memory block A corresponds to the logical section N position enough to accommodate the Bu,,, ', the target area of the following steps: 'When the fascination N, including (I) the target area From the third to the Nth of block A, a blank block B; the content of ^ &amp; is written to (Π) the n-segment data of the above-mentioned data N is appropriate, the position of the segment; The block Β Π Π 将该 将该 将该 将该 将该 将该 将该 将该 将该 将该 将该 将该 将该 将该 将该 将该 将该 将该 将该 将该 将该 将该 将该 将该 将该 将该 将该 将该 将该 将该 将该 将该 + + + + + + + + + + + + + + + + + &quot;Replace the block" Α. </ RTI> </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> One of them. 7. For example, in the method of claim 5, after the step (II) and before the step (III), the data is further written, and when the data is in a total of m logical segments, (a) or (b) ) One of the option steps: (a) When the position of the π-substituting block 11 A corresponding to the data 足以 is sufficient to accommodate, and the target starting position Μ ' is greater than Ν' of the data :: Write the block 之 + η of the block A The data between Μ' - 1 is written to "replace block 11 ;; the content of the data 写入 is written to the position of the π-substituted block" A; the block is Α The content of the remaining segment is written into the π-substituting block &quot;Α; erase the block A and mark the π-substituted block π A as &quot;original block n A ; end; (b) When the position of the replacement block π A corresponds to the logical segment 足以 is sufficient, and the starting position of the target Μ ' is less than Ν': Write π to replace the block &quot;Α The data between the 0th and the Μ'-1 is in the blank block C; the content of the data 写入 is written to the position of the &quot;substitute the M' of the block π A; Information between the M' +m to the Ν' +n-.1 sections Page 271253564 t, the patent application scope is written into block c; the content from the N '+ η segment of the block A is written into the block C; erasing the block Α and π substitution The block π Α, and indicates that the block C is the π original block π A ; and the end. Page 28