TWI333405B - - Google Patents

Download PDF

Info

Publication number
TWI333405B
TWI333405B TW96136308A TW96136308A TWI333405B TW I333405 B TWI333405 B TW I333405B TW 96136308 A TW96136308 A TW 96136308A TW 96136308 A TW96136308 A TW 96136308A TW I333405 B TWI333405 B TW I333405B
Authority
TW
Taiwan
Prior art keywords
solder
pads
layer
solder resist
circuit board
Prior art date
Application number
TW96136308A
Other languages
English (en)
Chinese (zh)
Other versions
TW200915943A (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to TW96136308A priority Critical patent/TW200915943A/zh
Publication of TW200915943A publication Critical patent/TW200915943A/zh
Application granted granted Critical
Publication of TWI333405B publication Critical patent/TWI333405B/zh

Links

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
TW96136308A 2007-09-28 2007-09-28 Method to form opening on solder mask layer with high precision of alignment TW200915943A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW96136308A TW200915943A (en) 2007-09-28 2007-09-28 Method to form opening on solder mask layer with high precision of alignment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW96136308A TW200915943A (en) 2007-09-28 2007-09-28 Method to form opening on solder mask layer with high precision of alignment

Publications (2)

Publication Number Publication Date
TW200915943A TW200915943A (en) 2009-04-01
TWI333405B true TWI333405B (ja) 2010-11-11

Family

ID=44725882

Family Applications (1)

Application Number Title Priority Date Filing Date
TW96136308A TW200915943A (en) 2007-09-28 2007-09-28 Method to form opening on solder mask layer with high precision of alignment

Country Status (1)

Country Link
TW (1) TW200915943A (ja)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8927878B2 (en) 2011-10-31 2015-01-06 Mediatek Singapore Pte. Ltd Printed circuit board and electronic apparatus thereof
CN103096618B (zh) * 2011-10-31 2016-03-30 联发科技(新加坡)私人有限公司 印刷电路板以及电子设备
TWI551201B (zh) * 2015-11-27 2016-09-21 達方電子股份有限公司 光源裝置
CN108419378B (zh) * 2018-05-09 2019-12-20 深圳市百柔新材料技术有限公司 印刷线路板保护层的制作方法
CN113556883B (zh) * 2020-04-23 2022-11-15 鹏鼎控股(深圳)股份有限公司 电路板封装结构的制备方法及电路板封装结构
CN111565519B (zh) * 2020-06-02 2021-08-17 锡凡半导体无锡有限公司 一种印刷无感光蚀工艺
CN115038253B (zh) * 2022-06-15 2023-07-14 江门崇达电路技术有限公司 一种线路板上多种类型的pad精准等大的制作方法

Also Published As

Publication number Publication date
TW200915943A (en) 2009-04-01

Similar Documents

Publication Publication Date Title
TWI333405B (ja)
US8299368B2 (en) Interconnection element for electric circuits
TWI691977B (zh) 異向導電性膜及連接構造體
TWI379624B (en) Printed circuit board and method of producing the same
JP6344919B2 (ja) プリント回路板及び積層型半導体装置
JP2008205232A (ja) 導体パターンの形成方法
JP2005079581A (ja) テープ基板、及びテープ基板を用いた半導体チップパッケージ、及び半導体チップパッケージを用いたlcd装置
JP2009224471A (ja) 電子部品及びその製造方法
JP2005117036A (ja) テープ配線基板とそれを利用した半導体チップパッケージ
JP2011166081A (ja) 半導体装置、半導体パッケージ、インタポーザ、半導体装置の製造方法、及びインタポーザの製造方法
JP2013219170A (ja) 基板装置
US8304665B2 (en) Package substrate having landless conductive traces
CN101989587A (zh) 电路板的电性连接结构及电路板装置
TWI634823B (zh) 電子裝置
TWI378546B (en) Substrate and package for micro bga
JPH104127A (ja) 半田バンプを有する基板の製造方法
JP2005268346A (ja) 半導体パッケージ基板とその製造方法
JP2016162813A (ja) プリント基板及びハンダ付け方法
JP2008140868A (ja) 多層配線基板および半導体装置
JPH11345826A (ja) 半導体装置、半導体装置の製造方法及び半導体装置の実装方法
JP2006147620A (ja) フリップチップ実装半導体装置の製造方法及びフリップチップ実装半導体装置
TW201212136A (en) Manufacturing method of wiring substrate having solder bump, and mask for mounting solder ball
JP2010010611A (ja) プリント回路板及び電子機器
JP2009070998A (ja) フェースダウン実装型電子部品、回路基板、及び半導体装置
KR100986294B1 (ko) 인쇄회로기판의 제조방법