TWI312199B - A photo electric diodes array and the manufacturing method of the same and a radiation ray detector - Google Patents

A photo electric diodes array and the manufacturing method of the same and a radiation ray detector Download PDF

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Publication number
TWI312199B
TWI312199B TW93106308A TW93106308A TWI312199B TW I312199 B TWI312199 B TW I312199B TW 93106308 A TW93106308 A TW 93106308A TW 93106308 A TW93106308 A TW 93106308A TW I312199 B TWI312199 B TW I312199B
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TW
Taiwan
Prior art keywords
photodiode
semiconductor substrate
photodiode array
array
light
Prior art date
Application number
TW93106308A
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English (en)
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TW200505039A (en
Inventor
Katsumi Shibayama
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Hamamatsu Photonics Kk
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Priority claimed from JP2003087894A external-priority patent/JP4220819B2/ja
Application filed by Hamamatsu Photonics Kk filed Critical Hamamatsu Photonics Kk
Publication of TW200505039A publication Critical patent/TW200505039A/zh
Application granted granted Critical
Publication of TWI312199B publication Critical patent/TWI312199B/zh

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    • H01L27/144Devices controlled by radiation
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    • H01L31/08Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
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    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector

Description

1312199 玖、發明說明: 【發明所屬技術領域】 本發明係有關光電二極體陣列及其製造方法,以及放射線檢 測器。 【先前技術】 以此種光電二極體陣列而言,可知以往具有利用將光入射面 '側和背面側予以連接的貫通配線(電極),把來自光電二極體 陣列之輸出信號與背面側作電氣連接之類型的表面入射型光 電二極體陣列(例如,參照日本國專利公開200 1 - 3 1 8 1 55號公 報)。此公報所揭示之光電二極體陣列係,如第17圖所示,用 以取出信號的配線1 5 2係從形成有作爲光電變換部之本體的 光電二極體144a,144b,144c,…144η之各個擴散層151而形成 在光電二極體陣列144的表面,其配線152係被連接於貫通Si 配線基板1 53的表裏之貫通配線1 54般地延設著。且,在光電 二極體144的背面側形成有連接於貫通配線154之凸塊155, 在配線152、貫通配線154、及Si配線基板153之間係由氧化 砍膜的絕緣膜1 5 6 a ' 1 5 6 b、及1 5 6 c所絕緣。 【發明內容】 但是,上述的光電二極體陣列,例如封裝CT用光電二極體陣 列,作爲吸附晶片的夾套,雖然可使用平夾套和角錐夾套,但是 通常在執行覆晶接合(flip chip bonding)之場合係使用平夾 套。CT用光電二極體陣列係晶片面積大(例如,I邊20mm的 矩形狀),如第16B圖所示,當在使用通常的安裝架所使用之 角錐夾套1 6 1時,依晶片1 62和角錐夾套1 6 1之間隙1 63而産 -5- 1312199 生翹曲毛刺,因此翹曲毛刺造成位置偏差而具有封裝精度降 低之虞。又,在執行覆晶接合之際有必要加熱及加壓,但以角錐 夾套161而言’熱傳導的效率不佳。又,依所受壓力也具有損 傷晶片邊緣之虞。角錐夾套1 6 1並不適於薄晶片。基於此種 理由’在執行覆晶接合之場合,如第1 6 A圖所示,一邊以與晶 片面作面接觸的平夾套160吸附晶片162,一邊由熱塊164對 晶片162施加熱與壓力。 然而,當使用平夾套160時,晶片162之晶片面全體係成爲與 平夾套160接觸。此晶片162中,與平夾套160接觸的晶片面 係光檢測部,亦即,形成有用以構成光電二極體陣列之不純物 擴散層的光入射面。此成爲光入射面的晶片面全體在與平夾 套1 60接觸而受到加壓及加熱時,光檢測部自體係遭受到物理 的損傷(damage )。如此一來,光檢測部亦招致依表面損傷 所造成之外觀不良或特性劣化(暗電流或雜音增加等等)。 於是,本發明係解決上述課題,且其目的爲提供一可防止封 裝時依光電二極體陣列之損傷所引起的特性劣化之光電二極 體陣列及其製造方法,以及放射線檢測器。 爲解決上述課題,本發明之光電二極體陣列爲具備有,在被 檢測光之入射面側,複數個光電二極體爲以陣列狀形成之半 導體基板,其特徵爲,半導體基板係,貫通入射面側和其背面側 之貫通配線爲形成在光電二極體,且在半導體基板之入射面側, 設置至少被覆形成有光電二極體之區域,用以使被檢測光透過 之樹脂膜。 此光電二極體陣列爲,因爲樹脂膜係介在形成有光電二極體 之區域和在封裝時所使用的平夾套之間,所以光電二極體係不 1312199 與在封裝時所使用的平夾套直接接觸而受樹脂膜所保護,不 會受到由加壓所産生的應力或由加熱所産生的應力。 上述光電二極體陣列係,將上述樹脂膜設置在半導體基板之 入射面側全體者爲較佳。此光電二極體陣列係可利用樹脂膜 而將各光電二極體之形成區域全體確實地被覆,且能容易地製 造。 又,上述光電二極體陣列中,在半導體基板,設置在鄰接的光 電二極體間用以分離各光電二極體之不純物區域(分離層) 就好。此等之光電二極體陣列係依分離層以抑制表面洩漏,所 以鄰接的光電二極體彼此係被確實地電氣分離。 其次,本發明係提供一光電二極體陣列之製造方法,具備 有:在由第1導電型之半導體所成的半導體基板,形成貫通該 半導體基板之兩側表面的貫通配線之第1歩驟,針對該半導體 基板之單側表面,對規定的區域添加不純物以形成複數個第2 導電型之不純物擴散層,將依各不純物擴散層和該半導體基板 之複數個光電二極體以陣列狀作配列設置之第2歩驟,及在該 半導體基板之該單側表面側,設置至少被覆形成有該光電二極 體的區域,用以使該被檢測光透過的樹脂膜之第3歩驟。 依此光電二極體陣列的製造方法,可在半導體基板之入射面 側,設置用以被覆光電二極體的形成區域之樹脂膜,以製造光 電二極體陣列。 於上述光電二極體陣列之製造方法,可作成該第1歩驟係 具備有:在該半導體基板形成複數個穴部之歩驟;在包含有 該各穴部之該半導體基板之至少單側表面,形成導電性被膜之 歩驟;及硏磨該半導體基板以除去該導電性被膜之歩驟。 1312199 此等之光電二極體陣列的製造方法係可作成更具備有,在 上述第1歩驟之後,在鄰接的添加不純物之區域間添加其他不 純物以設置第1導電型的不純物區域之歩驟。依此製造方法, 可獲得鄰接的各光電二極體被確實分離之光電二極體陣列。 再者,本發明係提供一放射線檢測器,具備有上述任一光電 二極體陣列,及安裝在光電二極體陣列之被檢測光的入射面側, 依入射的放射線而發光之閃爍面板。 又提供一放射線檢測器,具備有由上述任一製造方法所製造 的光電二極體陣列,及安裝在光電二極體陣列之上述樹脂膜設 置側,依入射的放射線而發光之閃爍面板。 此等之放射線檢測器因爲具備上述光電二極體陣列,所以形 成在其光入射面側之光電二極體係因爲受樹脂膜的保護而不 會在封裝時依加壓或加熱而受損傷,可防止因此等雜音或暗電 流增加等所造成之特性劣化。 【實施方式】 以下,兹針對本發明之實施形態加以說明。此外,同一要素係 使用同一符號,重複的說明係省略。 第1圖係表示有關本發明之實施形態光電二極體陣列1之 模式剖面圖。此外,在以下的說明中,把光L之入射面設爲表面, 其相反側之面設爲背面。於以下的各圖中,爲了圖式的便利性, 尺寸係適當地變更。 光電二極體陣列1係,依ρ η接合的複數個光電二極體4係以 縱橫有規則的陣列狀作2維配列,其一個一個的光電二極體4 係具有作爲光電二極體陣列1之一畫素的機能,整體構成一 個光檢測部。 1312199 光電二極體陣列1係具有厚度爲1 50〜500 μ m(較佳爲400 # m)程度且不純物濃度爲lxl〇12〜1015/cm3程度之η型(第1 導電型)矽基板3。η型矽基板3之表面及背面係形成由厚度 0.05〜1 μ m (較佳爲0.1 // m )程度之Si〇2所成之鈍化膜2。 又,在光電二極體陣列1之表面側,不純物濃度爲lxlO15〜 102°/cm3且膜厚爲0.05〜20/zm程度(較佳爲〇.2μιη)之P型 (第2導電型)不純物擴散層5係以縱橫之具規律的陣列狀 作2維配列。依此各ρ型不純物擴散層5和η型矽基板3之 ρη接合係構成光電二極體4。 其次,各Ρ型不純物擴散層5所存在的區域係光電二極體4 之形成區域(形成區域),其以外的區域係成爲未形成光電二 極體之非形成區域,在其表面側,至少可被覆光電二極體4之形 成區域全體的透明樹脂膜6係設置在表面側全體。 此透明樹脂膜6成爲由光電二極體4全體所成之光檢測部 的保護膜、且因係配置在入射面側,所以爲使光電二極體陣列 4所檢測的光(被檢測光,例如,後述之閃爍面板3 1所發生的蛍 光)透過且對其被檢測光爲光學上透明之光透過性之樹脂,例 如,環氧樹脂或聚醯亞胺' 聚矽氧、氟、丙烯酸乙酯等或由以 其等爲基材的複合素材所成。 又,透明樹脂膜6係如同後面將述及,在覆晶接合之際與平夾 套直接接觸,因爲係被加壓且被加熱者,所以以具備可發揮用 以保護各光電二極體4以緩衝此加壓及加熱之作為緩衝層的 機能特性者較佳。在此場合,例如熱膨脹係數爲1χ1〇-6〜 1χ1〇 —4/°C程度,彈性特性爲彈性率1〇〜]2⑼〇kg/cm2程度,熱傳導率 爲0.2〜1 · 8 5 W/m K,不純物離子不依加熱而朝光電二極體4擴 1312199 散,且具有可吸收至少來自後述之閃燦面板3 1的光之膜厚(1 〜50//m(較佳爲10//m)程度)者較佳。 此透明樹脂膜6若設置成至少可被覆光電二極體4之形成 區域全體的範圍就好。若満足此要件,也可以1個透明樹脂膜 6被覆光電二極體4之形成區域全體,也可將透明樹脂膜6按 各光電二極體4而個別地形成,在其非形成區域,形成一部分未 形成之欠缺部6a (參照第14圖)。然而,以簡易製造歩驟這 點而言,將1個透明樹脂膜6設置在表面側全體係較佳(針對 此點將在後面詳述)。 又,光電二極體陣列1之光電二極體4係各自具有貫通配線 8。各貫通配線8係由將η型矽基板3之表面側和背面側貫通 且形成爲直徑10 # m〜100 μ m程度(較佳爲50 /z m程度)、 且磷之濃度爲lxl〇15〜l〇2°/cm3程度的複晶矽所成,其表面側 係透過由鋁所成之電極配線9 (膜厚爲1 μ m程度)而與p型 不純物擴散層5電氣連接,背面側係透過由同爲鋁所成之電極 腳位10 (膜厚係0.05 " m〜5 μ m,較佳爲1 μ m程度)而被電 氣連接。銲錫之凸塊電極1 2係經由N i — A u所成之覆晶球下 金屬(UBM) 11而被連接至其各電極腳位10。各貫通配線8 係設置在未形成有光電二極體4之非形成區域,也可設置在除 其以外的部分。 再者,圖示之光電二極體陣列1爲,Ρ型不純物擴散層5彼此 之間,亦即,在鄰接的光電二極體4,4之間,將η +型不純物區域 (分離層)7設置爲深度〇. 5〜6 // m程度。此η +型不純物區 域(分離層)7之機能爲用以將鄰接的光電二極體4,4作電氣 分離者,藉由此設置,鄰接的光電二極體4,4係被確實地電氣 -10- 1312199 分離,可減低光電二極體4彼此之串音。然而,即使光電二極 體陣列1未設置此η +型不純物區域7,也具有實用上充分可 容許之程度的光檢測特性。 第2圖係表示構成光電二極體陣列1之半導體晶片30的側 面圖及將其要部放大表示之剖面圖。如第2圖所示,半導體晶 片30係寛度W1爲22.4mm程度,厚度D爲約0.3mm之極薄的 板狀,具有多數個上述之光電二極體4 (例如16x16個之2維 配置),鄰接的畫素間之間距W2爲1.4mm程度的大面積(例 如 22_4mmx22.4mm)之晶片。 且,如同以上所構成的光電二極體陣列1爲,當光L從表面 側入射時,其被檢測光L係在透過透明樹脂膜6之後,對各p型 不純物擴散層5入射,各光電二極體4係生成對應其入射光之 載體。依生成之載體所産生的光電流係經由連接至各p型不 純物擴散層5之電極配線9及貫通配線8,更經由背面側之各 電極腳位1 0和UBM 11而從凸塊電極1 2被取出。藉由來自此 凸塊電極1 2之輸出以執行入射光之檢測。 如同上述,光電二極體陣列1爲,可覆蓋光電二極體4的形成 區域全體之透明樹脂膜6係設置在表面側。爲此,在將半導 體晶片30以平夾套吸附而執行覆晶接合的場合時,此透明樹 脂膜6係與平夾套接觸,以介在於平夾套和光電二極體4的形 成區域之間作配置。依此,構成光檢測部之光電二極體4的形 成區域係受此透明樹脂膜6所保護,不會與平夾套直接接觸。 因此,光電二極體陣列1之光檢測部因爲不直接承受依加壓或 加熱所産生的應力,所以光檢測部自體不會受到物理性的損傷 (damage ),可抑制起因於那樣的損傷之雜音或暗電流等之發 1312199 生。因此,光電二極體陣列1係可執行高精度(S/Ν比高)的 光檢測。又,因爲透明樹脂膜6可發揮作爲保護各光電二極體 4之緩衝層的機能,所以也可吸收在吸附平夾套之際的物理性 衝撃,在這點上也具有效果。 又,如同後面將述及,除覆晶接合以外,例如在將光電二極體 陣列1與閃爍器一體化而作爲CT用感測器之場合,因爲閃爍 器不直接與光檢測部接觸,所以也可回避閃爍器在安裝時之 損傷。 但是,上述之光電二極體陣列1也可爲如次之構成。例如, 如第1 1圖所示,也使磷擴散於孔部1 5的側壁,也可將n+型不 純物區域7設置在貫通配線8的周圍。如此一來,可將在形成 孔部1 5 (穴部14 )之際來自損傷層不要的載體予以捕捉,可抑 制暗電流。在此場合所要添加之磷的濃度爲1x10"〜l〇2°/cm3 程度,η1型不純物區域7之厚度(深度)爲0.1〜5 // m程度就 可以。 又如第1 2圖所示,在孔部1 5内的氧化矽膜20之上也可設置 膜厚爲0.1〜2 /2 m程度之氮化矽膜26。如此一來,使得η型 矽基板3與貫通配線8之絕緣確實而可減低動作不良。 然後,在背面側也掺雜磷且使之擴散,如第1 3圖所示,也可設 置η +型不純物區域7。在此場合,可自背面取出陰極電極1 6。 如此一來,成爲不需設置用作陰極之貫通配線,所以渉及損傷 之減低、暗電流之減低 '以及不良率之減低。當然,因應需要 而自形成在表面之η +型不純物區域7設置貫通配線而將作爲 陰極之電極取出於背面側也可以。 其次,針對有關本實施形態之光電二極體陣列1的製造方法, -12- 1312199 茲依據第3圖〜第1 〇圖加以說明。 首先,準備厚度爲150〜5 00 ;zm(較佳爲400 /zm)程度的η 型矽基板3。接著,如第3圖所示,依ICP — RIE,在η型矽基板3 的表面(以下此面爲表面,而相反側的面爲背面)側,將直徑 10/zm〜100//m(較佳爲50/zm)程度之未貫通的穴部14,以η 型矽基板3的厚度所對應之深度(例如100〜350 # m程度), 對應光電二極體4形成複數個之後,在基板之表面及背面施予 熱氧化以形成氧化矽膜(Si〇2) 20。各穴部14隨後係形成有 貫通配線8。氧化矽膜(Si〇2 ) 20係實現後述之貫通配線8與 η型矽基板3之電氣絕緣者。 其次,如第4圖所示,以添加有不純物磷之導電性被膜而言, 在基板之表面和背面或著僅在表面形成形成複晶矽膜21,同 時在穴部14塡入添加有其不純物而低電阻化的複晶矽。接著, 如第5圖所示,硏磨基板之表面及背面,除去形成在表面和背 面之複晶矽膜2 1,同時由表面和背面使埋入穴部1 4之複晶矽 露出,在形成了貫通兩側表面之孔部1 5之後,將該埋設的複晶 砂作爲貫通配線8,再度,在基板之表面及背面施予熱氧化以形 成氧化矽膜2 2。此氧化矽膜2 2係在後續的歩驟中被作爲η + 熱擴散之遮罩來利用。 其次,針對η型砂基板3之表面側的氧化矽膜22,執行利用規 定的光掩護罩之圖案化,僅在欲設置η+型不純物區域7的區域 設置開口,由其被開口的部分(開口部)使磷擴散以設置η + 型不純物區域7 (在未設置η+型不純物區域7之場合也可省 略此歩驟(不純物區域形成歩驟))。其後再度在基板之表 面及背面施加熱氧化以形成氧化矽膜23 (參照第6圖)。此 -13- 1312199 氧化矽膜23係在後續的歩驟中被作爲要形成p型不純物擴 散層5之際的遮罩來利用。 接著,針對氧化矽膜23,執行利用規定的光掩護罩之圖案化, 僅在欲形成各P型不純物擴散層5之區域設置開口。接著由 其開口部使硼擴散,將P型不純物擴散層5以2維配列形成縱 橫之陣列狀。其後再度在基板之表面及背面施予熱氧化以形 成氧化矽膜24 (參照第7圖)。依此,依各p型不純物擴散 層5和η型矽基板3的pn接合之光電二極體4係以2維配列 形成縱橫之陣列狀,此光電二極體4係成爲對應畫素之部分。 接著,在形成有各貫通配線8之區域形成接觸窗(contact hole )。接著,對表面及背面各自將鋁金屬膜形成在全面之後, 使用規定的光掩護罩以執行圖案化,除去其金屬膜之不要的部 分,而各自在表面側形成電極配線9、在背面側形成電極腳位 10 (參照第8圖)。圖中係顯示僅取出陽極之電極。在由表 面取出陰極之電極的場合並未圖示,可由η +型不純物區域7經 由電極配線9和貫通配線8而取出於背面。 其次,在η型矽基板3之表面側,塗布作爲透明樹脂膜6之材 料的環氧樹脂、聚醯亞胺樹脂、矽樹脂、氟樹脂、丙烯酸乙 酯樹脂等或者以其等爲基材之複合材料的樹脂,利用旋轉塗布 或網目印刷法使其擴大成全面且使之硬化,以設置透明樹脂膜 6 (參照第9圖)。藉由設置此透明樹脂膜6,則用以構成光檢 測部之光電二極體4的形成區域係被保護。此外,在透明樹脂 膜6形成上述之欠缺部6a的場合,右從欠缺部6a的部分除去 塗布的樹脂的話即可,即便如此,光電二極體4之形成區域亦受 保護。 -14- 1312199 接著在各電極腳位10設置凸塊電極12,在作爲其凸塊電極 12爲使用靜錫之場合,因爲靜錫d銘之濕潤性並不佳,所以在 各電極腳位1 0形成用以仲介各電極腳位1 〇與凸塊電極1 2之 UBM11,而重畳於其UBM11以形成凸塊電極12(參照第10 圖)。依歷經以上的歩驟,在不産生起因於封裝時之損傷所造 成的雜音之下,可製造能執行高精度光檢測之光電二極體陣 列1。 在此場合,UBM11係依無電解電鍍,使用Ni- Au來形成,但是 也可依剝落法(lift-off method),使用Ti — Pt — Au或Cr — Au來 形成。又,凸塊電極1 2爲以錫球搭載法或印刷法以在規定的 UBM1 1形成銲錫,再利用迴銲而可獲得。此外,凸塊電極12並 非局限於銲錫,係可以爲金凸塊、鎳凸塊、銅凸塊,也可以爲包 含有導電性塡料等金屬之導電性樹脂凸塊。 其次,針對本發明之放射線檢測器的實施形態加以說明。 第1 5圖係有關本實施形態之放射線檢測器4 0的側剖面圖。 此放射線檢測器40係具備有,使放射線入射,再將依其放射線 所産生的光從光出射面3 1 a出射之閃爍面板3 1,以及把從閃爍 面板3 1出射的光由光入射面入射再變換成電氣信號之上述的 光電二極體陣列1。此放射線檢測器40之特徵爲具備有本發 明相關之光電二極體陣列1。 閃爍面板3 1被安裝在光電二極體陣列1之表面側(入射面 側),光電二極體陣列1之表面側係設置有上述之透明樹脂膜 6。因此,閃爍面板3 1的背面,亦即光出射面3 1 a係與透明樹脂 膜6接觸,但不直接與光電二極體4之形成區域接觸。又,在閃 爍面板3 1之光出射面3 1 a和透明樹脂膜6之間係充塡有,具有 -1 5- 1312199 不使光透過特性劣化而考慮之折射率的光學樹脂35,依此光 學樹脂3 5,則由閃爍面板3 1出射的光係成爲有效率地入射至 光電二極體陣列1。此光學樹脂35係可使用具有使閃爍面板 3 1所出射的光透過之性質的環氧樹脂、或丙烯酸樹脂、胺甲 酸乙酯樹脂、矽樹脂、氟樹脂等,也可使用以此等爲基材的 複合材料。 其次,在將光電二極體陣列1接合至未圖示之封裝配線基板 上之際係以平夾套吸附表面。但是,因爲光電二極體陣列1的 表面係設置有上述之透明樹脂膜6,所以平夾套之吸附面不直 接與光檢測部接觸,且依閃爍面板31之安裝,其光出射面3 1a 也不與光電二極體4的形成區域直接接觸。因此,具有此種光 電二極體陣列1和閃爍面板31之放射線檢測器40,因爲可防 止在封裝時之依光檢測部的損傷所産生之雜音或暗電流等等, 所以被執行高精度的光檢測,也能執行精度佳的放射線檢測。 産業上之可利用性 如同以上詳述,依本發明,於光電二極體陣列及其製造方法, 以及放射線檢測器中,可有效地防止因封裝時之光電二極體的 損傷所造成之雜音或暗電流的發生。 【圖式簡單說明】 第1圖係表示有關實施形態之光電二極體陣列的要部予以 放大之模式剖面圖。 第2圖係表示構成光電二極體陣列之半導體晶片的側面圖 及將其要部放大表示之剖面圖。 第3圖係表示實施形態之光電二極體陣列的製造歩驟中途 的過程之要部放大剖面圖。 -16- 1312199 弟4圖係表不第3圖之後繪的歩驟之要部放大剖面圖。 第5圖係表示第4圖之後續的歩驟之要部放大剖面圖。 第6圖係表示第5圖之後續的歩驟之要部放大剖面圖。 第7圖係表示第6圖之後續的歩驟之要部放大剖面圖。 第8圖係表示第7圖之後續的歩驟之要部放大剖面圖。 第9圖係表示第8圖之後續的歩驟之要部放大剖面圖。 第1 0圖係表示第9圖之後續的歩驟之要部放大剖面圖。 第1 1圖係表示有關實施形態之其他的光電二極體陣列要部予 以放大之模式剖面圖。 第1 2圖係表示有關實施形態之又另一光電二極體陣列要部予 以放大之模式剖面圖。 第1 3圖係表示有關實施形態之又另一光電二極體陣列要部予 以放大之模式剖面圖。 第1 4圖係表示具有欠缺部的透明樹脂膜之光電二極體陣列要 部予以放大之模式剖面圖。 第1 5圖係表示具有實施形態相關的光電二極體陣列之放射線 檢測器要部予以放大之模式剖面圖。 第1 6A圖係模式地表示以夾套吸附半導體晶片之狀態,係利用 平夾套吸附之狀態的剖面圖。 第1 6B圖係模式地表示以夾套吸附半導體晶片之狀態,係利用 角錐夾套吸附之狀態的剖面圖。 第1 7圖係表示先前技術之光電二極體陣列的剖面圖。 【主要代表符號說明】 1 · · •光電二極體陣列 2 · · •鈍化膜 1312199 3 · · · η型砂基板 4 ·..光電二極體 5 · · · p型不純物擴散層 6 · · •透明樹脂膜 7 · . · η+型不純物區域 8 · · •貫通配線 9 · . •電極配線 1 0 . · ·電極腳位 11· · •覆晶球下金屬(UBM) 12 · . ·凸塊電極 L · · ·光 14 · · ·穴部 15· ·.孔部 1 6 . . ·陰極電極 20 · . ·氧化矽膜 21 . · ·複晶矽膜 22 . · ·氧化矽膜 23 . · ·氧化矽膜 24 · · ·氧化矽膜 26 · · ·氮化矽膜 3 1. · •閃爍面板 3 1 a · · ·光出射面 35 · ••光學樹脂 Ί 0 ...放射線檢測器 -1 8- 1312199 144 ···光電二極體陣列 144a,144b,144c,",144n· . _ 光電二極體 15 1 · · •擴散層 1 5 2 · _ ·配線 1 5 3 _ ••配線基板 1 5 4 · . ·貫通配線 1 5 5 ·..凸塊 1 5 6 a · · ·絕緣膜
1 5 61 ··絕緣膜 1 5 6 c · _ ·絕緣膜 160 . . _平夾套 1 6 1 · · ·角錐夾套 1 6 2 · · ·晶片 16 3 · · ·間隙 1 6 4 · ·,熱塊
-19-

Claims (1)

1312199 拾、申請專利範圍: 1·一種光電二極體陣列,其特徵爲: 具備有在被檢測光之入射面側,複數個光電二極體爲以陣 列狀形成之半導體基板, 該半導體基板爲,貫通該入射面側和其背面側之貫通配 線係形成在該光電二極體, 在該半導體基板之入射面側,設置至少被覆形成有該光電 二極體的區域,用以使該被檢測光透過之樹脂膜。 2 ·如申請專利範圍第1項之光電二極體陣歹!J ,其中 將該樹脂膜設置在該半導體基板之入射面側全體。 3. 如申請專利範圍第1項或第2項之光電二極體陣列,其中 於該半導體基板,設置在鄰接的該各光電二極體間用以將各 光電二極體分離之不純物區域。 4. 一種光電二極體陣列之製造方法,其特徵爲具備有: 在由第1導電型之半導體所成的半導體基板,形成貫通該半 導體基板之兩側表面的貫通配線之第1歩驟,針對該半導體 基板之單側表面,對規定的區域添加不純物以形成複數個第 2導電型之不純物擴散層,將依各不純物擴散層和該半導體 基板之複數個光電二極體以陣列狀作配列設置之第2歩驟, 及在該半導體基板之該單側表面側,設置至少被覆形成有該 光電二極體的區域,用以使該被檢測光透過的樹脂膜之第3 歩驟。 5 .如申請專利範圍第4項之光電二極體陣列之製造方法,其中 該第1歩驟係具備有:在該半導體基板形成複數個穴部之 歩驟;在包含有該各穴部之該半導體基板之至少單側表面, -20- 1312199 形成導電性被膜之歩驟;及硏磨該丰導體基板以除去該導電 性被膜之歩驟。 6. 如申請專利範圍第4項或第5項之光電二極體陣列之製造方 法,其中 更具備有,在該第1歩驟之後,在鄰接的添加該不純物的區 域間添加其他不純物以設置第1導電型之不純物區域的歩 驟。 7. —種放射線檢測器,其特徵為具備: 由申請專利範圍第1項至第3項中任一項之光電二極體陣 歹U ;及 閃爍面板,安裝在該光電二極體陣列之該被檢測光的入射 面側,依入射的放射線而發光。 8 · —種放射線檢測器,其特徵爲具備: 由申請專利範圍第4項至第6項中任一項之製造方法所製 造之光電二極體陣列;及 閃爍面板,安裝於該光電二極體陣列之該樹脂膜設置側, 依入射的放射線而發光。 -21-
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Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7288825B2 (en) * 2002-12-18 2007-10-30 Noble Peak Vision Corp. Low-noise semiconductor photodetectors
JP4247017B2 (ja) 2003-03-10 2009-04-02 浜松ホトニクス株式会社 放射線検出器の製造方法
WO2006114716A2 (en) * 2005-04-26 2006-11-02 Koninklijke Philips Electronics, N.V. Double decker detector for spectral ct
CA2541256A1 (en) * 2006-02-22 2007-08-22 Redlen Technologies Inc. Shielding electrode for monolithic radiation detector
KR101384247B1 (ko) * 2006-04-28 2014-04-14 가부시키가이샤 한도오따이 에네루기 켄큐쇼 광전변환소자 및 광전변환소자의 제작 방법
JP4455534B2 (ja) * 2006-05-09 2010-04-21 株式会社東芝 放射線検出器およびその製造方法
GB0622695D0 (en) * 2006-11-14 2006-12-27 Element Six Ltd Robust radiation detector comprising diamond
JP4961617B2 (ja) * 2007-10-01 2012-06-27 新光電気工業株式会社 配線基板とその製造方法及び半導体装置
JP5343245B2 (ja) * 2008-05-15 2013-11-13 新光電気工業株式会社 シリコンインターポーザの製造方法
JP2009295834A (ja) * 2008-06-06 2009-12-17 Sanyo Electric Co Ltd 半導体装置及びその製造方法
JP4808748B2 (ja) * 2008-06-13 2011-11-02 浜松ホトニクス株式会社 ホトダイオードアレイの製造方法
JP2010114320A (ja) * 2008-11-07 2010-05-20 Panasonic Corp 半導体装置
JP4808759B2 (ja) * 2008-11-18 2011-11-02 浜松ホトニクス株式会社 放射線検出器
JP4808760B2 (ja) * 2008-11-19 2011-11-02 浜松ホトニクス株式会社 放射線検出器の製造方法
US8614423B2 (en) * 2009-02-02 2013-12-24 Redlen Technologies, Inc. Solid-state radiation detector with improved sensitivity
US9202961B2 (en) 2009-02-02 2015-12-01 Redlen Technologies Imaging devices with solid-state radiation detector with improved sensitivity
US8476101B2 (en) * 2009-12-28 2013-07-02 Redlen Technologies Method of fabricating patterned CZT and CdTe devices
US8860166B2 (en) * 2010-03-23 2014-10-14 Stmicroelectronics S.R.L. Photo detector array of geiger mode avalanche photodiodes for computed tomography systems
US20120015474A1 (en) * 2010-07-19 2012-01-19 Yung-Chun Wu Method for fabricating silicon heterojunction solar cells
US8753917B2 (en) * 2010-12-14 2014-06-17 International Business Machines Corporation Method of fabricating photoconductor-on-active pixel device
JP5895504B2 (ja) 2011-12-15 2016-03-30 ソニー株式会社 撮像パネルおよび撮像処理システム
JP5684157B2 (ja) * 2012-01-04 2015-03-11 株式会社東芝 半導体装置
JP6068954B2 (ja) * 2012-11-28 2017-01-25 浜松ホトニクス株式会社 フォトダイオードアレイ
JP5925711B2 (ja) * 2013-02-20 2016-05-25 浜松ホトニクス株式会社 検出器、pet装置及びx線ct装置
WO2015002281A1 (ja) * 2013-07-04 2015-01-08 コニカミノルタ株式会社 シンチレータパネル及びその製造方法
JP6281268B2 (ja) * 2013-12-06 2018-02-21 大日本印刷株式会社 ガス増幅を用いた放射線検出器
TWI656631B (zh) * 2014-03-28 2019-04-11 日商半導體能源研究所股份有限公司 攝像裝置
KR20180071802A (ko) * 2016-12-20 2018-06-28 삼성전자주식회사 이미지 센서
CN111933748A (zh) * 2020-07-22 2020-11-13 中国电子科技集团公司第十三研究所 背入射式日盲紫外探测器及其制作方法

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4110122A (en) * 1976-05-26 1978-08-29 Massachusetts Institute Of Technology High-intensity, solid-state-solar cell device
US5189297A (en) * 1988-08-29 1993-02-23 Santa Barbara Research Center Planar double-layer heterojunction HgCdTe photodiodes and methods for fabricating same
JPH0772255A (ja) * 1993-09-01 1995-03-17 Fuji Photo Film Co Ltd 放射線検出器および画像信号処理方法
US6001667A (en) 1994-03-28 1999-12-14 Seiko Instruments Inc. Method of manufacturing a semiconductor detector for detecting light and radiation
US5886359A (en) * 1996-06-13 1999-03-23 Eastman Kodak Company X-ray dectector, detection assembly, and method
DE19714689A1 (de) * 1997-04-09 1998-10-15 Siemens Ag Röntgendetektor
US6211524B1 (en) * 1997-04-18 2001-04-03 The United States Of America As Represented By The United States Department Of Energy Enhanced radiation detectors using luminescent materials
US6326652B1 (en) 1999-06-18 2001-12-04 Micron Technology, Inc., CMOS imager with a self-aligned buried contact
GB9915433D0 (en) 1999-07-01 1999-09-01 Europ Org For Nuclear Research A monolithic semiconductor detector
US6194258B1 (en) * 2000-01-18 2001-02-27 Taiwan Semiconductor Manufacturing Company Method of forming an image sensor cell and a CMOS logic circuit device
JP2001318155A (ja) 2000-02-28 2001-11-16 Toshiba Corp 放射線検出器、およびx線ct装置
JP3713418B2 (ja) * 2000-05-30 2005-11-09 光正 小柳 3次元画像処理装置の製造方法
JP2002031687A (ja) 2000-07-18 2002-01-31 Canon Inc 放射線検出装置
JP4283427B2 (ja) * 2000-08-03 2009-06-24 浜松ホトニクス株式会社 放射線検出器およびシンチレータパネル
JP4447752B2 (ja) 2000-08-03 2010-04-07 浜松ホトニクス株式会社 放射線検出器
JP2003066149A (ja) 2000-08-14 2003-03-05 Toshiba Corp 放射線検出器、放射線検出システム、x線ct装置
JP2002270808A (ja) * 2001-03-13 2002-09-20 Matsushita Electric Ind Co Ltd Mos型撮像装置
JP2003084066A (ja) * 2001-04-11 2003-03-19 Nippon Kessho Kogaku Kk 放射線検出器用部品、放射線検出器および放射線検出装置
JP2003017676A (ja) * 2001-04-27 2003-01-17 Canon Inc 放射線撮像装置およびそれを用いた放射線撮像システム
US6765276B2 (en) * 2001-08-23 2004-07-20 Agilent Technologies, Inc. Bottom antireflection coating color filter process for fabricating solid state image sensors
JP3735547B2 (ja) * 2001-08-29 2006-01-18 株式会社東芝 半導体装置及びその製造方法
JP2003066150A (ja) * 2001-08-30 2003-03-05 Canon Inc 蛍光板、放射線検出装置および放射線検出システム
JP4681774B2 (ja) * 2001-08-30 2011-05-11 キヤノン株式会社 撮像素子、その撮像素子を用いた撮像装置、及びその撮像装置を用いた撮像システム
US6462365B1 (en) * 2001-11-06 2002-10-08 Omnivision Technologies, Inc. Active pixel having reduced dark current in a CMOS image sensor
JP2003347324A (ja) * 2002-05-30 2003-12-05 Fujitsu Ltd マウント装置及び方法
JP4247017B2 (ja) 2003-03-10 2009-04-02 浜松ホトニクス株式会社 放射線検出器の製造方法
WO2004082023A1 (ja) * 2003-03-10 2004-09-23 Hamamatsu Photonics K.K. ホトダイオードアレイおよびその製造方法並びに放射線検出器
US20060138330A1 (en) * 2003-03-28 2006-06-29 Ronan Engineering Company Flexible liquid-filled ionizing radiation scintillator used as a product level detector

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