TWI300615B - Reeier substrarte capable of avoiding shift of a die thereon - Google Patents

Reeier substrarte capable of avoiding shift of a die thereon Download PDF

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Publication number
TWI300615B
TWI300615B TW094101927A TW94101927A TWI300615B TW I300615 B TWI300615 B TW I300615B TW 094101927 A TW094101927 A TW 094101927A TW 94101927 A TW94101927 A TW 94101927A TW I300615 B TWI300615 B TW I300615B
Authority
TW
Taiwan
Prior art keywords
carrier
die
semiconductor wafer
wafer
package structure
Prior art date
Application number
TW094101927A
Other languages
English (en)
Other versions
TW200627611A (en
Inventor
Sheng Tsung Liu
Chia Wei Chang
Original Assignee
Advanced Semiconductor Eng
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Semiconductor Eng filed Critical Advanced Semiconductor Eng
Priority to TW094101927A priority Critical patent/TWI300615B/zh
Publication of TW200627611A publication Critical patent/TW200627611A/zh
Application granted granted Critical
Publication of TWI300615B publication Critical patent/TWI300615B/zh

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612Auxiliary members for layer connectors, e.g. spacers
    • H01L2224/26152Auxiliary members for layer connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
    • H01L2224/26175Flow barriers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic

Landscapes

  • Wire Bonding (AREA)
  • Die Bonding (AREA)

Description

1300615 九、發明說明: 【發明所屬之技術領域】 本發明係有關一種半導體封裝之載板形成凸出塊結 構’尤指一種具防止半導體晶片在晶片黏結後的迴銲接合 中產生偏移現象的結構之載板。 【先前技術】 目别有關於表面黏著式(Surface Mount Technology, SMT)的電子構裝技術’係先將半導體晶片黏著於一載板 後’再做電路連接製程,如打線製程(Wire Bonding),以 對j半導體晶片之電氣信號作輸出與輸入。請參照第1圖 及第2圖所示,一般的銲接式晶片黏結(Die Mount)的習知 作法係首先在載板pl〇的晶粒承載座pu上,塗佈或印刷 如錫I等銲接材料p2〇,再將一半導體晶片p3〇黏結在該 銲接材料P20上,接著送入迴銲爐内完成接合。惟,當= 半導體晶片P30黏結於載板pi〇上時,該載板π〇並無任 何固定該半導體晶片Ρ3〇的定位結構,故當該銲接材^ ρ2〇通過該迴銲爐製程時,由於該銲接材料ρ2〇之熔融軟 化的鐸接特性,易使該銲接材料m溢出而造成載板削 =污木,同枯,亦使黏結於該銲接材料的半導體晶片 〇產生浮動而偏移,如此極易在後續的打線製程的精嫁 度上造成重大影響,甚至導致打線製程的失敗。 【發明内容】 1300615 體晶片30固定效果,宜在該晶粒接合區域賊邊至少抓置 -個該凸出塊12,以限制該半導體晶片3晴動的可能 續請參照第4圖,本發明之較佳實施例前視剖面示音 圖及第5圖,本發明之較佳實施例俯視示意圖。運用上^ 載板10之封裝結構至少包含:以—銲接材料2〇,如錫膏 等’先塗佈或印刷在該載板10之該晶粒承載座I,續將 一半導體晶片30 ’以該銲接材料2G接合於該晶片承載座^ 鲁上,且該半導體晶片30係位於該晶粒接合區域13内,在迴 鮮的接合製程時,由於該晶粒承载座u外圍賴之該複數 個凸出塊12形成-擔牆效果,可防止該鲜接材料2〇溢出, 造成載板10的污染,且該複數個凸出塊12亦可以防止該半 導體晶片瓣生偏移現象’㈣精確實賴續之電性導通 專製程’以提升良率。 由上述可知,本發明藉由設置具限制半導體晶片偏移 的複數個凸出塊形成晶粒接合區域之載板結構,確在防止 擊半導體晶片在接合的迴鮮製程時的過度偏移之缺失上提出 新解決方案,實已符合專利申請要件。惟以上所述者,僅 為^發明之-較佳實施例而已,並非用來限定本發明實施 之範圍#凡依本發明申請專利範圍所做的均等變化與修 飾,皆為本發明專利範圍所涵蓋。 … 1300615 【圖式簡單說明】 第1圖係先前技術之載板黏著晶粒後經迴銲製程偏移 不意圖 第2圖係第1圖之俯視示意圖 第3圖係本發明之防止晶粒偏移結構前視剖面示意圖 第4圖係本發明之較佳實施例前視剖面示意圖 第5圖係本發明之較佳實施例俯視示意圖 【主要元件符號說明】 [先前技術部分] P10載板 P11晶粒承載座 P20鲜接材料 P30半導體晶片 [本發明技術部份] 10載板 11晶粒承載座 12凸出塊 13晶粒接合區域 20銲接材料 30半導體晶片30 8

Claims (1)

1300615 修{f替 __ W 十、申請專利範圍: 1. 一種具防止晶粒偏移結構之載板,包含I 一晶粒承載座;及 複數個凸出塊,其係直接由該載板形成且凸出於該晶粒承 載座表面,其中該些凸出塊係形成一晶粒接合區域。 2. 如申請專利範圍第1項所述之具防止晶粒偏移結構之載 板,其中該複數個凸出塊係設於該晶粒承載座之四邊,且 每邊至少一個。 3. 如申請專利範圍第1項所述之具防止晶粒偏移結構之載 板,其中該載板係一導線架。 4. 如申請專利範圍第1項所述之具防止晶粒偏移結構之載 板,其中該載板係一基板(Substrate)。 5. —種封裝結構,包含: 一載板,係包含一晶粒承載座; 複數個凸出塊,其係直接由該載板形成且凸出於該晶粒承 載座表面,其中該些凸出構件係形成一晶粒接合區域; 一銲接材料,係設於該載板之該晶粒承載座上;及 一半導體晶片^其以該鮮接材料接合於該晶片承載座上’ 且該半導體晶片係位於該晶粒接合區域内。 6. 如申請專利範圍第5項所述之封裝結構,其中該複數個凸 出塊係設於該晶粒承載座四邊,且每邊至少一個。 7. 如申請專利範圍第5項所述之封裝結構,其中該載板係一 導線架(Leadframe)。 8. 如申請專利範圍第5項所述之封裝結構,其中該載板係一 1300615 基板(Substrate)。
TW094101927A 2005-01-21 2005-01-21 Reeier substrarte capable of avoiding shift of a die thereon TWI300615B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW094101927A TWI300615B (en) 2005-01-21 2005-01-21 Reeier substrarte capable of avoiding shift of a die thereon

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW094101927A TWI300615B (en) 2005-01-21 2005-01-21 Reeier substrarte capable of avoiding shift of a die thereon

Publications (2)

Publication Number Publication Date
TW200627611A TW200627611A (en) 2006-08-01
TWI300615B true TWI300615B (en) 2008-09-01

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