TWI297540B - - Google Patents

Download PDF

Info

Publication number
TWI297540B
TWI297540B TW95109677A TW95109677A TWI297540B TW I297540 B TWI297540 B TW I297540B TW 95109677 A TW95109677 A TW 95109677A TW 95109677 A TW95109677 A TW 95109677A TW I297540 B TWI297540 B TW I297540B
Authority
TW
Taiwan
Prior art keywords
lead frame
interface layer
manufacturing
carrier
recesses
Prior art date
Application number
TW95109677A
Other languages
English (en)
Chinese (zh)
Other versions
TW200737471A (en
Inventor
Chi Chih Lin
Bo Sun
Hung Jen Wang
Original Assignee
Taiwan Solutions Systems Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiwan Solutions Systems Corp filed Critical Taiwan Solutions Systems Corp
Priority to TW095109677A priority Critical patent/TW200737471A/zh
Publication of TW200737471A publication Critical patent/TW200737471A/zh
Application granted granted Critical
Publication of TWI297540B publication Critical patent/TWI297540B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
TW095109677A 2006-03-21 2006-03-21 Manufacturing method of lead-frame TW200737471A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW095109677A TW200737471A (en) 2006-03-21 2006-03-21 Manufacturing method of lead-frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW095109677A TW200737471A (en) 2006-03-21 2006-03-21 Manufacturing method of lead-frame

Publications (2)

Publication Number Publication Date
TW200737471A TW200737471A (en) 2007-10-01
TWI297540B true TWI297540B (ja) 2008-06-01

Family

ID=45069135

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095109677A TW200737471A (en) 2006-03-21 2006-03-21 Manufacturing method of lead-frame

Country Status (1)

Country Link
TW (1) TW200737471A (ja)

Also Published As

Publication number Publication date
TW200737471A (en) 2007-10-01

Similar Documents

Publication Publication Date Title
JP5690466B2 (ja) 半導体チップパッケージの製造方法
TWI364101B (en) Semiconductor package and a manufacturing method thereof
TWI466282B (zh) 一種影像感測模組封裝結構及製造方法
TWI271807B (en) Chip embedded package structure and fabrication method thereof
CN104952828A (zh) 覆晶堆叠封装结构及其制作方法
US10096567B2 (en) Package substrate and package
CN104538318A (zh) 一种扇出型圆片级芯片封装方法
CN106128965A (zh) 一种无基板封装器件的制作方法
CN109003959B (zh) 一种焊线预成型的高导热封装结构及其制造方法
CN105551988A (zh) 多层扇出型封装结构及其制备方法
CN101567355A (zh) 半导体封装基板及其制法
CN104465575B (zh) 半导体封装及其制造方法
CN109326574A (zh) 衬底结构、包含衬底结构的半导体封装和其制造方法
CN104576406B (zh) 一种封装基板的制作方法及所对应的封装基板
CN106206460B (zh) 晶片封装体及其制造方法
JP5204789B2 (ja) めっきピラーパッケージの形成
CN108538794A (zh) 表面贴装型封装结构及其制作方法
TWI297540B (ja)
CN106169427A (zh) 基于薄膜的扇出及多晶粒封装平台
TWI278979B (en) Chip package substrate and manufacturing method thereof
CN202940226U (zh) 封装基板
CN109686669A (zh) 一种集成电路封装方法及封装结构
CN106876340B (zh) 半导体封装结构及其制作方法
CN204348703U (zh) 一种扇出型圆片级芯片正装封装结构
TW201824404A (zh) 一種無基板半導體封裝製造方法

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees