TWI285845B - Mounting structure of IC tag and IC chip for mounting the same - Google Patents

Mounting structure of IC tag and IC chip for mounting the same Download PDF

Info

Publication number
TWI285845B
TWI285845B TW094117469A TW94117469A TWI285845B TW I285845 B TWI285845 B TW I285845B TW 094117469 A TW094117469 A TW 094117469A TW 94117469 A TW94117469 A TW 94117469A TW I285845 B TWI285845 B TW I285845B
Authority
TW
Taiwan
Prior art keywords
wafer
mounting
chip
antenna
conductive wire
Prior art date
Application number
TW094117469A
Other languages
English (en)
Other versions
TW200641692A (en
Inventor
Shuichi Takeuchi
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of TW200641692A publication Critical patent/TW200641692A/zh
Application granted granted Critical
Publication of TWI285845B publication Critical patent/TWI285845B/zh

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/0775Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components
    • H05K3/3426Leaded components characterised by the leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147Copper (Cu) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/4813Connecting within a semiconductor or solid-state body, i.e. fly wire, bridge wire
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485Material
    • H01L2224/48505Material at the bonding interface
    • H01L2224/48599Principal constituent of the connecting portion of the wire connector being Gold (Au)
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10386Clip leads; Terminals gripping the edge of a substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10636Leadless chip, e.g. chip capacitor or resistor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10651Component having two leads, e.g. resistor, capacitor
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Credit Cards Or The Like (AREA)
  • Details Of Aerials (AREA)

Description

1285845 九、發明說明: 【考务明戶厅屬标冷貝】 發明領域 本發明係有關於一種將ic晶片安裝於天線基板上而構 5 成之1C標籤之安裝構造及所使用之安裝用1C晶片。
L· ^tr J 發明背景 ic標籤係於形成有用以收發信號之天線之天線基板上 搭載1C晶片而構成者。天線基板則係於具有電絕緣性之薄 10膜上形成天線圖形而成者。1C標籤係於將晶片上所設之2電 極分別電性連接於天線圖形之兩端之狀態下搭載者。 對天線基板搭載ic晶片之方法眾多,舉例言之,可對 天線基板塗布黏著劑,再進行1C晶片之電極與天線圖形之 連接用端子之對位,而藉加熱及加壓將1(:晶片接合於天線 15基板上,並電性連接天線圖形與1C晶片而予以搭載。 專利文獻1 :特開2003-6600號公報 專利文獻2 :特開2〇〇4·362190號公報 【發明内容3 發明概要 20 1C標籤可伴隨小型化而利用於諸多用途上。為實現多 用迷之目的,必須以低成本大量生產1C標籤,並檢討更具 效率之製造方法。尤其,由於最近1C標藏所使用之1C晶片 極為小型,故組合忙晶片與天線基板以製造^標鐵之作業 繁雜,而需要可更簡單地將1C晶片安裝於天線基板之方法。 5 1285845 又,使用黏著劑並加熱、加壓ic晶片以將之連接於天 線基板時,若天線基板之基材為聚乙烯薄膜等耐熱性較低 者所構成,則加熱至高溫時將發生基材熔融之問題,而導 致製造上將產品加熱至高溫之程序受限之問題。 5 本發明係為解決上述問題而設計者,其目的在提供〜 種可輕易對天線基板安裝1C晶片,並藉此降低1C標籤之製 造成本之1C標籤之安裝構造及所使用之安裝用IC晶片。、 為達成上述目的,故將本發明構成如下。 即,本發明係一種1C標籤之安裝構造,係對天線圖形 10電性連接而安裝有安裝用1C晶片者,前述安裝用IC晶片係 於已使導電線材與1C晶片上所形成之電極機械性接觸而與 前述電極呈電性連接之狀態下,於IC晶片之對向側邊之外 面覆捲導電線材一圈而形成者,前述安裝用IC晶片係笋前 述‘電線材而與前述天線圖形相連接。 I5 根據上述1C標籤之安裝構造,即可簡易地進行對天線 圖形安裝安裝用1C晶片之組裝作業,並降低1€:標籤之製造 成本。 又兩述IC B曰片包含一對配置於對角位置之電極,敢 述導電線材則與前述各電極電性連接而安裝。藉此,即了 20 使安裝安裝用1C晶片之處理更加簡易。 又,前述天線圖形係形成於具有電絕緣性之底膜夺面 上者。天線圖形除設置於在底膜上形成天線圖形而成之天 線基板上以外,亦可構成僅由金屬線形成之天線。 又’前述1C標籤之安裝構造所使用之安裝用ic曰片 6 1285845 中,亦可有效使用在與ic晶片上形成之電極機械性接觸而 與前述電極電性連接之狀態下,於1C晶片之對向側邊之外 面覆捲導電線材而形成者。而,當前述1C晶片包含一對配 置於對角位置之電極,且前述導電線材與前述各電極電性 5 連接而安裝時,則可輕易進行對天線圖形之安裝作業,並 可輕易製造安裝用1C晶片。 又,本發明並係一種1C標籤之安裝構造,係對天線圖 形電性連接而安裝有1C晶片者,其中,在與前述天線圖形 對前述1C晶片之連接端重疊之平面位置上配置有IC晶片, 10且,本安裝構造係在導電線材與該1C晶片上所形成之電極 機械性接觸而與該電極電性連接之狀態下,於該IC晶片與 前述天線圖形之外面覆捲導電線材一圈,而藉該導電線材 電性連接前述1C晶片與天線圖形者。根據該1(::標籤之安裝 構造’無須用以使黏著劑熱硬化之加熱程序,即可輕易製 15 造1C標籤。 又,前述天線圖形係形成於具有電絕緣性之底膜表面 上者’前述1C晶片則配置成與前述底膜呈對向狀態,前述 1C晶片、由前述天線圖形與底膜所構成之天線基板之外面 一起被前述導電線材所覆捲一圈。 20圖式簡單說明 第1圖係顯示1C標籤之安裝構造之第1實施例之截面 圖。 第2圖係顯示安裝用1C晶片之一實施例之立體圖。 第3圖係顯示安裝用1C晶片之其他實施例之立體圖。 7 Ϊ285845 第4圖係覆捲器具之概略圖。 第5A〜5D圖係例示對天線基板安裝安裝用忙晶片之說 明圖。 第6圖係顯示1C標籤之安裝構造之第2實施例之截面 5圖。 第7圖係覆捲器具之概略圖。 第8A 8C圖係對天線基板安裝晶片之程序說明圖。 t實施冷式】 較佳實施例之詳細說明 10 以下,就本發明之1C標籤之安裝構造及其所使用之安 裝用1C晶片之實施例參照附圖加以詳細說明。 (弟1實施例) 第1圖係顯示本發明IC標籤之安裝橼造之第1實施例之 截面圖。本實施例之IC標籤之安裝構造係將安裝用IC晶片 15 10與具有電絕緣性之底膜42之表面上所形成之天線圖形 44a、44b電性連接而加以安裝而成者。安裝用1(:晶片1〇則 係藉於1C晶片20之外面覆捲導電線材12a、12b,並使其等 與成對形成於1C晶片20上之電極2〇a、20b電性連接而形成 者。 20 安裝用IC晶片10係藉將覆捲安裝於1C晶片20之導電線 材12a、12b以焊料45連接於天線圖形44a、44b之連接端而 女裝於天線基板40上。藉此,天線圖形44a、4413與1(::晶片 20即呈電性連接之狀態。 另,連接導電線材12a、12b與天線圖形44a、44b之方 8 1285.845 法除使用焊料45連接以外,亦可採用使用導電糊等導電材 • 料之方法或使用異方導電性薄膜等導電薄膜之方法等。如 上所述,連接安裝用ic晶片ίο之導電線材12a、i2b與天線 • 圖形44a、44b時,所使用之導電接合材料並無特別之限制。 5 圖示例之天線基板4〇係於底膜42之表面以直線狀形成 有一對天線圖形44a、44b之偶極型天線基板,但以平面線 圈狀形成有天線圖形之天線基板亦同樣可安裝安裝用1C晶 片10 0 第2及3圖係例不用以對天線基板4〇安裝之安裝用ic晶 10片10者。該等安裝用1C晶片10皆可以導電線材12&、1213覆 捲1C晶片20而構成與形成於1C晶片20上之電極2〇a、20b電 性連接之狀態。在1C晶片20之一面上,電極2〇a、2〇b係呈 對角配置形態。導電線材12a、12b則分別通過該等電極 20a、20b上而安裝於1C晶片20之相對2邊方向上,並圍繞1(:: 15 晶片20之外面·圈。 第2及3圖係顯不1C晶片20相同而導電線材i2a、12b之 ® 覆捲方向相差90 °之狀態者。1C晶片20之平面形狀為正方 形,電極20a、20b則配置於對角方向上,故通過電極2〇a、 20b而覆捲導電線材12a、12b之方向即如第2及3圖所示,可 20 於不同對向側邊進行覆捲。二者皆為導電線材12a、12b在 不相互交錯之配置下,保留電極20a、20b之配置間隔,而 以略平行之角度安裝於1C晶片20之狀態。 安裝用1C晶片10上,電極20a、20b與導電線材12a、12b 之電性連接係藉導電線材12a、12b對1C晶片20之電極20a、 9 1285845 20b機械性接觸而成立。即,對安裝用1C晶片10覆捲導電線 材12a、12b時,導電線材12a、12b之覆捲位置設定成與電 極20a、20b重複(交錯),而於對1C晶片20安裝導電線材12a、 12b時’保持導電線材12a、12b與電極20a、20b接觸,且電 5 極20a、20b亦與導電線材12a、12b接觸之狀態。藉此·,導 電線材12a、12b即可形成其等之全長與1C晶片20之電極 20a、20b分別電性連接之狀態。 導電線材12a、12b可使用銅線、金線等金屬細線。導 電線材12a、12b所使用之金屬細線材質並無特別限制。而, 10由於1C標籤所使用之1C晶片20係平面尺寸lmmxlmm程度 之極小型者,故必須選用對1C晶片20覆捲時導電線材12&、 12b不致相互接觸而發生電性短路之粗細之金屬細線。 為對1C晶片20機械性地覆捲導電線材12a、12b而形成 安裝用1C晶片10,可使用第4圖所示之釘書機型之覆捲器具 15 3〇。該覆捲态具30包含有一按壓部32,並設有用以收納形 成U形之導電線材12之收納部、可逐一壓出導電線材12之壓 出甲片,以及用以支撐1C晶片20之支撐台34。支撐台34上 設有用以定位1C晶片20並加以安裝之安裝部34a,安裝部 34a上則设有可令按壓部32所壓出之導電線材沿IC晶片 2〇 20之外面覆捲而予以導引之導溝。 使用覆捲器具30而對1C晶片20覆捲導電線材12之操作 如下。首先,於按壓部32位於開放位置之狀態下,對支樓 台34之安裝部34a安裝IC晶片2〇,其次,將按壓部%下壓而 以按壓部32與支撐台34夾壓1C晶片20。藉按壓部32與支撐 10 1285845 台34間之夾壓力,按壓部32之壓出甲片可壓出導電線材 12 ’再藉設於安裝部34a之導溝而導引導電線材12之覆捲位 置’導電線材12即可繞入1C晶片20之下側而於IC晶片2〇之 外面進行覆捲。 5 於支撐台34之安裝部34a上已安裝有1C晶片20之狀態 下,可將按壓部32所壓出之導電線材12之壓出位置設定成 與1C晶片20之電極20a、20b中其一之位置一致。藉此,即 可藉對安裝部34a安裝1C晶片20而進行覆捲導電線材12之 操作,而使導電線材12通過1C晶片20之任一電極上,而與 10 電極20a、20b之任一形成電性連接狀態。 對1C晶片20之電極20a、20b中任一覆捲導電線材12 後,再以與第4圖所示之方向相反之方向將ic晶片20安裝於 安裝部34a ’並進行相同之覆捲操作,即可於已電性連接其 中一電極之狀態下,對1C晶片20覆捲導電線材12。由於1C 15 晶片2〇之電極20a、20b對稱配置於對角方向,故對安裝部 34a安裝1C晶片20時,無論朝任何方向安裝ic晶片20,皆可 於電極20a、20b與導電線材12已電性連接之狀態下進行覆 捲。又,對支撐台34安裝1C晶片20時,1C晶片20之形成有 電極2〇a、20b之面可朝上亦可朝下。導電線材12由於覆捲 20於IC晶片20之外面一圈,故不拘電極方向皆可形成電極 2〇a、20b與導電線材12之電性連接狀態。 第2圖係顯示於已對1C晶片20覆捲導電線材12a、12b之 狀態下,一方朝下覆捲有導電線材12a,另一方朝上覆捲有 導電線材12b之情形者。而,第3圖中,則顯示雙方同樣朝 11 1285845 上覆捲有導電線材12a、12b之情形,其中導電線材12a之端 部並覆捲成重疊狀態。如上所述,導電線材12a、12b於覆 捲於1C晶片20之狀態下,其等之兩端可略微分離,亦可略 微重疊。 5 用以於Ic晶片20之外面覆捲導電線材12以進行安裝之 裝置,除使用第4圖所示之覆捲器具30以外,亦可使用金屬 細線之彎曲加工所使用之加工用模具。又,亦可於對JC晶 片20覆捲導電線材12時,藉單次之覆捲作業同時對1(::晶片 20覆捲2條導電線材12而安裝導電線材i2a、12b,以形成其 10 等分別與2條電極20a、20b電性連接之狀態。 如上所述,本實施例在無須區別1C晶片20之方向及表 背面之狀態下,即可加以安裝於覆捲器具3〇之支撐台34及 用以覆捲導電線材之模具上而製成安裝用1C晶片1〇,故具 備可間早製造安裝用1C晶片10之優點。又,由於無須考慮 15 1C晶片20之方向即可構成安裝用ic晶片1〇,故可簡化ic標 籤所使用之極小型1C晶片20之處理,而提昇作業性。 另,對1C晶片20覆捲導電線材12而形成安裝用ic晶片 10之方法並不限於上述之第2及3圖所示之於ic晶片20之一 面上對角配置有電極20a、20b之情形。舉例言之,亦可於 20 IC晶片20之一面及另一面上分別形成電極20a、20b,並令 電極20a、20b成對角配置,或於ic晶片20之一面上於對向 之2邊間中配置2電極20a、20b而令其等形成正相對狀態 等,即,可使電極2〇a、20b形成任意之配置位置關係。 另’藉於1C晶片20之電極20a、20b上形成電極墊並使 12 1285845 其等自1C晶片20之表面略微突出,則可確保導電線材i2a、 12b與電極20a、20b之接觸,進而確保電極2〇a、20b與導電 線材12a、12b之電性連接。又,對iC晶片20覆捲導電線材 12a、12b後,於電極20a、20b與導電線材12a、12b之直接 5接觸部分塗布導電糊等導電材料,以接合電極20a、20b與 導電線材12a、12b,則可進而確保其等相互間之電性連接。 第5圖係顯示對天線基板40安裝安裝用晶片1〇之方 法者。第5A圖則作為比較例以顯示對天線基板4〇安裝1€晶 片20而形成之習知1C標籤之安裝構造。第5B〜5D圖係顯示 10對天線基板40安裝有上述之安裝用ic晶片1〇而成之本發明 1C標籤之安裝構造。 如第5A圖所示,習知1C標籤之安裝構造係使電極2〇a、 20b與形成於天線基板40上之天線圖形44a、44b形成相對狀 態,並使電極20a、20b與端子對位而加以接合。即,IC晶 15片20係藉倒裝晶片接合法而使電極20a、20b之配置與天線 圖形44a、44b之端子對位以進行接合。 相對於此,第5B、5C圖則顯示使1C晶片20之形成有電 極20a、20b之面(表側)朝向天線基板4〇而安裝安裝用IC晶片 10之狀態,第5D圖進而顯示使IC晶片2〇之背側朝向天線基 20板而女裝女裝用1C晶片1〇之狀態。如第5B〜5D圖所示, 本實施例之安裝用1C晶片1〇可實現導電線材12&、1213與1(: 晶片20之電極20a、20b相接合,且經導電線材12a、12b而 電性導通IC晶片20與天線圖形44a、44b之狀態。因此,對 天線基板40安裝安裝用Ic晶片1〇時,無須區別安裝用1(:晶 13 1285845 片10之方向(橫向或縱向)及安裝用冗晶片1〇之表背面,即可 安裝之而電性連接天線圖形44a、441)與1(:晶片20。而,對 1C晶片20覆捲導電線材12a、121}時,可容許導電線材12a、 12b之兩端略微分離,則可援引第5B〜5D圖之例,說明導電 5線材12a、l2b之兩端即便略微分離,實際上仍無須考慮安 裝用ICa曰片1〇之方向即可安裝。即,本說明書中所述之「於 安裝用1C晶片1〇之外面覆捲導電線材12a、i2b」意指一如 先前所言,覆捲導電線材12a、12b時無須特別考慮安裝用 1C晶片10之搭載方向,逕行安裝即可。 1〇 如以上之說明,對天線基板40安裝本實施例之安裝用 1C晶片10時,可自由選擇安裝用Ic晶片10之方向,而僅藉 導電線材12a、12b與天線圖形44a、44b之對位進行安裝, 故可極為輕易而有效率地實施1C標籤之組裝作業。又,藉 此,亦可輕易實現安裝用1C晶片1〇之安裝作業之自動化。 15 另,上述實施例中,雖已就對天線基板40安裝安裝用 1C晶片10之例加以說明,但除天線基板4〇以外,亦可對僅 以金屬線構成之天線接合安裝用Ic晶片1〇而製成IC標籤。 此時,金屬線所構成之天線即相當於天線圖形。 (第2實施例) 20 第6圖係顯示本發明1C標藏之安裝構造之第2實施例之 截面圖。本實施例之1C標籤之安裝構造係使安裝IC晶片2〇 與天線基板40上所形成之天線圖形44a、44b之連接端對位 而加以配置,再一併覆捲導電線材12&、1沘於1(:晶片2〇與 天線基板40之外面,而將1C晶片20安裝於天線基板40上者。 14 1285845 第7圖顯示有用以對1(:晶片2〇與天線基板4〇併同覆捲 導電線材12之覆捲器具35,以及使用覆捲器具35而可對ic 晶片20與天線基板4〇覆捲導電線材12之方法。覆捲器具35 係形態與前述構成安裝用1C晶片10時所使用之釘書機型之 5覆捲器具30相同者,包含用以收納形成U形之導電線材12 之按壓部36,以及用以支撐天線基板4〇及1(::晶片2〇之支撐 台37。 對IC晶片2 0與天線基板4 〇同時覆捲導電線材丨2之操作 如下。首先’將天線基板40與ic晶片20安裝於支撐台37, 1〇再藉按壓部36按壓1C晶片20與天線基板4〇,而藉按壓部36 與支撐台37間之夾壓力將導電線材12自按壓部36壓出,並 使導電線材12繞入天線基板4〇之下側,以對IC晶片2〇與天 線基板40之外面覆捲導電線材12。 第8圖係自天線基板4〇之平面方向觀察對IC晶片2〇與 15天線基板40同時覆捲導電線材12之操作狀態者。 第8A圖中已放大顯示天線基板4〇之用以搭載IC晶片2〇 之部分區域。天線基板40係以直線狀形成一對天線圖形 44a、44b而成之偶極型天線基板。該天線基板4〇並以與天 線圖形44a、44b大致相同之寬度形成有底膜42,底膜42之 20下面(與搭載IC晶片20之面相反之側面)則形成有天線圖形 44a、44b ° 第8B圖係顯示天線基板4〇業經IC晶片2〇之對位及安裝 之狀態者。1C晶片20係以形成有電極20a、2〇b之側面為其 與底膜42相對之面之反側面,亦即以之為露出於外部之側 15 1285845 面而安裝於天線基板40上。 第8 C圖係顯示對IC晶片2 0與天線基板4 0覆捲導電線材 12a、12b之狀態者。導電線材i2a通過ic晶片20上所設之電 極20a ’而朝寬度方向覆捲1C晶片20之對向側邊及天線基板 5 40—圈。 導電線材12a、12b與1C晶片20之電極20a、20b之電性 導通與前述實施例中之安裝用1C晶片10相同,皆係藉導電 線材12a、12b與電極20a、20b之機械性接觸而連接。又, 導電線材12a、12b與天線基板40之天線圖形44a、44b之電 10性導通亦係藉已繞至天線基板40下側之導電線材12&、12b 壓接(接觸)天線圖形44a、44b之連接端而連接。另,天線圖 形44a、44b之連接端形成於底膜42上,而可於與IC晶片2〇 之電極20a、20b重疊(交錯)之配置狀態下,於覆捲導電線材 12a、12b時,使導電線材12a、12b之覆捲位置(通過位置) 15 與連接端交錯。 故而,根據本實施例之1C標籤之安裝構造,形成於天 線基板40上之天線圖形44a、44b與1C晶片20可藉導電線材 12a、12b而電性連接。 精機械性覆捲導電線材12a、12b之操作而將ic晶片2〇 20搭載於天線基板4〇上之方法具有以下優點,即,無須使用 黏著劑而將1C晶片20加熱黏著於天線基板4〇上,即可解決 口加熱而使天線基板40之底膜42溶融之問題,並可簡易地 組裝1C標籤。 另,上述實施例中,雖已就對偶極型天線基板4〇安裝 16 1285845 1C晶片20之例加以說明’但形成於天線基板40之天線圖形 亦可形成其它適當之圖形。且’本實施例除可對天線基板 40安裝1C晶片20之外,對僅以金屬線構成之天線安裝1C晶 片20之情形亦可適用。此時,金屬線所構成之天線即相當 5 於天線圖形。 I:圖式簡單説明3 第1圖係顯示1C標籤之安裝構造之第1實施例之截面 圖。 • 第2圖係顯示安裝用1C晶片之一實施例之立體圖。 10 第3圖係顯示安裝用1C晶片之其他實施例之立體圖。 第4圖係覆捲器具之概略圖。 第5A〜5D圖係例示對天線基板安裝安裝用Ic晶片之說 明圖。 第6圖係顯示ic標籤之安裝構造之第2實施例之截面 15 圖。
第7圖係覆捲器具之概略圖。 第8A〜8C圖係對天線基板安裝忙晶片之程序說明圖 【圖式之主要元件代表符號表】 10…安裝用1C晶片 12a、12b···導電線材 20…1C晶片 20a、20b…電極 30…覆捲器具 32…按壓部 34…支撐台 34a…安裴部 35…覆捲器具 36…按壓部 37…支撐台 40…天線基板 42…底膜 44a、44b…天線圖形 45…焊料 17

Claims (1)

1285845 十、申請專利範圍: 1. 一種1C標籤之安裝構造,係對天線圖形電性連接而安裝 有安裝用1C晶片者, 前述安裝用1C晶片係於已使導電線材與1C晶片上 5 所形成之電極機械性接觸而與前述電極呈電性連接之 狀態下,於前述1C晶片之對向側邊之外面覆捲導電線材 一圈而形成者, 前述安裝用IC晶片係藉前述導電線材而與前述天 線圖形相連接。 10 2.如申請專利範圍第1項之1C標籤之安裝構造,其中前述 1C晶片包含一對配置於對角位置之電極,而前述導電線 材則與前述各電極電性連接而安裝。 3.如申請專利範圍第1項之1C標籤之安裝構造,其中前述 天線圖形係形成於具有電絕緣性之底膜表面上者。 15 4. 一種安裝用1C晶片,係使用於申請專利範圍第1項之1C 標籤之安裝構造者, 該安裝用1C晶片係於導電線材與1C晶片上所形成 之電極機械性接觸而與前述電極呈電性連接之狀態 下,於前述1C晶片之對向側邊之外面覆捲導電線材一圈 20 而形成者。 5. 如申請專利範圍第4項之安裝用1C晶片,其中前述1C晶 片包含一對配置於對角位置之電極,前述導電線材則與 前述各電極電性連接而安裝。 6. —種1C標籤之安裝構造,係對天線圖形電性連接而安裝 18 1285845 有ic晶片者, 其中,在與前述天線圖形對前述1C晶片之連接端重 疊之平面位置上配置有1C晶片, 且,該安裝構造係在導電線材與該1C晶片上所形成 5 之電極機械性接觸而與該電極電性連接之狀態下,於該 1C晶片與前述天線圖形之外面覆捲導電線材一圈,並藉 該導電線材電性連接前述1C晶片與天線圖形者。 7.如申請專利範圍第6項之1C標藏之安裝構造,其中前述 天線圖形係形成於具有電絕緣性之底膜表面上者,而前 10 述1C晶片則配置成與前述底膜呈對向狀態, 前述1C晶片及由前述天線圖形與底膜所構成之天 線基板之外面一起被前述導電線材所覆捲一圈。 ❿ 19
TW094117469A 2005-05-24 2005-05-27 Mounting structure of IC tag and IC chip for mounting the same TWI285845B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2005/009417 WO2006126252A1 (ja) 2005-05-24 2005-05-24 Icタグの実装構造および実装用icチップ

Publications (2)

Publication Number Publication Date
TW200641692A TW200641692A (en) 2006-12-01
TWI285845B true TWI285845B (en) 2007-08-21

Family

ID=37451687

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094117469A TWI285845B (en) 2005-05-24 2005-05-27 Mounting structure of IC tag and IC chip for mounting the same

Country Status (7)

Country Link
US (1) US7868437B2 (zh)
EP (1) EP1887620A4 (zh)
JP (1) JP4610613B2 (zh)
KR (1) KR100934429B1 (zh)
CN (1) CN100592484C (zh)
TW (1) TWI285845B (zh)
WO (1) WO2006126252A1 (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5455753B2 (ja) * 2009-04-06 2014-03-26 株式会社半導体エネルギー研究所 Icカード
SE541653C2 (en) * 2017-11-03 2019-11-19 Stora Enso Oyj Method for manufacturing an RFID tag and an RFID tag comprising an IC and an antenna

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06252339A (ja) * 1993-03-02 1994-09-09 Matsushita Electric Ind Co Ltd 集積回路装置
JPH10193849A (ja) * 1996-12-27 1998-07-28 Rohm Co Ltd 回路チップ搭載カードおよび回路チップモジュール
JPH1131784A (ja) * 1997-07-10 1999-02-02 Rohm Co Ltd 非接触icカード
JP3572216B2 (ja) * 1999-02-19 2004-09-29 株式会社マースエンジニアリング 非接触データキャリア
JP2001256456A (ja) * 2000-03-10 2001-09-21 Shinko Electric Ind Co Ltd Icタグ及びその製造方法
US6486853B2 (en) * 2000-05-18 2002-11-26 Matsushita Electric Industrial Co., Ltd. Chip antenna, radio communications terminal and radio communications system using the same and method for production of the same
JP4662392B2 (ja) 2000-07-31 2011-03-30 トッパン・フォームズ株式会社 非接触型データ送受信体
JP4388707B2 (ja) 2001-02-15 2009-12-24 ヤンマー株式会社 エンジンのシリンダブロック構造
KR100414765B1 (ko) * 2001-06-15 2004-01-13 한국과학기술연구원 세라믹 칩 안테나
JP2003006600A (ja) 2001-06-22 2003-01-10 Toppan Forms Co Ltd 導電性ステープルを用いたrf−idメディアの形成方法
JP3907461B2 (ja) * 2001-12-03 2007-04-18 シャープ株式会社 半導体モジュールの製造方法
US6774470B2 (en) * 2001-12-28 2004-08-10 Dai Nippon Printing Co., Ltd. Non-contact data carrier and method of fabricating the same
JP2004362190A (ja) 2003-06-04 2004-12-24 Hitachi Ltd 半導体装置

Also Published As

Publication number Publication date
KR100934429B1 (ko) 2009-12-29
CN101180716A (zh) 2008-05-14
JP4610613B2 (ja) 2011-01-12
JPWO2006126252A1 (ja) 2008-12-25
WO2006126252A1 (ja) 2006-11-30
CN100592484C (zh) 2010-02-24
EP1887620A1 (en) 2008-02-13
KR20080003921A (ko) 2008-01-08
US20080061417A1 (en) 2008-03-13
TW200641692A (en) 2006-12-01
EP1887620A4 (en) 2012-03-21
US7868437B2 (en) 2011-01-11

Similar Documents

Publication Publication Date Title
TWI363303B (en) Rfid tag manufacturing methods and rfid tags
US10032743B2 (en) Method for producing a semiconductor module
CN103310957B (zh) 线圈部件
TW201005918A (en) Wafer level edge stacking
TW201101443A (en) Substrate having leads
JPH11328352A (ja) アンテナとicチップとの接続構造、及びicカード
EP1069645A2 (en) Semiconductor device with an antenna and fabrication method therefor
TWI426658B (zh) 環形天線及其製造方法
WO1999041699A1 (en) Ic card and its frame
TWI285845B (en) Mounting structure of IC tag and IC chip for mounting the same
JPWO2007057954A1 (ja) 半導体装置及びその製造方法
EP0282124A2 (en) Method for manufacturing a modular semiconductor power device and device obtained thereby
US6621166B2 (en) Five layer adhesive/insulator/metal/insulator/adhesive tape for semiconductor die packaging
TW201316258A (zh) 晶片卡和用於製造晶片卡之方法
JP2008294219A (ja) 半導体装置及びその製造方法
TW200406857A (en) Mounting method and mounting structure of semiconductor device, optoelectronic device, manufacturing method of optoelectronic device and electronic machine
EP2471624A1 (en) Continuous wire bonding
CN101552253B (zh) 阵列封装基板
CN101361231A (zh) 卷曲方法及由此制造的器件
EP1816592A1 (en) Method for producing a RFID tag with at least an antenna comprising two extremities and a integrated circuit chip
JPH104008A (ja) 平面コイル及びその製造方法
JP2003086621A (ja) 半導体装置およびその製造方法
JP2002092577A (ja) コンビカード及びその製造方法
JP2002329835A (ja) 導通接続部品、その製造方法及び半導体装置
JPH1117094A (ja) 半導体チップ搭載ボード及びその実装構造

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees