TWI281031B - Test structures for on-chip real-time reliability testing - Google Patents
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/2856—Internal circuit aspects, e.g. built-in test features; Test chips; Measuring material aspects, e.g. electro migration [EM]
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/12—Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing
- G01R31/1227—Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing of components, parts or materials
- G01R31/1263—Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing of components, parts or materials of solid or fluid materials, e.g. insulation films, bulk material; of semiconductors or LV electronic components or parts; of cable, line or wire insulation
- G01R31/129—Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing of components, parts or materials of solid or fluid materials, e.g. insulation films, bulk material; of semiconductors or LV electronic components or parts; of cable, line or wire insulation of components or parts made of semiconducting materials; of LV components or parts
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2642—Testing semiconductor operation lifetime or reliability, e.g. by accelerated life tests
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2884—Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/30—Marginal testing, e.g. by varying supply voltage
- G01R31/3004—Current or voltage test
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
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Description
I?81031 修正 九、發明說明: 【發明所屬之技術領域】 本發明係有關於-種使祕半導體觀之方法及裝置,特 積體電路製造中決定可靠度且鋼半導體元4使用終點之方 【先前技術】 ㈣林種專門的峨結獅使胁在積 機構包括有間極氧化物崩潰、電遷移、應力遷 使肋可該絲齡職型絲類條件進^ 難置諸^btabertr,雜服電路"年= 二Γ、成度的等效估計,其細元件電壓及電料算及操作功^ 循環為基礎,這些資料係使用於預測電路的讎壽命。’、μ --先!^及,载體注人係VLSIf路中主要可靠度磨損機構的其中 刖,CMOS製程的熱載體耐受力係由 於單獨的元件、及推_標準操_ 著元件幾何的縮短,產使用』而付到的。隨 變得俞來俞—因此,使用電流推斷方法的使用期判斷 果型VLS丨元件中模型熱載體注入的模擬效 夠去進ί這4b複雜確及】隨著設計週期的縮短’短時間有足 :的:魏程及用於所有製程差異的模型熱載體效應是為- 因此’有,要測試結構的需求,其係可納入任何元 1 ^達到-魏定的_時,將傾著元似標丨 ς二 代替晶粒,可適合置於切割道(scribe line)中、最初晶粒區中的 π、而_擬母個產品及魏的顯結構設計,且可避免 1281031 修正 =間消耗及可靠度模擬的鋪卫作。其在包含有產品處,在晶片上可 靠度監測可使_ -元件的使職終點,且標出需要取代的元件。 其他決疋可罪度因素的方法已見於美國專利第5,875,665號 (」_),絲導-種方法,其在具有科具有織賴錢力的條件 下’測量出-㈣串聯的反補上升及下降時間及傳播延遲。美國專 利第6,169,694B1號(Nam等),係教導一種進行DRAM元件的在晶片上 晶圓預燒的方法及電路,_地是,使耻方法制試氧化物膜 及電容器故障。額專利第6,136,619號(Ceunindc等)係描述-種決定 在導體中的f遷闕發抵抗力電荷㈣路及方法,單—電流源可施加 ί:ίΐ及—職導體結構兩者上,其係設置於接近半導體晶粒上, 導體結構中電流的方向係交錯仙—高,關時測試導體 、、、。構中的電流只流向-個方向,藉由交錯使用參考導體结構 流’會排除電子遷移的效應,而轉兩者結構中 電 而頻可减及故_紅方法及,這財法包含有DC輸入鮮的 以控制多種測試功能,其係包括有溫度及操作頻率。 & 【發明内容】 t發明之主要目的,係在提供—種監断靠錢構之方法,々系 匕括有熱載體效應、_氧化物時間相依介電崩潰(TDDB)、務。、 本發明之另一目的,係在提供一猶由於刼番 可靠度機構的電路。 種由於熱载體效應的關係而監測 本發明之又-目的’係在於提供—種由 電崩潰(T_的關係而監測可靠度機構的電路。减物時間相依介 本發明之又-目的,係在於提供一種由於 靠度機構的電路。 而i测可 本發明之又-目的,係在於提供—種用於標示 二當-個要監測的可靠度機構在主動元件故障前超過—個預 值日守,從而減少利用該元件的系統之停工期。 預4 口限 1281031 修正 條 使用-種系統具有三種在晶片上 的,若三種測試結構的任何一種指 ^、、、°構而獲致上述的目 元將合役成於干ir垃、“/I 使用期故障終點時,一位 完成,且將會排除使用lc時系統的停工期。纟貝^牛射早之河 成.馳賴下降,電_由㈣減器所組 衣振i讀具有自己的電晶體,其會 (降低的環振蘯器),另一個鮮湯哭目^ 熱載體效應的影響 ㈣戸α 個衣振孟為則不會戈到熱载體效應影響(非降 ?個環振盪器每個都具有固定的頻率,兩頻率 士的f率在—個㈣下閘控二進制計數II,且在另-個狀態下重設 。正好在製程之後,在每個閘控循環時,二進制計數器將會 至ϋ有限數目的計數"I"。隨著因熱載體效應使降低的環振盈器頻 以下在某些點上二進制計數器將會看到施加的較少脈衝,且計數 的,果將會為"j"(其j<j),職設計者將會決定差·),其下降的程度 曰才曰示出個可罪性的問題,且然後若(H)超過一個某種程度的預設限 制時’電路將會產生—個使用期終點的訊號。 第一種/則试結構係監測閘極氧化物TDDB的下降,複數個"η"平行 連接的電容器’係具有—應力電壓施加於其上,以致於在正常使用狀 態下’故障的_係故障某些小部份的時間,—電容的崩潰係由結構 電阻的差異所監測到的,且使用於觸發一個位元指示出使用期訊號 TDDB終點。 第二種測試結構係監測電遷移下降,·,Μ"最小寬度金屬線係平行的 連接’ 一電流係施加於其上,以致於在正常使用狀態下,故障的時間 係故障某些小部份的時間,一金屬線的崩潰係由結構電阻的差異所監 測到’且使用於觸發一個位元指示使用期訊號電遷移終點。 【實施方式] 1281031 修正 現在參閱第1圖,係顯示本發 係使用-系統具有三種在Μ 方塊圖本發明的―較佳實施例 熱載體注人(HCI)職上監_試結構,係提供一 測試結構30、及—電遷極祕物時附目依介電崩潰(TDDB) 有一邏輯輸出料Ϊ 每個測試結構(1〇、30、5〇)具 ^。達到其有用的使用期終 ^右似、、、.構中的任何—輸出—邏輯層使 指示器G、將輸f邏輯姑㈣錢丨c接近鱗且 失龍構1G健_麵下降,謂會描毅後,現在特別 ιΞΓ/ 本發彻c丨職結構1⑽—較佳實補之方塊圖, ’ ^ ^降低的%振盈器12(其不會受到熱載體效應的影響)及-降 ,的環振盪器14(其會受到熱載體效應的影響),該非降低的環振盈器 ▲2的口非降低輸出訊號a係施加於—分頻器彳6上,分頻器1崎於二進制 4數器18及—進制比較n 20提供啟動訊號17,啟動訊號17的頻率係為 非降低的輸出訊號13的-頻率分數,係由公式得知: f __ fNon-Degraded hn 2k~ 其中k=1,2,3····., 降低的環振盪器14的降低輸出訊號15係施加於二進制計數器18 的輸入上’二進制計數器18的多位元輸出19則施加於二進制比較器2〇 的輸入上’ 一進制比較器20的輸出則提供到η CL使用期終點指示器21。 現在參閱第3圖,係顯示第2圖HCL測試結構1〇的定時,應該注意 的,第3圖僅僅為電路操作的一種實施例,且實際的定時隨著需要而變 化,其係顯示非降低的輸出訊號13,在左邊的降低之前及在右邊的降 低之後顯示出降低的輸出訊號15。應該注意的是,在降低之前非降低 的輸出訊號13及降低的輸出訊號15之頻率不需要相同,但在此實施例 操作中係顯示相同的。在此實施例中,啟動訊號17(來自分頻器16的) 係為非降低輸出訊號13頻率的八分之一。在其高週期間,啟動訊號17 係提供二進制計數器的啟動,在其低週期間,啟動訊號17重設二進制 計數器,且啟動二進制比較器20的功能。若當啟動二進制計數器18時 1281031 修正本 對故障輸入界限有反應時,在降低輸出訊號15的降低(左側)之前多位 元輪.出19將會為"4"(01002),然後在降低(右側)之後多位元輸 出19將只 會,3n(〇〇1〇2)。在啟動訊號17的低週期間,比較器對照一個固定的 數字(在此實施例中為4)與多位元輸出彳9相比較,且當由一個預設的限 制使多位元輸出19小於4時發出使用期終點指示器21的信號。 然後,當το件是新的時,在每個閘控循環間,可以使二進制計數器18 作為有限數量的降低環振盪器14脈衝,隨著因熱載體效應的關係而使 降=的J辰振盪器14頻率下降,二進制計數器輝某些點上會出現施加 =少脈衝,且最後的輸出計數將會為"厂(其种。二進制比較器2〇將 會设计成為,當差異(j-j)指示出一種可靠度問題時,則電路將會產生一 使用期旗標的終點。 零 4a®巾的多對反相||可製造出降低的環振盈器 4。為了要降低跨過元件的電壓,可製造出非降低的環振蘯器,例如, 與第4a,相似,其係使用具有較長通道長度的FETs(場效電晶體)。可 使用堆豐的FETs,例如,顯示於第4b圖巾的非降低的環振盪器。第4c 圖係顯不另-種案例的非降低的還織器之—較佳實施例,其係使用 一電流鏡以降低跨過每個FETs的電位。 -第一種測試結構3〇係監測閘極氧化物tddb下降,參閱第5圖,係 =不-種用於決定使關TDDB終點的電路的一較佳實施例,係提供複 數,解行連接的電容器32,此複數個電容H32係串聯的設置,且連 f低電阻34到-個共用的電路。施加一壓力電壓%穿過一開關器 8 ’而到串聯結合在—起的複數個電容器32及低電阻腿。電容器壓 係為-個固㈣電壓,其設在丨c電源電壓_)_到18 口“係依使用的製造技術而定。為了要感測—電容器的故障,施加 古壓4〇(等於Vdd)穿過一開關器42,而到高電阻44的一端;此 另I,則繫在串聯結合在—起的複數個電容器32及低電阻 數個f容ϋ 32储由—關祕而連接到—鎖存器48。 複數個電容器32係藉由關閉開關器洲同時打開開關器42及46而 10 1281031 / 修正本 受到壓力’且藉以施加應力輕36。為了感應複數個電容㈣ 則打開開關器38同時關閉開關器42及46,此會移除應力電壓%,且施 加气應電壓40穿過高電阻44到複數個電容器上。若電容器%正確地運 作(高電阻)時,則在輸入到鎖存器48的電壓將為一邏輯 ^48的,出(使用期終點旗標)將會為"〇"(低)。在感應期間,電容%的 崩潰會藉由複數個電阻下降而監測到,藉以拉高到鎖存㈣的輸入以 邏輯(低),且鎖存器48的輸出(使用期終點旗標)將會為 第6圖係顯示韋伯__曲線的轉換,其係有用於設計td 用期終點旗標電容器測試複數個結構的電壓及區域,累計分佈函數 (cumulative distribution function,CDF)係選擇為·,其中 個電容幻2的數目4了要設計—個適當的特別產品及製程的在晶片 上TDDB監測電路’目標氧化物區域必須為所知,且必須具有拿伯分 參數(獨特的制減參數補示於第6圖)的特徵,藉由應力電壓及產 品的氧化物區域以轉換韋伯曲線⑴,韋伯曲線⑵會產 的產品。選擇電容器32的應力電壓及數目(N),以便使韋伯曲線 CDF1/N百分位係約為10年,第6圖係使用〇1%作為一實施例,但是百 为位可藉由没计者依元件使用期定義而有所改變。 -第三種測試結構50係監測電遷移下降,3^見在特別參閱第7圖,,·μ" 平行連接(最小寬度)金屬線52係將金屬線的一端連接到一共用的 路,在0_5到1.0倍的Vdd之間固定的應力電壓56,係被施加穿過開關器 58而到達金屬線52的另-端,應力霞係以金屬線52電阻及製造技術 為基礎而決定的。為了要感應一金屬線52故障,所以施加一感應電壓 60(通常為0.5倍的_)穿過開關器62而到達低電阻似的一端;此電阻 64的另-端雜在金屬線52上,金麟52係連接穿過關獅而到達 鎖存器的設定輸入。 金屬線52係藉由關閉開關器58同時打開開關器位及册而受到厣 力,且藉以施加應力電壓56。為了感應—金屬線52故障,所以將開^ 11 1281031 修正本 器58打開同時關閉開關器62及66,此會將感應電壓60施加穿過低電阻 64到複數個金屬線52。若金屬線52正確地運作(其係具有一低電阻) 時,則在輸入到鎖存器68的電壓將會為一邏輯"〇··(低),且鎖存器明的 輸出(使用期終點旗標)將會為"〇"(低)。在受到壓力期間單獨金屬線52 的故障(打開)會增加在剩餘線52的電流,而使它們有系統地打開。在 感應期間所有金屬線52的故障會藉由平行金屬線52的電阻大量增加而 監測到,藉以拉南鎖存器68的設定輸入到達一邏輯Π1"(高),且藉以設 定鎖存器68而產生一使用期終點旗標為一”1"(高)。 第8圖係顯示對數常態曲線(丨〇gn〇rma| p|〇t)的轉換,其係有用於設 計電遷移金屬線結構的應力電流及區域,在設計—種·_製程^ 產品的在晶片上電遷移監測電路中,會使用相似於TDDB設計的靜電策攀 略。必須以對數常態分佈參數(故障及形成參數的中間時間)為特徵,藉 由應力電流以轉換對數常態曲線⑴,第二對數常態曲線(2)會造成一 ^ 特別的製造技術。選顆力電流(藉由動電壓56而決定)及金屬線52 :數:⑽,以便使對數常態曲線(2)轉換的CDF(M_1)/M百分位約為1〇 元件Γ用Γ的用定一義種為一實施例’但是百分位係藉由設計者依 j明揭露-種用於在晶片上使用期終點指示器之方法 5 有效使用躺終點,其係有關於熱載體效應籲 件故障要更換。在實際元 喊更多的機構指示峨構的使用期= 二 術者能瞭解明之τ ’其目的在使熟習該技 應包含在以下所述之申請專利範^申斤7°成之纽修飾或修改,仍 【圖式簡單說明】 12 1281031 U由具體實施例配合所附的圖式詳加 ,正本 之目的、技術内容、特點及其所達成之功效。田更合易瞭解本發曰月. 第1圖係描述可靠度系統之方塊圖。 =2圖係描述用於決定何時已發生熱賴注人故 第3圖係顯示第1圖中系統之定時案例。 、…’鬼 係說明顯示第1圖降低的環振盡器之-較佳實施例。 Ϊ圖2f4(f係說明顯示第1財降低的環振奸之—較佳實施例。 第5圖係顯不使用期測試電路的TDDB終點之-較佳實施例。 =的係t一齡伯(WeibUH)曲線,係使用於決定在TDDB可靠度機
第7圖係顯示使用細試祕的錢移終點之—較佳實施例。 第8圖係顯不一種對數常態曲線(丨〇gn〇rma| _),其係用於決定在 移可靠度機構中的參數。 【主要元件符號說明】 10熱载體注入(HCI)測試結構 12非降低的環振盪器 13分頻器 14降低的環振盪器 15降低的輸出訊號 16分頻器 17啟動訊號 18二進制計數器 19多位元輸出 20二進制比較器 21使用期終點指示器 30閘極氧化物時間相依介電崩潰(TDDB0、,j試結構 32電容器 36壓力電壓 13 1281031 修正本 38開關器 40感應電壓 44高電阻 46開關器 48鎖存器 50電遷移測試結構 52金屬線 56應力電壓 62開關器 66開關器 64低電阻 68鎖存器 70使用期終點指示器
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Claims (1)
- 修正本 广、申請專利範圍: 障,其係因而預測熱載趙注入故 —臨限值而指示出故障; 丑田该頻率下降低於一個已知的 藉的!,預測•氧化物麵故障,其係藉 ,已士=:示:故當障該複數個電容器的該電阻下降低於- "障,平j接、取小寬度金屬線的電阻而預測電遷移故i度金C的電Γ個運L’且當該複數個平行連接、最小 指#山^於—個已知的臨限值而指示出故障;及 計項所述之方法,其中該環振盪器的該頻率係藉由 3^ί ^的脈衝超過—_定間隔而測量出來的。 環振項所述之方法’其中該固定間隔係由一非降低的 1申請,範圍第2項所述之方法,其中該蚊間隔係由—非降低的衣邊器、且由劃分該非降低環振盪器的頻率而決定的。 _σ申請專利範圍第1項所述之方法,其中該複數個電容器的該電阻係 由應用-感應電壓與-大電阻器串聯到該複數個電容器、及測量跨 過該複數個電容器的電壓而決定的。 6·如申明專利範圍第5項所述之方法,其中該感應電壓係等於該積體電 路的供應電壓。 7_如申請專利範圍第1項所述之方法,其中該應力電壓係該積體電路供 應電壓的1·2到1.8倍。 ’、 8·如申請專利範圍第1項所述之方法,其中該複數個電容器的數量及該 感應電壓的強度係就由轉換使用條件韋伯分亦而選擇出來的,以致 15 1281031 修疋本 於第-個故障會反映出-個典型元件使賴故障的—轉百分位。 ’ •如申請專利範圍第1項所述之方法,其帽複數個平行連接、^小金 f寬度金屬線的電阻係由應用—感應f壓與—小電阻器串該複 數個平行連接、最小寬度金屬線、及測量電壓跨過該複數個速 接、最小寬度金屬線而決定的。 10ΐΓ=:Γ9項所述之方法’其中該感應電厂堅係該積體電路 ^狀綠,其键力觸、_電路 12·ίΓΐί利範圍第1項所述之方法’其中該複數個金屬線的數量及籲 该感應電壓的強度係就由轉換使用條件對數常態分佈而選來 的,以致於第-個故障會反映出一個典型元件使用期故障的一選擇 百分位。 13.-種在-積體電路中指示出使用期終點之方法,純括有. 藉由計算-晶片上(on-chip)環振盪器的脈衝超過一個固 測量出該環減ϋ_率,·測織體注人輯,其係因熱載 而降低’且當該頻率下降低於—個已知的臨限值時而指示 丨早, 藉2用一感,壓與一大電阻器串聯到複數個電容器、及測量跨 1複,個電谷益的賴而測量出該複數個電容器的電阻,以預· 測==匕物TDDB故障’其係藉由一應力電壓而運作,且當該 該電阻降低於—個已知的臨限值而指示出故障; 精電壓與一小電阻器串聯到複數個平行連接、最小寬 =?二測量跨過該複數個平行連接、最小寬度金屬二: ί i t;:3 力_而運作,且當該複數個平行連 ΐ故Γ章:ί 電阻上升高於-個已知的臨限值而指示 16 1281031 修γρ 士 指示何時該熱載體注入故障、該閘極氧化物TDDB故障 本- 移故障其中一個發生故障。 戍'•亥電遷_ 14.如==利範圍第13項所述之方法,其中該固定間 的環振盪器而決定的。 非降低 15·如:請=範” 13項所述之方法,其中該固定間隔係由— 的%振盈為、且错由劃分該非降低環振盈器的頻率而決定 - 16_如申請專魏圍第13項所叙方法,財該感 電路的供應電壓。 销體 17_如申,專利範圍第13項所述之方法,其中該應力電壓 的供應電壓的1·2到1.8倍。 償篮東路 18==:=第13項所述之方法,其中該感應電壓係該積難狄# 19_===:r方法,其侧力麵該輯路 20·如^專利範圍第13項所述之方法,其中該複數個電容器的數 該感應電壓的強度係就由轉換使用條件韋伯分布而選擇 致於第-做障會反映出-個典型元件使關轉的選擇 \ 21.如申請專利範圍第13項所述之方法,其中該複數個金屬線的 該感應電堡的強度係就由轉換使用條件對數常態分佈而 ^ /的位以致於第-個故障會反映出—個典型元件制期故障的選擇^ · 22·-種在-積體電路中指示出使關終點之晶片上(刚邮) 係包括有: 一種用於預測熱載體注入故障之電路,係包括有: -壞振盪器,其個熱細注人產生—第―計時訊號而下降; 一環振盪器,其係因熱載體注入產生一第二計時訊號而不下降; 一2k頻率除法器,其k係為一整數; 一二進制計數器,其係具有一多位元輸出;及 17 1281031 修正本 一二進制比較器; 一種用於預測閘極氧化物TDDB故障之電路; 一種用於預測電遷移故障之電路;及 , -種用於指示出何時該熱载體注 障、或該雷凓孩於化甘* 忒閘極虱化物TDDB故 二A錢遷移故㈣巾—種發生轉時之 23·如,請專利範圍第22項所述之元件,其中·· 該=一計時訊號係施加於該二進制計數器的輸入上· 該係該2k頻率除法器的輸出上,,藉以輸出一具 倍;頻享的弟二计時訊號,其該頻率係為第二計時訊號的偷 使Hi計時訊號初始化,且能夠驅動該二進制計數器及該二進制 制計數器的該多位元輸出係施加於該 婦-個 _二_:藉二 難氧錄 一電容Hi,其係由複數辦行連接f容騎組成,該電容器係具 有終端A及B ; 。口〜、 二第一電阻器,其係在該終端B及一共用電路之間電性連接; 一應力電壓源’其係藉由一第一開關器連接到該終端A ; 一感應電壓源,其係藉由一第二開關器串聯一第二電阻器而連接到 該終端A ;及 —第二開關器,其連接該終端A到一反相器的輸入; 其中: 邊電容器組係藉由關閉該第一開關器及打開該第二開關器及該第 上二開關器而受到應力;及 5亥預测閘極氧化物TDDB故障係由打開該第一開關器及關閉第二開 18 1281031 修正本 =器=該第三開關器而決定的,且監測到該反相器的輸出邏輯狀 t ’,、中若該反相器的該輸出的該邏輯層次係為高的時後,則已 經發生該閘極氧化物TDDB故障。 25·?申明專利範圍第24項所述之元件,其中該複數個電容器的數量及 口亥感,電壓的強度係就由轉換使用條件韋伯分布而選擇出來的,以 致於第-個故障會反映出一個典型元件使用期故障的一選分 位。 26.如申請專利範圍第22項所述之元件,其中該種用於預測電遷移故障 之電路係包括有: -金屬線组,其係由複數個平行連接、最小寬度金屬線所組成,其 係具有終端A及B,其中該終端B係電性連接到一共用電路;八· 一應力電壓源,其係藉由一第一開關器連接到該終端A;, -感應電壓源,其係藉由一第二開關器與一第二電阻 到該終端A ;及 P ^ 一第三開關器,其係連接該終端A到一鎖存器的輸入· 其中: ’ 該金屬線組係藉由關閉該第一開關器及打開該第一 三開關器而受到應力;及 ^亥弟 该預測電遷移故障係藉由打開該第一開關器及關閉開第二開關器 及该第二開關器而決定,且監測到該鎖存器的輸出的邏輯狀熊,鲁 其中若該鎖存器的該輸出的該邏輯層次係為高的時後, 生該電遷移故障。 27_如申請專利範圍第26項所述之元件,其中該複數個金屬線的數量及 該感應電壓的強度係就由轉換使用條件對數常態分佈而選擇^ 的,以致於第一個故障會反映出一個典型元件使用期故障 ^ 百分位。 、、擇 19 修正本 1281031 - ^ 七、指定代表圖: (一) 本案指定代表圖為:第(1 )圖。 (二) 本代表圖之元件符號簡單說明: 10 HCI測試結構 30閘極氧化物TDDB測試結構 50 電遷移測試結構 70使用期終點指示器八、本案若有化學式時,請揭示最能顯示發明特徵的化學式:
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Families Citing this family (112)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6949822B2 (en) * | 2000-03-17 | 2005-09-27 | International Rectifier Corporation | Semiconductor multichip module package with improved thermal performance; reduced size and improved moisture resistance |
US7212022B2 (en) * | 2002-04-16 | 2007-05-01 | Transmeta Corporation | System and method for measuring time dependent dielectric breakdown with a ring oscillator |
US7126365B2 (en) * | 2002-04-16 | 2006-10-24 | Transmeta Corporation | System and method for measuring negative bias thermal instability with a ring oscillator |
US7941675B2 (en) | 2002-12-31 | 2011-05-10 | Burr James B | Adaptive power control |
US7315178B1 (en) | 2002-04-16 | 2008-01-01 | Transmeta Corporation | System and method for measuring negative bias thermal instability with a ring oscillator |
US7180322B1 (en) | 2002-04-16 | 2007-02-20 | Transmeta Corporation | Closed loop feedback control of integrated circuits |
US7849332B1 (en) | 2002-11-14 | 2010-12-07 | Nvidia Corporation | Processor voltage adjustment system and method |
US7882369B1 (en) | 2002-11-14 | 2011-02-01 | Nvidia Corporation | Processor performance adjustment system and method |
US7886164B1 (en) | 2002-11-14 | 2011-02-08 | Nvidia Corporation | Processor temperature adjustment system and method |
US7271608B1 (en) * | 2002-11-25 | 2007-09-18 | Ridgetop Group, Inc. | Prognostic cell for predicting failure of integrated circuits |
US7228242B2 (en) | 2002-12-31 | 2007-06-05 | Transmeta Corporation | Adaptive power control based on pre package characterization of integrated circuits |
US7949864B1 (en) | 2002-12-31 | 2011-05-24 | Vjekoslav Svilan | Balanced adaptive body bias control |
US6891359B2 (en) * | 2003-01-24 | 2005-05-10 | International Business Machines Corporation | Circuitry and methodology to establish correlation between gate dielectric test site reliability and product gate reliability |
US6831451B1 (en) * | 2003-06-16 | 2004-12-14 | Advanced Micro Devices, Inc. | Method for adjusting a Weibull slope for variations in temperature and bias voltage |
US6806696B1 (en) * | 2003-06-16 | 2004-10-19 | Advanced Micro Devices, Inc. | Method for determining a Weibull slope having a bias voltage variation adjustment |
TWI220079B (en) * | 2003-07-29 | 2004-08-01 | Macronix Int Co Ltd | Adjustable frequency AC drive control circuit |
US7010463B1 (en) * | 2003-10-14 | 2006-03-07 | The United States Of America As Represented By The Secretary Of The Army | Method of determining whether an improved item has a better mean lifetime than an existing item |
US7230812B2 (en) * | 2003-11-21 | 2007-06-12 | Agere Systems Inc | Predictive applications for devices with thin dielectric regions |
US7109734B2 (en) * | 2003-12-18 | 2006-09-19 | Xilinx, Inc. | Characterizing circuit performance by separating device and interconnect impact on signal delay |
US7692477B1 (en) | 2003-12-23 | 2010-04-06 | Tien-Min Chen | Precise control component for a substrate potential regulation circuit |
US7649402B1 (en) | 2003-12-23 | 2010-01-19 | Tien-Min Chen | Feedback-controlled body-bias voltage source |
US7012461B1 (en) | 2003-12-23 | 2006-03-14 | Transmeta Corporation | Stabilization component for a substrate potential regulation circuit |
US7129771B1 (en) | 2003-12-23 | 2006-10-31 | Transmeta Corporation | Servo loop for well bias voltage source |
US7282937B2 (en) * | 2003-12-31 | 2007-10-16 | Intel Corporation | On-chip frequency degradation compensation |
JP4091562B2 (ja) | 2004-03-29 | 2008-05-28 | ファナック株式会社 | モータ駆動装置 |
EP1596210A1 (en) * | 2004-05-11 | 2005-11-16 | Interuniversitair Micro-Elektronica Centrum (IMEC) | Method for lifetime determination of submicron metal interconnects |
US7635992B1 (en) | 2004-06-08 | 2009-12-22 | Robert Paul Masleid | Configurable tapered delay chain with multiple sizes of delay elements |
US7173455B2 (en) | 2004-06-08 | 2007-02-06 | Transmeta Corporation | Repeater circuit having different operating and reset voltage ranges, and methods thereof |
US7304503B2 (en) | 2004-06-08 | 2007-12-04 | Transmeta Corporation | Repeater circuit with high performance repeater mode and normal repeater mode, wherein high performance repeater mode has fast reset capability |
US7405597B1 (en) * | 2005-06-30 | 2008-07-29 | Transmeta Corporation | Advanced repeater with duty cycle adjustment |
US7142018B2 (en) | 2004-06-08 | 2006-11-28 | Transmeta Corporation | Circuits and methods for detecting and assisting wire transitions |
US7336103B1 (en) * | 2004-06-08 | 2008-02-26 | Transmeta Corporation | Stacked inverter delay chain |
US7498846B1 (en) | 2004-06-08 | 2009-03-03 | Transmeta Corporation | Power efficient multiplexer |
US7071747B1 (en) | 2004-06-15 | 2006-07-04 | Transmeta Corporation | Inverting zipper repeater circuit |
US7562233B1 (en) | 2004-06-22 | 2009-07-14 | Transmeta Corporation | Adaptive control of operating and body bias voltages |
US7774625B1 (en) | 2004-06-22 | 2010-08-10 | Eric Chien-Li Sheng | Adaptive voltage control by accessing information stored within and specific to a microprocessor |
US7102358B2 (en) * | 2004-06-29 | 2006-09-05 | Intel Corporation | Overvoltage detection apparatus, method, and system |
US7330080B1 (en) | 2004-11-04 | 2008-02-12 | Transmeta Corporation | Ring based impedance control of an output driver |
DE102004059643B4 (de) * | 2004-12-10 | 2009-11-12 | Infineon Technologies Ag | Gateansteuerschaltung für einen Leistungstransistor mit isoliertem Gate |
US7592842B2 (en) | 2004-12-23 | 2009-09-22 | Robert Paul Masleid | Configurable delay chain with stacked inverter delay elements |
US7106088B2 (en) * | 2005-01-10 | 2006-09-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of predicting high-k semiconductor device lifetime |
US7739531B1 (en) | 2005-03-04 | 2010-06-15 | Nvidia Corporation | Dynamic voltage scaling |
US7338817B2 (en) * | 2005-03-31 | 2008-03-04 | Intel Corporation | Body bias compensation for aged transistors |
US20060267621A1 (en) * | 2005-05-27 | 2006-11-30 | Harris Edward B | On-chip apparatus and method for determining integrated circuit stress conditions |
US7663408B2 (en) * | 2005-06-30 | 2010-02-16 | Robert Paul Masleid | Scannable dynamic circuit latch |
US7394681B1 (en) | 2005-11-14 | 2008-07-01 | Transmeta Corporation | Column select multiplexer circuit for a domino random access memory array |
US8717777B2 (en) | 2005-11-17 | 2014-05-06 | Avx Corporation | Electrolytic capacitor with a thin film fuse |
US7414485B1 (en) | 2005-12-30 | 2008-08-19 | Transmeta Corporation | Circuits, systems and methods relating to dynamic ring oscillators |
US7642866B1 (en) | 2005-12-30 | 2010-01-05 | Robert Masleid | Circuits, systems and methods relating to a dynamic dual domino ring oscillator |
US7550986B2 (en) * | 2006-04-27 | 2009-06-23 | Infineon Technologies Ag | Semiconductor wafer having a dielectric reliability test structure, integrated circuit product and test method |
US7495466B1 (en) | 2006-06-30 | 2009-02-24 | Transmeta Corporation | Triple latch flip flop system and method |
US7710153B1 (en) | 2006-06-30 | 2010-05-04 | Masleid Robert P | Cross point switch |
GB2440764B (en) * | 2006-08-09 | 2011-03-02 | Advanced Risc Mach Ltd | Integrated circuit wearout detection |
US20080036487A1 (en) * | 2006-08-09 | 2008-02-14 | Arm Limited | Integrated circuit wearout detection |
DE102006039546B4 (de) * | 2006-08-23 | 2010-04-15 | Infineon Technologies Ag | Verfahren und Mess-Schaltung zum Bestimmen der Zuverlässigkeit eines integrierten Schaltkreises |
US7532457B2 (en) * | 2007-01-15 | 2009-05-12 | Avx Corporation | Fused electrolytic capacitor assembly |
US7936153B2 (en) * | 2007-02-06 | 2011-05-03 | International Business Machines Corporation | On-chip adaptive voltage compensation |
US8615767B2 (en) * | 2007-02-06 | 2013-12-24 | International Business Machines Corporation | Using IR drop data for instruction thread direction |
US8022685B2 (en) * | 2007-02-06 | 2011-09-20 | International Business Machines Corporation | Temperature dependent voltage source compensation |
US7895454B2 (en) * | 2007-02-06 | 2011-02-22 | International Business Machines Corporation | Instruction dependent dynamic voltage compensation |
US7971035B2 (en) * | 2007-02-06 | 2011-06-28 | International Business Machines Corporation | Using temperature data for instruction thread direction |
US7865750B2 (en) * | 2007-02-06 | 2011-01-04 | International Business Machines Corporation | Fan speed control from adaptive voltage supply |
US7495519B2 (en) * | 2007-04-30 | 2009-02-24 | International Business Machines Corporation | System and method for monitoring reliability of a digital system |
US9134782B2 (en) | 2007-05-07 | 2015-09-15 | Nvidia Corporation | Maintaining optimum voltage supply to match performance of an integrated circuit |
JP5016990B2 (ja) * | 2007-06-19 | 2012-09-05 | 株式会社日立製作所 | ディジタル保護制御装置及びその保守管理システム |
KR100870423B1 (ko) * | 2007-06-27 | 2008-11-26 | 주식회사 하이닉스반도체 | 반도체메모리소자 |
US7521952B2 (en) * | 2007-07-30 | 2009-04-21 | International Business Machines Corporation | Test structure for electromigration analysis and related method |
US8005880B2 (en) * | 2007-08-24 | 2011-08-23 | International Business Machines Corporation | Half width counting leading zero circuit |
US8185572B2 (en) * | 2007-08-24 | 2012-05-22 | International Business Machines Corporation | Data correction circuit |
US7889013B2 (en) * | 2007-08-28 | 2011-02-15 | Intel Corporation | Microelectronic die having CMOS ring oscillator thereon and method of using same |
US8095907B2 (en) | 2007-10-19 | 2012-01-10 | International Business Machines Corporation | Reliability evaluation and system fail warning methods using on chip parametric monitors |
KR100921830B1 (ko) * | 2007-12-27 | 2009-10-16 | 주식회사 하이닉스반도체 | 반도체 메모리 장치의 퓨즈 모니터링 회로 |
US8370663B2 (en) | 2008-02-11 | 2013-02-05 | Nvidia Corporation | Power management with dynamic frequency adjustments |
KR100949264B1 (ko) * | 2008-06-10 | 2010-03-25 | 주식회사 하이닉스반도체 | 반도체 소자의 모니터링 회로 |
US7952378B2 (en) * | 2008-12-31 | 2011-05-31 | Texas Instruments Incorporated | Tunable stress technique for reliability degradation measurement |
US8362794B2 (en) * | 2009-07-23 | 2013-01-29 | International Business Machines Corporation | Method and system for assessing reliability of integrated circuit |
US9256265B2 (en) | 2009-12-30 | 2016-02-09 | Nvidia Corporation | Method and system for artificially and dynamically limiting the framerate of a graphics processing unit |
US9830889B2 (en) | 2009-12-31 | 2017-11-28 | Nvidia Corporation | Methods and system for artifically and dynamically limiting the display resolution of an application |
JP2011165796A (ja) * | 2010-02-08 | 2011-08-25 | Renesas Electronics Corp | 劣化検出回路 |
US8839006B2 (en) | 2010-05-28 | 2014-09-16 | Nvidia Corporation | Power consumption reduction systems and methods |
FR2964749A1 (fr) * | 2010-09-14 | 2012-03-16 | St Microelectronics Sa | Procede et dispositif de mesure de fiabilite d'un circuit integre |
US8729920B2 (en) | 2010-11-24 | 2014-05-20 | International Business Machines Corporation | Circuit and method for RAS-enabled and self-regulated frequency and delay sensor |
US8754655B2 (en) | 2011-08-11 | 2014-06-17 | International Business Machines Corporation | Test structure, method and circuit for simultaneously testing time dependent dielectric breakdown and electromigration or stress migration |
WO2013027739A1 (ja) * | 2011-08-24 | 2013-02-28 | 日本電気株式会社 | 劣化診断回路および劣化診断方法 |
US8917104B2 (en) | 2011-08-31 | 2014-12-23 | International Business Machines Corporation | Analyzing EM performance during IC manufacturing |
US9047990B2 (en) | 2011-10-10 | 2015-06-02 | International Business Machines Corporation | Determination of series resistance of an array of capacitive elements |
US8890556B2 (en) | 2011-10-26 | 2014-11-18 | International Business Machines Corporation | Real-time on-chip EM performance monitoring |
CN103091625B (zh) * | 2013-01-25 | 2014-12-10 | 中国人民解放军国防科学技术大学 | 一种微小卫星用芯片的筛选方法 |
US9551744B2 (en) * | 2013-02-04 | 2017-01-24 | Hamilton Sundstrand Corporation | Detecting early failures in printed wiring boards |
US9791499B2 (en) | 2014-05-20 | 2017-10-17 | International Business Machines Corporation | Circuit to detect previous use of computer chips using passive test wires |
US10060974B2 (en) | 2014-12-18 | 2018-08-28 | Globalfoundries Inc. | Electrical circuit odometer sensor array |
US9851397B2 (en) | 2015-03-02 | 2017-12-26 | Globalfoundries Inc. | Electromigration testing of interconnect analogues having bottom-connected sensory pins |
US10591531B2 (en) * | 2015-06-10 | 2020-03-17 | Qualcomm Incorporated | Method and apparatus for integrated circuit monitoring and prevention of electromigration failure |
US10103060B2 (en) | 2015-06-18 | 2018-10-16 | Globalfoundries Inc. | Test structures for dielectric reliability evaluations |
DE102015116094A1 (de) | 2015-09-23 | 2017-03-23 | Intel IP Corporation | Eine Vorrichtung und ein Verfahren zum Vorhersagen eines zukünftigen Zustandes einer elektronischen Komponente |
JP6703398B2 (ja) | 2015-12-25 | 2020-06-03 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
KR102424369B1 (ko) | 2016-01-20 | 2022-07-22 | 삼성전자주식회사 | 시뮬레이션 시간을 단축할 수 있는 반도체 집적 회로의 신뢰성 불량률 예측 방법 및 그 장치 |
US10634714B2 (en) * | 2016-02-23 | 2020-04-28 | Intel Corporation | Apparatus and method for monitoring and predicting reliability of an integrated circuit |
US10295589B2 (en) | 2016-03-15 | 2019-05-21 | International Business Machines Corporation | Electromigration wearout detection circuits |
US9866221B2 (en) | 2016-05-24 | 2018-01-09 | International Business Machines Corporation | Test circuit to isolate HCI degradation |
US10222412B2 (en) * | 2016-06-01 | 2019-03-05 | Taiwan Semiconductor Manufacturing Co., Ltd. | IC degradation management circuit, system and method |
EP3542172B1 (en) * | 2016-11-16 | 2023-06-21 | Smartkable, LLC | Method and apparatus for predicting failures in direct current circuits |
CN107576895B (zh) * | 2017-08-29 | 2020-02-21 | 上海华力微电子有限公司 | 适用于tddb的原位侦测热点方法 |
US10901023B2 (en) | 2018-08-09 | 2021-01-26 | Nxp B.V. | Apparatuses and methods involving adjustable circuit-stress test conditions for stressing regional circuits |
KR102576342B1 (ko) | 2018-11-23 | 2023-09-07 | 삼성전자주식회사 | 반도체 장치 및 반도체 장치의 동작 방법 |
DE102018222414A1 (de) * | 2018-12-20 | 2020-06-25 | Robert Bosch Gmbh | Segmentierter Leistungstransistor mit Alterungsmanagement |
US10725089B1 (en) * | 2019-08-26 | 2020-07-28 | Nanya Technology Corporation | Semiconductor device and operating method thereof |
CN113552457B (zh) * | 2020-04-03 | 2022-11-15 | 长鑫存储技术有限公司 | 测试电路及半导体测试方法 |
US11531056B2 (en) | 2020-04-15 | 2022-12-20 | Infineon Technologies Ag | Predictive chip-maintenance |
US11275110B2 (en) | 2020-04-15 | 2022-03-15 | Infineon Technologies Ag | Semiconductor package with predictive safety guard |
CN111812485A (zh) * | 2020-06-10 | 2020-10-23 | 西安电子科技大学 | 一种集成电路老化失效预警方法及电路 |
US20220011795A1 (en) * | 2021-09-27 | 2022-01-13 | Intel Corporation | Control Apparatus, Device, Method and Computer Program for Determining a Device-Specific Supply Voltage for a Semiconductor Device |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5625288A (en) * | 1993-10-22 | 1997-04-29 | Sandia Corporation | On-clip high frequency reliability and failure test structures |
US5587665A (en) * | 1995-07-18 | 1996-12-24 | Vlsi Technology, Inc. | Testing hot carrier induced degradation to fall and rise time of CMOS inverter circuits |
EP0907085A1 (en) * | 1997-10-03 | 1999-04-07 | Interuniversitair Microelektronica Centrum Vzw | A method for measuring electromigration-induced resistance changes |
KR100278926B1 (ko) * | 1998-05-25 | 2001-01-15 | 김영환 | 풀리 온 칩 웨이퍼 레벨 번-인 테스트 회로 및그 방법 |
US6535014B2 (en) * | 2000-01-19 | 2003-03-18 | Lucent Technologies, Inc. | Electrical parameter tester having decoupling means |
WO2001080305A2 (en) * | 2000-04-17 | 2001-10-25 | Board Of Regents, The University Of Texas System | Electromigration early failure distribution in submicron interconnects |
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US6724214B2 (en) | 2004-04-20 |
TW200406590A (en) | 2004-05-01 |
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