TWI265626B - Non-volatile memory and manufacturing method and operating method thereof - Google Patents

Non-volatile memory and manufacturing method and operating method thereof

Info

Publication number
TWI265626B
TWI265626B TW094128349A TW94128349A TWI265626B TW I265626 B TWI265626 B TW I265626B TW 094128349 A TW094128349 A TW 094128349A TW 94128349 A TW94128349 A TW 94128349A TW I265626 B TWI265626 B TW I265626B
Authority
TW
Taiwan
Prior art keywords
doped region
bit line
memory
volatile memory
manufacturing
Prior art date
Application number
TW094128349A
Other languages
English (en)
Other versions
TW200709394A (en
Inventor
Ching-Sung Yang
Wei-Zhe Wong
Original Assignee
Powerchip Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Powerchip Semiconductor Corp filed Critical Powerchip Semiconductor Corp
Priority to TW094128349A priority Critical patent/TWI265626B/zh
Priority to US11/307,871 priority patent/US20070040197A1/en
Application granted granted Critical
Publication of TWI265626B publication Critical patent/TWI265626B/zh
Publication of TW200709394A publication Critical patent/TW200709394A/zh
Priority to US12/341,984 priority patent/US20090134452A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7887—Programmable transistors with more than two possible different levels of programmation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0441—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates
    • G11C16/0458—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates comprising two or more independent floating gates which store independent data
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
    • G11C16/0475—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS] comprising two or more independent storage sites which store independent data
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
    • H01L29/7923—Programmable transistors with more than two possible different levels of programmation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
TW094128349A 2005-08-19 2005-08-19 Non-volatile memory and manufacturing method and operating method thereof TWI265626B (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
TW094128349A TWI265626B (en) 2005-08-19 2005-08-19 Non-volatile memory and manufacturing method and operating method thereof
US11/307,871 US20070040197A1 (en) 2005-08-19 2006-02-26 Non-volatile memory, manufacturing method and operating method thereof
US12/341,984 US20090134452A1 (en) 2005-08-19 2008-12-22 Non-volatile memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW094128349A TWI265626B (en) 2005-08-19 2005-08-19 Non-volatile memory and manufacturing method and operating method thereof

Publications (2)

Publication Number Publication Date
TWI265626B true TWI265626B (en) 2006-11-01
TW200709394A TW200709394A (en) 2007-03-01

Family

ID=37766650

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094128349A TWI265626B (en) 2005-08-19 2005-08-19 Non-volatile memory and manufacturing method and operating method thereof

Country Status (2)

Country Link
US (2) US20070040197A1 (zh)
TW (1) TWI265626B (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI584415B (zh) * 2015-07-23 2017-05-21 物聯記憶體科技股份有限公司 P型非揮發性記憶體
US10141323B2 (en) 2016-01-04 2018-11-27 Taiwan Semiconductor Manufacturing Company, Ltd. Non-volatile memory and method of manufacturing the same

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090309149A1 (en) * 2008-06-12 2009-12-17 Thomas Nirschl Memory cell arrangements and methods for manufacturing a memory cell arrangement
CN101968972B (zh) * 2010-07-23 2016-04-13 上海华虹宏力半导体制造有限公司 分裂栅快闪存储单元的编程验证方法
CN102376361B (zh) * 2010-08-09 2016-03-02 上海华虹宏力半导体制造有限公司 具有虚拟接地阵列的快闪存储器
CN101986389B (zh) * 2010-10-12 2015-06-24 上海华虹宏力半导体制造有限公司 闪存单元、闪存装置及其编程方法
CN102184745B (zh) * 2011-03-15 2015-12-02 上海华虹宏力半导体制造有限公司 闪存及其编程方法
CN103165612B (zh) * 2011-12-09 2015-08-26 中国科学院微电子研究所 一种闪存存储器及其制作方法
CN103077742B (zh) * 2012-12-21 2017-02-08 上海华虹宏力半导体制造有限公司 行译码电路及存储器
CN103151356B (zh) * 2013-02-26 2017-08-25 上海华虹宏力半导体制造有限公司 一种eeprom存储阵列结构及其制造方法
CN103824593B (zh) * 2014-03-07 2017-02-22 上海华虹宏力半导体制造有限公司 闪存单元的操作方法
US9466731B2 (en) * 2014-08-12 2016-10-11 Empire Technology Development Llc Dual channel memory
CN110277399B (zh) * 2019-05-15 2021-12-07 上海华力集成电路制造有限公司 Sonos存储器及其制造方法
TWI739695B (zh) * 2020-06-14 2021-09-11 力旺電子股份有限公司 轉壓器
US11437392B2 (en) * 2020-07-28 2022-09-06 Globalfoundries Singapore Pte. Ltd. Compact memory cell with a shared conductive select gate and methods of making such a memory cell
US11309324B2 (en) * 2020-07-28 2022-04-19 Globalfoundries Singapore Pte. Ltd. Compact memory cell with a shared conductive word line and methods of making such a memory cell
TWI773482B (zh) * 2020-09-15 2022-08-01 力旺電子股份有限公司 記憶體結構及其操作方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6255166B1 (en) * 1999-08-05 2001-07-03 Aalo Lsi Design & Device Technology, Inc. Nonvolatile memory cell, method of programming the same and nonvolatile memory array
JP4923318B2 (ja) * 1999-12-17 2012-04-25 ソニー株式会社 不揮発性半導体記憶装置およびその動作方法
JP4715024B2 (ja) * 2001-05-08 2011-07-06 セイコーエプソン株式会社 不揮発性半導体記憶装置のプログラム方法
JP2004071646A (ja) * 2002-08-01 2004-03-04 Nec Electronics Corp 不揮発性半導体記憶装置及びその製造方法と制御方法
US7488645B2 (en) * 2005-04-13 2009-02-10 United Microelectronics Corp. Method of fabricating a non-volatile memory

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI584415B (zh) * 2015-07-23 2017-05-21 物聯記憶體科技股份有限公司 P型非揮發性記憶體
US10141323B2 (en) 2016-01-04 2018-11-27 Taiwan Semiconductor Manufacturing Company, Ltd. Non-volatile memory and method of manufacturing the same
TWI651834B (zh) * 2016-01-04 2019-02-21 台灣積體電路製造股份有限公司 非揮發性記憶體及其製造方法
US10784276B2 (en) 2016-01-04 2020-09-22 Taiwan Semiconductor Manufacturing Company Ltd. Non-volatile memory and method of manufacturing same

Also Published As

Publication number Publication date
US20070040197A1 (en) 2007-02-22
TW200709394A (en) 2007-03-01
US20090134452A1 (en) 2009-05-28

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MM4A Annulment or lapse of patent due to non-payment of fees