TWI255977B - Method for monitoring an internal control signal of a memory device and apparatus therefor - Google Patents
Method for monitoring an internal control signal of a memory device and apparatus thereforInfo
- Publication number
- TWI255977B TWI255977B TW093136823A TW93136823A TWI255977B TW I255977 B TWI255977 B TW I255977B TW 093136823 A TW093136823 A TW 093136823A TW 93136823 A TW93136823 A TW 93136823A TW I255977 B TWI255977 B TW I255977B
- Authority
- TW
- Taiwan
- Prior art keywords
- signal
- memory device
- pulse width
- monitoring
- internal control
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 3
- 238000012544 monitoring process Methods 0.000 title abstract 3
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/1201—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details comprising I/O circuitry
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/48—Arrangements in static stores specially adapted for testing by means external to the store, e.g. using direct memory access [DMA] or using auxiliary access paths
Landscapes
- Dram (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020040034896A KR100608365B1 (ko) | 2004-05-17 | 2004-05-17 | 메모리 장치의 내부 제어 신호를 측정하는 방법 및 장치 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200538904A TW200538904A (en) | 2005-12-01 |
| TWI255977B true TWI255977B (en) | 2006-06-01 |
Family
ID=35310752
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW093136823A TWI255977B (en) | 2004-05-17 | 2004-11-30 | Method for monitoring an internal control signal of a memory device and apparatus therefor |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US7451360B2 (zh) |
| KR (1) | KR100608365B1 (zh) |
| CN (1) | CN100533585C (zh) |
| TW (1) | TWI255977B (zh) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002190532A (ja) * | 2000-12-19 | 2002-07-05 | Hitachi Ltd | 半導体記憶装置 |
| KR100525107B1 (ko) * | 2004-02-06 | 2005-11-01 | 주식회사 하이닉스반도체 | 메모리 장치의 동작 주파수 변동에 따라 비트라인 감지증폭기와 데이타 감지 증폭기를 연결하는 데이타 버스의동작을 제어하는 신호의 인에이블 구간을 제어하는 방법과그 장치 |
| US7778089B2 (en) * | 2006-09-29 | 2010-08-17 | Hynix Semiconductor Inc. | Semiconductor memory device including write driver control circuit and write driver control method |
| TWI305653B (en) * | 2006-09-29 | 2009-01-21 | Nanya Technology Corp | Apparatus and related method for controlling switch module in memory by detecting operation voltage of memory |
| KR100917618B1 (ko) * | 2007-12-27 | 2009-09-17 | 주식회사 하이닉스반도체 | 클럭 생성 회로와 그의 구동 방법 |
| KR101507122B1 (ko) | 2008-04-29 | 2015-04-01 | 삼성전자주식회사 | 반도체 메모리 장치 및 그것의 액세스 방법 |
| US7936625B2 (en) * | 2009-03-24 | 2011-05-03 | Seagate Technology Llc | Pipeline sensing using voltage storage elements to read non-volatile memory cells |
| KR101124293B1 (ko) * | 2009-12-28 | 2012-03-28 | 주식회사 하이닉스반도체 | 테스트 모드 신호 생성장치 및 방법 |
| JP5764075B2 (ja) * | 2012-01-06 | 2015-08-12 | ルネサスエレクトロニクス株式会社 | パスワード認証回路と方法 |
| US8817557B2 (en) * | 2012-06-12 | 2014-08-26 | SK Hynix Inc. | Semiconductor memory device and an operation method thereof |
| US20140122916A1 (en) * | 2012-10-31 | 2014-05-01 | Guadalupe J. Garcia | Reducing the overhead associated with frequency changes in processors |
| CN108257641B (zh) * | 2018-04-18 | 2023-08-11 | 长鑫存储技术有限公司 | 用于半导体存储器的存储矩阵及半导体存储器 |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4174539A (en) * | 1978-11-01 | 1979-11-13 | Control Data Corporation | Magnetic bubble memory detector-amplifier |
| KR950004855B1 (ko) * | 1992-10-30 | 1995-05-15 | 현대전자산업 주식회사 | 반도체 메모리 소자의 어드레스 전이 검출 회로 |
| US5386517A (en) * | 1993-01-26 | 1995-01-31 | Unisys Corporation | Dual bus communication system connecting multiple processors to multiple I/O subsystems having a plurality of I/O devices with varying transfer speeds |
| US5519883A (en) * | 1993-02-18 | 1996-05-21 | Unisys Corporation | Interbus interface module |
| KR0164395B1 (ko) * | 1995-09-11 | 1999-02-18 | 김광호 | 반도체 메모리 장치와 그 리이드 및 라이트 방법 |
| US6247138B1 (en) * | 1997-06-12 | 2001-06-12 | Fujitsu Limited | Timing signal generating circuit, semiconductor integrated circuit device and semiconductor integrated circuit system to which the timing signal generating circuit is applied, and signal transmission system |
| US6115836A (en) * | 1997-09-17 | 2000-09-05 | Cypress Semiconductor Corporation | Scan path circuitry for programming a variable clock pulse width |
| US6433607B2 (en) * | 1998-01-21 | 2002-08-13 | Fujitsu Limited | Input circuit and semiconductor integrated circuit having the input circuit |
| US6934049B1 (en) * | 1999-09-13 | 2005-08-23 | Minolta Co., Ltd. | Data processing apparatus |
| JP2004014054A (ja) * | 2002-06-10 | 2004-01-15 | Renesas Technology Corp | 半導体集積回路装置 |
| JP4246977B2 (ja) * | 2002-08-29 | 2009-04-02 | 富士通マイクロエレクトロニクス株式会社 | 半導体メモリ |
| KR100545705B1 (ko) * | 2003-12-01 | 2006-01-24 | 주식회사 하이닉스반도체 | 능동적 지연회로를 갖는 반도체 소자 및 그를 위한 방법 |
| KR100608355B1 (ko) * | 2004-03-25 | 2006-08-08 | 주식회사 하이닉스반도체 | 메모리 장치의 동작 주파수 변동에 따른 내부 제어 신호의인에이블 구간을 제어하는 장치와 그 방법 |
-
2004
- 2004-05-17 KR KR1020040034896A patent/KR100608365B1/ko active IP Right Grant
- 2004-11-30 US US10/999,340 patent/US7451360B2/en active Active
- 2004-11-30 TW TW093136823A patent/TWI255977B/zh not_active IP Right Cessation
-
2005
- 2005-02-02 CN CNB2005100062456A patent/CN100533585C/zh not_active Expired - Fee Related
-
2008
- 2008-10-01 US US12/243,292 patent/US7702967B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| US20090024882A1 (en) | 2009-01-22 |
| TW200538904A (en) | 2005-12-01 |
| US7451360B2 (en) | 2008-11-11 |
| US20050257121A1 (en) | 2005-11-17 |
| US7702967B2 (en) | 2010-04-20 |
| CN100533585C (zh) | 2009-08-26 |
| KR20050110076A (ko) | 2005-11-22 |
| KR100608365B1 (ko) | 2006-08-08 |
| CN1700346A (zh) | 2005-11-23 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |