TWI234226B - Method of fabricating dielectric layer - Google Patents
Method of fabricating dielectric layer Download PDFInfo
- Publication number
- TWI234226B TWI234226B TW092135666A TW92135666A TWI234226B TW I234226 B TWI234226 B TW I234226B TW 092135666 A TW092135666 A TW 092135666A TW 92135666 A TW92135666 A TW 92135666A TW I234226 B TWI234226 B TW I234226B
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- Taiwan
- Prior art keywords
- dielectric layer
- substrate
- film
- oxide film
- item
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title abstract description 7
- 238000000034 method Methods 0.000 claims abstract description 92
- 239000000758 substrate Substances 0.000 claims abstract description 59
- 150000004767 nitrides Chemical class 0.000 claims abstract description 46
- 239000004065 semiconductor Substances 0.000 claims abstract description 6
- 238000005121 nitriding Methods 0.000 claims description 26
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 claims description 25
- KRHYYFGTRYWZRS-UHFFFAOYSA-N hydrofluoric acid Substances F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 25
- 239000000243 solution Substances 0.000 claims description 23
- 238000007254 oxidation reaction Methods 0.000 claims description 19
- 230000003647 oxidation Effects 0.000 claims description 18
- 239000007789 gas Substances 0.000 claims description 14
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 12
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 11
- 239000001301 oxygen Substances 0.000 claims description 11
- 229910052760 oxygen Inorganic materials 0.000 claims description 11
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 claims description 10
- 230000015572 biosynthetic process Effects 0.000 claims description 9
- 238000001039 wet etching Methods 0.000 claims description 8
- 239000011259 mixed solution Substances 0.000 claims description 6
- QPJSUIGXIBEQAC-UHFFFAOYSA-N n-(2,4-dichloro-5-propan-2-yloxyphenyl)acetamide Chemical compound CC(C)OC1=CC(NC(C)=O)=C(Cl)C=C1Cl QPJSUIGXIBEQAC-UHFFFAOYSA-N 0.000 claims description 6
- 229910000069 nitrogen hydride Inorganic materials 0.000 claims description 6
- 229910021529 ammonia Inorganic materials 0.000 claims description 5
- 239000007853 buffer solution Substances 0.000 claims description 5
- 238000004140 cleaning Methods 0.000 claims description 5
- 239000000203 mixture Substances 0.000 claims description 5
- 239000002253 acid Substances 0.000 claims description 4
- 238000009279 wet oxidation reaction Methods 0.000 claims description 4
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 claims description 3
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 3
- 238000005229 chemical vapour deposition Methods 0.000 claims description 3
- 238000010438 heat treatment Methods 0.000 claims description 3
- 239000001257 hydrogen Substances 0.000 claims description 3
- 229910052739 hydrogen Inorganic materials 0.000 claims description 3
- 125000004435 hydrogen atom Chemical class [H]* 0.000 claims description 3
- 238000005406 washing Methods 0.000 claims description 3
- 239000000872 buffer Substances 0.000 claims description 2
- 238000002360 preparation method Methods 0.000 claims 3
- KYARBIJYVGJZLB-UHFFFAOYSA-N 7-amino-4-hydroxy-2-naphthalenesulfonic acid Chemical compound OC1=CC(S(O)(=O)=O)=CC2=CC(N)=CC=C21 KYARBIJYVGJZLB-UHFFFAOYSA-N 0.000 claims 1
- 238000000605 extraction Methods 0.000 claims 1
- QSHDDOUJBYECFT-UHFFFAOYSA-N mercury Chemical compound [Hg] QSHDDOUJBYECFT-UHFFFAOYSA-N 0.000 claims 1
- 229910052753 mercury Inorganic materials 0.000 claims 1
- 239000010410 layer Substances 0.000 description 27
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 18
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 9
- 229910052757 nitrogen Inorganic materials 0.000 description 8
- 239000008367 deionised water Substances 0.000 description 7
- 229910021641 deionized water Inorganic materials 0.000 description 7
- 238000010586 diagram Methods 0.000 description 4
- 238000004945 emulsification Methods 0.000 description 4
- VHUUQVKOLVNVRT-UHFFFAOYSA-N Ammonium hydroxide Chemical compound [NH4+].[OH-] VHUUQVKOLVNVRT-UHFFFAOYSA-N 0.000 description 3
- 235000011114 ammonium hydroxide Nutrition 0.000 description 3
- 229910001873 dinitrogen Inorganic materials 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 241001674048 Phthiraptera Species 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- SEOYNUHKXVGWFU-UHFFFAOYSA-N mu-oxidobis(oxidonitrogen) Chemical group O=NON=O SEOYNUHKXVGWFU-UHFFFAOYSA-N 0.000 description 2
- 238000005096 rolling process Methods 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- 241000251468 Actinopterygii Species 0.000 description 1
- UGFAIRIUMAVXCW-UHFFFAOYSA-N Carbon monoxide Chemical compound [O+]#[C-] UGFAIRIUMAVXCW-UHFFFAOYSA-N 0.000 description 1
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 1
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 1
- 241000196324 Embryophyta Species 0.000 description 1
- 241001465754 Metazoa Species 0.000 description 1
- 240000007594 Oryza sativa Species 0.000 description 1
- 235000007164 Oryza sativa Nutrition 0.000 description 1
- 206010070834 Sensitisation Diseases 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 101100450085 Silene latifolia SlH4 gene Proteins 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000003796 beauty Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000000460 chlorine Substances 0.000 description 1
- 229910052801 chlorine Inorganic materials 0.000 description 1
- 238000010924 continuous production Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 150000004985 diamines Chemical class 0.000 description 1
- AZLYZRGJCVQKKK-UHFFFAOYSA-N dioxohydrazine Chemical compound O=NN=O AZLYZRGJCVQKKK-UHFFFAOYSA-N 0.000 description 1
- 229910001882 dioxygen Inorganic materials 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000011010 flushing procedure Methods 0.000 description 1
- 238000002309 gasification Methods 0.000 description 1
- 210000004907 gland Anatomy 0.000 description 1
- 229910052735 hafnium Inorganic materials 0.000 description 1
- -1 hafnium nitride Chemical class 0.000 description 1
- 229910000449 hafnium oxide Inorganic materials 0.000 description 1
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 235000012054 meals Nutrition 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000008267 milk Substances 0.000 description 1
- 210000004080 milk Anatomy 0.000 description 1
- 235000013336 milk Nutrition 0.000 description 1
- 239000012071 phase Substances 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
- UAJUXJSXCLUTNU-UHFFFAOYSA-N pranlukast Chemical compound C=1C=C(OCCCCC=2C=CC=CC=2)C=CC=1C(=O)NC(C=1)=CC=C(C(C=2)=O)C=1OC=2C=1N=NNN=1 UAJUXJSXCLUTNU-UHFFFAOYSA-N 0.000 description 1
- 229960004583 pranlukast Drugs 0.000 description 1
- 238000002407 reforming Methods 0.000 description 1
- 235000009566 rice Nutrition 0.000 description 1
- 230000008313 sensitization Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
- 239000002689 soil Substances 0.000 description 1
- 210000002784 stomach Anatomy 0.000 description 1
- 239000004575 stone Substances 0.000 description 1
- 239000012808 vapor phase Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/02—Pretreatment of the material to be coated
- C23C16/0227—Pretreatment of the material to be coated by cleaning or etching
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/34—Nitrides
- C23C16/345—Silicon nitride
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/56—After-treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02247—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by nitridation, e.g. nitridation of the substrate
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/3143—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers
- H01L21/3144—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers on silicon
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/3143—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers
- H01L21/3145—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers formed by deposition from a gas or vapour
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
- H01L21/02052—Wet cleaning only
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
- H01L29/513—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/518—Insulating materials associated therewith the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/954—Making oxide-nitride-oxide device
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Inorganic Chemistry (AREA)
- Formation Of Insulating Films (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Description
J234226 五、發明說明(1) 【本發明所屬之技術領域】 本發明關於一種制 t ^ ±f ^ ^ ^ R 禋衣備介電層的方法,特別是一種高介 %吊數的介%層的形成方法。 【先前技術】 如一般技藝所味 人 膜來獲得,但像沾::電層可由氣化石夕基板的二氧化石夕 說,有其限制 5 K勺一氧化石夕膜對於作為間極氧化層來 因而為了解# #操^ 釦腺笠㈢古古/樣的問題,也有採用氮化膜或是氧化 層氮化膜(NO膜或是的介電層開發中。不過’當單 身的微裂紋以及孔同二作為介電層日夺,會發生氮化膜本 當使用氧化组(Ta0):n引發漏電流的問題。另一方面 本身的結構成“5甚電層時,由於氧化组(Ta2〇5)膜 相。Λ 了權尸▽机甚^疋,因而其崩潰電壓特性不甚理 m度〜_度=電壓特性,必須在4⑽度低溫及 資成本。 门來回滅熱理好幾次,因而增加設備的投 【本發明之内容】 因此,本發明$日 崩、生Φ阿批从 之目的為解決上述問題,並提供一改善 朋,貝t壓特性的簡易製裎。 為了達成前述目的,士 a 步赞士 π ·植w 1 本發明的介電層的形成方法包括 載人μ + 1乎處理的半導體基板;藉著將基板 理·俨〜丨★ ^ π 氣化勝同時提供基板做第一氮化處 工王,攸弟一爐官取出有窠一备儿^ ίΰ] Q# Μ ^ ^ ^ JLr; ^ 虱化膜之基板形成第一氧化膜 1 J ^糟者當基板被取出時征虛介〆, 了么、應空軋提供基板做第一氮化處
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理;藉著裝載有第一氧化膜的基板進入第二爐管 五、發明說明(2) 丁”、基板做弟-氮化處理;以及藉著提供第二 乳化艇的上表面做第二氧化處理來形成第二氧化膜。 ⑽二淨Λ理製程是使用—氫氟酸(HF)與氫氣酸緩衝液 :巧蝕刻溶液。或是使用稀釋氨水⑽4〇h)、雙氧水 甚ΐ,ΓΛ離子水(DIW)之混合液或—硫酸(㈣)溶液當作 濕蝕刻浴液,以便在基板表面上形成初始的氧化膜。 qnn。/、第一氮化處理程序中,在溫度與壓力設定在600到 3到1 8 〇 5到76 〇托耳的條件下的第一爐管執行熱處理 3到1 8 0刀4里,同時供給氨氣() 〇 ,,在取出程序中,從第一爐管取出基板前最後一個階段 =度,保持在3〇〇到6_,並在Ρ爐管中供應包 氣的空氣。 千、 第二氮化處理程序是使用一在溫度6 0 0到8 0 0。(:以及厨 :〇5到2托耳條件下利用介於叫+叫與SiH2Ci2 + NH3之ς 的混合氣體的化學氣相沉積法。 Η第二氧化膜形成程序是使用選自濕氧化法、乾氧化法 ,臭氧氧化法其中的一種方法且第二氧化膜形成程序是在 弟二爐管中進行,而不是在第一與第二爐管。 為了達成本發明前述目的,本發明的介電層的形成方 法,括:提供一被洗淨處理的半導體基板;藉著將基板载 入第一爐管形成第一氮化膜同時提供基板做第一氮化處 理;從第一爐管取出有第一氮化膜之基板形成第一氧化犋 同時藉著當基板被取出時供應空氣提供基板做第一氮化處
第9頁 1234226 五、發明說明(3) 理,藉著裝載有第一氧化膜的基板進入第二爐管形成第二 氮化膜同時提供基板做第二氮化處理;以及藉著提供第二 氣化膜的上表面做第二氧化處理來形成第二氧化膜。 洗淨處理製程是使用一氫氟酸(IIF)與氫氟酸緩衝液 (β〇Ε)之濕飯刻溶液。或是使用稀釋氨水(nii4oh)、雙氧水 (I】2 〇2 )與去離子水(J) I W )之混合液或一硫酸(丨]2 S )溶液當 作濕飯刻溶液,以便在基板表面上形成初始的氧化膜。 _到第mi化處,及第二氮化處理程序是使用一在溫度 與un C1 +ΝΓ及:Γ. I5到2托耳條件下利用介於SiH4+NH3 之間的混合氣體的化學氣相沉積法。 弟一軋化處理程序中,氯畜4μ 、 物复中夕 户、拉广,η η丨〇 η 和乳氣與惰性氣體的混合 J /、甲之一在溫度6 〇 〇到8 〇 〇它 才主條件下被供給。 i力〇 . 〇 5到1 〇 〇毫米汞 第一氮化膜、第一氧化膜鱼m _ 到60埃(A )。 、/、弟一虱化膜的總厚度為30 也成苐一氮化膜、第一氧化 ^ 在第一栌# 士 # / 少孔化與弟二氮化膜的程序是 管中淮广 弟一乳化膜的程序是在第二爐 s〒進仃,不是在第一爐管。 η疋 < 牙腺 形成第一氮化膜、第—氧化 化膜的#广β^ 乳化、弟二氮化膜與第二氧 眠的%序是在相同的爐管中進 ^ 私 【本發明之實施方式】 ° 本發明之較佳實施例藉由相關 , 丄 免重覆敏枯 ^ η - 和關圖不加以詳細描述。為 同之參考數字來代表。 楗及之相同兀件以相
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名先,半導體基板先進行洗淨處理,以移除表面上殘 留之氧=膜以及雜質=洗淨進度完畢,則在基板上形成介 電層。這時候,依洗淨過程需要可使用氫氟酸(HF)與氫氟 酸緩衝液(BOE )之濕餘刻溶液。或是使用稀釋氨水 (niI4〇ii)、雙氧水(ηλ)與去離子水(DIW)之混合液或一硫酸 (II2 S04)溶液當作濕蝕刻溶液。 如果使用氫氟酸(HF )與氫氟酸緩衝液(B〇E)之濕蝕刻 溶液,當基板洗淨時,則不會有殘留氧化膜。如果使用使 用稀釋氨水(〇4〇11)、雙氧水(H2〇2)與去離子水(DI之混合 液或一硫酸(I〗2S〇4)溶液當作濕蝕刻溶液,當基板洗淨時, 則會有約1 0埃左右的氧化膜在表面上形成。因此根據使用 的洗淨液’可決定介電層成長於基板上的N0N0結構或是 ONONO結構。 五、發明說明(4) 第1 a圖至第1 d圖為用於說明根據本發明第一實施例製 造ONONO介電層之截面圖; 如第1 a圖所示,根據本發明第一實施例製造训训〇介 電層包括使用稀釋氨水〇114〇11)、雙氧水(H2 02 )與去離子水 (DIW)之混合液或硫酸(H2S〇4)溶液當作濕蝕刻溶液,以便 在基板1表面上形成第一氧化膜3。 接著’第lb圖所示,含第一氧化膜3的基板載入至第$ 一爐管’同時供給氨氣(NI]3)進行第一氮化處理程序中,使 第一氮化膜5 (氮化矽或氮氧化矽)可成長於第一氧化膜3。 第一氮化處理程序的溫度與壓力設定在6 〇 〇到9 〇 〇它以及 0 · 0 5到7 6 0托耳的條件下的執行熱處理3到1 8 〇分鐘。
第11頁 1234226 五、發明說明(5) 接下來,含第一氮化膜5可 的 ^ _ 第二氧化膜7可以在第一氮化膜仃弟、一乳化處理,使得 膜、:-氮化膜與第二氮化膜的總;J為=,第-氧化 弟—氧化處理過程可在進行當二:‘、、、矣(A )。 進行。此時十爐管並不需要匕處:的第-爐管 如氮氣沖盒。 戈另外降低氧含量裝置,諸 第一氧化處理過程可在從第一 膜5基板後,並在第一爐管中通入官取出形成第一氮化 氧氣與空氣一起透過第一焯广氧氣,。^ 表面形成第二氧化膜γ,在取出在第一氮化膜5的 度是保持在3 0 0到6 0 0 t:。 王序刚最後一個階段的溫 在本發明第一實施例中, —一 _ 氣的第一爐管形成,使得第二t ^化處理過程可在含氧 5的基板上形成。因此,如果形乳化可在含第一氮化膜 諸如乾氧法或溼氧法的直接成第二氧化膜7的過程可由 及第一氮化膜5的表面可被氧化。去來形成,則基板的介面 成第二氧化膜7的氧化處理法。因此可使用空氣作為形 因此’如弟lc圖所示,步恭 次載入第二爐管(未顯示)進ΐ有第二氧化膜7的基板再 化膜9。第二氮化處理程序是使$ ~ 化處理以形成第二氮 及壓力0.05到2托耳條件下一在溫度60 0到8 0 0以 之間的混合氣體的化學氣相沉積法於。SlMNH3與SlH2Cl2 + NH3
接者’裝載有弟二氮化胺Q Γ去曰r 一、、佳一笼- ^ / 9的基板再次載入第三爐管 (未喊不)進仃…化處理以形成第三氧化膜U。
$ 12頁 1234226 五、發明說明(6) 第三氧化膜1 1主要作用為避免微裂紋以及孔洞現象, 其形成程序疋使用選自濕氧化法、乾氧化法與臭氧氧化法 其中的一種方法。 ^ =上述過程所示,第一氧化膜3、第一氮化膜5、第二 氧化膜7、第二氮化犋Θ以及第三氧化膜11可在基本上形成 0_0的結構。 因此’閘極電極的金屬膜,或是多晶矽膜1 3可沈積在 含ΟΝΟ NO的結構的介電居上。 乐2圖為為用於說明根據先前發明單一氮化層之0N0結 才ί及t發明第一實施例之多層氮化層0ΝΟΝ〇結構分別的電 流電壓圖。 处挑如Γ2圖所示’本發明第一實施例之多層氮化層⑽0Ν0 二的=先丽發明單一氮化層之ΟΝΟ結構相比,在不減少電 容的情況下獲得补篝u ^ 又传改善的崩潰電壓特性。 根據本發明第一命 方式可春产一乐 只施例,形成0Ν0Ν0結構的介電層之 刀八」无在弟一愤答之 生π N”結構,以及| _ 0Ν0"結構’在第二爐管產 0Ν0Ν0結構的介+ ^卑三爐管產生"結構。然而,形成 構,在第二爐管\8生%可先在第一爐管產生"NON”結 同第二氮化處理 t而構。此時’形成11 NON"結構可如 第3a圖至第以圖為用於最好是30〜60埃。 ^义說明根據本發明第二實施例製
第13頁 程,通入氧氣形成米 $弟一氮化膜之"N ”結構之相同過 二氮化處理,形成^後^化犋的生"0”結構,接著進行第 成"non"結構不超過^化骠的"N”結構。一般建議 1234226 — --‘ 五、發明說明(7) 造ΝΟΝΟ介電層之截面圖; 根據本發明第二實施例之Ν0Ν0結構(第一氮化膜,第 一氧化膜,第二氮化膜,第二氧化膜),首先基本表面進 用氫氟酸(HF)與氫氟酸緩衝液(β〇Ε)之濕蝕刻溶液洗 乎处理製程。接著根據本發明第一實施例的相同程序,第 :氮化膜及第一氧化膜可連續在第一爐管於洗淨的基板上 形成(未顯:)。而第二氮化膜在第二爐管内形成(未顯 不-以及第—氧化膜在第三爐管内形成(未顯示)。 r万:f 了上述之方法外,+第-氮化膜’第-氧化 版,弟^氮,化膜的_結構可在第一爐管内產生,接著第 一氧化膜的〇結構可在第_、據 此主A ^弟一爐官内產生。同時,殘留在 及雜質可經由洗淨過程完全去除。 示),接著可進行第一氮化處理板士21载人至第一爐管(未顯 Ρ ^ ^ φ 里來形成第一氮化膜2 3。此 日守,弟一氮化處理過程可由鱼. 8〇〇以及壓力0.05到2托耳條= 爐管以溫度600到 S4C12+NIL之間的混合氣體的^利用介於SlH4 + NH3與 條件與本發明第-實施例中第一:氣相沉積法來獲得。此 的。 乐—氮化處理的條件是一樣 接下來,含第一氮化膜2 3的| 程來形成第-氧化膜。纟此情=板:以,行第-氧化過 一爐管中以溫度6 0 0到8 0 0 t以及戊i弟一氧化過程可在第 下利用介於氧氣與鈍氣,諸如2力Uj到100托耳條件 合氣體來形成。同時,建議第a Γ*氬氣、以及氦氣的混 找弟—乳化膜25的厚度不超過15 1234226
五、發明說明(8) 埃。 因而,如第3c圖所示,含 e 行第二氮化過程來形成第_ ^ 乳挺2 5的基板可以進 氮化過程可在第-爐ί::;化膜27。在此情況下,第二 行。 、 氮化過程相同條件下進 接下來,含第二氮化與2 7的美 (未顯示),並接著以第-气土板可以适進第二爐管 上表面形成第二氧化膜2 9。同日士 ,、,在弟二氮化膜2 7 理過程可在第一爐管中進行 守 形成第一氧化膜2 9的處 第二氧化膜29主要是猻& π、 濕氧化法、乾氧化法與臭洞及微裂紋,並使用選自 外,建議所有第—氮化膜2平3: : η -種方法。另 化膜2 7的厚度不超過丨〇 〇垃 氧化朕2 5,以及第二氮 如上所述之連續過程,一& + 矣。 25,第二氮化膜27以及第二 ^化朕23,第一氧化膜 來形成含ΝΟΝΟ結構的介電膜29,形成於基板21上, 夕居所* ’本發明作為介電層0Ν0Ν0還有選定ΝΟΝΟ的 多層構造可由厚度很薄的氮化膜 ^、疋⑽⑽的 因此,栌栌*八Μ 户烬^儿之則夾者乳化膜來形成0 口此根抓本發明之多層虱化層姓播冷止a α 〇 層之結構相比,在不滅少電容的;= 单:J化 壓特性’因而降低製造成本及新機台的二;。。的朋〉貝電
第15胃 1234226 圖式簡單說明 第1 a圖至第1 d圖為用於說明根據本發明第一實施例製 造〇NON〇介電層之截面圖; 第2圖為為用於說明根據先前發明單一氮化層之ΟΝΟ結 構及本發明第一實施例之多層氮化層ΟΝΟ NO結構分別的電 流電壓圖; 第3 a圖至第3 d圖為用於說明根據本發明第二實施例製 造ΝΟΝΟ介電層之截面圖; 【圖式中元件名稱與符號對照】 1 3 :非晶矽膜 1 >21 基 板 5 ^ 23 第 一 氮 化 膜 3 > 2 5 第 -^ 氧 化 膜 9 >27 第 —- 氮 化 膜 7 ^ 29 第 二 氧 化 膜 1 1 ··第三氧化膜
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Claims (1)
1234226 -------- 六、申請專利範圍 1.種製備介電層的方法,該方法包含下列步驟: $,二被洗淨處理的半導體基板; _ Α :^載基板進入第一爐管形成第一氮化膜’同時提 t、暴板做弟一氮化處理; 膜,ΐ日t二爐管取出有第一氮化膜之基板,形成第一氧化 化處理^糟者當基板被取出時供應空氣提供基板做第一氮 I化:^ f: ί有第—氧化膜的基板進入第二爐管形成第二 I化,Τ =提供基板做第二氮化處理;以及, 第二t:ί供弟二氮化膜的上表面做第二氧化處理,形成 2甘=申請專利範圍第丨項所述之一種製備介電層的方 液⑽Ε)之^處^夜程是使用—氯氟酸(HF)與氫氟酸緩衝 3甘=申請專利範圍第1項所述之一種製備介電層的方 中洗淨處理製程是使用—稀釋氨水(nmh)、雙 ΐ# Λ離子水(DIW)之混合液或一硫酸(H2S〇4)溶液當作 一濕蝕刻洛液以便在基板表面上形成一初始的氧化膜。 、4.如申請專利範圍第1項所述之一種製備介電層的方 法,其中,在第一氮化處理程序中,在溫度與壓力# A 6 0 0到9 0 0 C以及〇. 〇5到760毫米汞柱的條件下的第—您 執仃一熱處理3到180分鐘,同時供給氨氣(NIl3)氣體。B 5.如申請專利範圍第丨項所述之一種製備介電居的 法,其中,在取出程序中,從第一爐管取出基板前e最後—
第17頁 1234226 六、申請專利範圍 個階段的溫度是保持在3 0 0到6 0 0 °C。 6. 如申請專利範圍第1項所述之一種製備介電層的方 法,其中,在取出程序中,在第一爐管中供應包含氧氣的 空氣。 7. 如申請專利範圍第1項所述之一種製備介電層的方 法,其中第二氮化處理程序是使用一在溫度6 0 0到8 0 0 °C以 及壓力0. 05到2毫米汞柱條件下利用介於SiH4 + NH3與8丨112(:12 + NH3之間的混合氣體的化學氣相沉積法。 8. 如申請專利範圍第1項所述之一種製備介電層的方 法,其中第二氧化膜形成程序是使用選自濕氧化法、乾氧 化法與臭氧氧化法其中的一種方法。 9 ·如申請專利範圍第1項所述之一種製備介電層的方 法,其中第二氧化膜形成程序是在第三爐管中進行,而不 是在第一與第二爐管。 1 0. —種製備介電層的方法,該方法包含下列步驟: 提供,^被洗淨處理的半導體基板; 藉著提供基板做第一氮化處理形成第一氮化膜; 藉著提供有第一氮化膜的基板做第一氮化處理形成第 一氧化膜; 藉著提供有第一氧化膜的基板做第二氮化處理形成第 二氮化膜;以及, 藉著提供第二氮化膜的上表面做第二氧化處理形成第 二氧化膜。 1 1 ·如申請專利範圍第1 0項所述之一種製備介電層的
第18頁 1234226 ------ 六、申請專利範圍 ΐ ΐππΐ:洗淨處理製程是使用—氫氟酸(HF)與氫I酸緩 衡液(BOE)之濕蝕刻溶液。 方12·如申請專利範圍第10項所述之一種製備介電層的 水。^\中洗淨處理製程是使用—稀釋氨水(ΝΗ40Ι_Ι)、雙氧 作—2濕^刻t離Λ水(DIW)之混合液或一硫酸(H2S〇4)溶液當 i q ^ ^,夜以便在基板表面上形成一初始的氧化膜。 方法,並^中申裳請^利範圍第1 〇項所述之一種製備介電層的 到8〇〇它以及厭^第二氮化處理程序是使用一在溫度600 + ΝΗ3與SiH C1 ^ · 05到2宅米汞柱條件下,利用介於SiH4 /4 ' , 2 3之間的混合氣體的化學氣相沉積法。 方法,其ϋ中請々專利圍第10項所述之一種製備介電層的 氣體的混合物^ : 一氧化處理程序中,氧氣和氧氣與惰性 100毫朱泉口你、之™在溫度60〇到80(TC以及壓力0.05到 1 5水柱條件下被供給。 方法,其中申二θ一專^利範圍第1 0項所述之一種製備介電層的 度為3 0到6〇 化膜、第一氧化膜與第二氮化膜的總厚 方法,其申明專利範圍第1 〇項所述之一種製備介電層的 程序是^ I =成,一氮化膜、第一氧化膜與第二氮化s膜的 第二爐=:Γ爐管中進行,而形成第二氧化膜的程序是在 | rj 進行,不是在第一爐管。 方法,·Jt如申請專利範圍第10項所述之一種製備介電層的 第二气^ t形成第—氮化膜、第一氧化膜、第二氮化膜與 版的程序是在相同的爐管中進行。
第19頁
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US7652320B2 (en) * | 2005-03-03 | 2010-01-26 | Macronix International Co., Ltd. | Non-volatile memory device having improved band-to-band tunneling induced hot electron injection efficiency and manufacturing method thereof |
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US7977227B2 (en) * | 2005-08-15 | 2011-07-12 | Macronix International Co., Ltd. | Method of manufacturing a non-volatile memory device |
US7414282B2 (en) * | 2005-08-15 | 2008-08-19 | Macronix International Co., Ltd. | Method of manufacturing a non-volatile memory device |
US7718491B2 (en) * | 2006-06-16 | 2010-05-18 | Macronix International Co., Ltd. | Method for making a NAND Memory device with inversion bit lines |
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US6180538B1 (en) * | 1999-10-25 | 2001-01-30 | Advanced Micro Devices, Inc. | Process for fabricating an ONO floating-gate electrode in a two-bit EEPROM device using rapid-thermal-chemical-vapor-deposition |
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US6586349B1 (en) | 2002-02-21 | 2003-07-01 | Advanced Micro Devices, Inc. | Integrated process for fabrication of graded composite dielectric material layers for semiconductor devices |
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