TW571478B - Voltage limiting protection for high frequency power device - Google Patents
Voltage limiting protection for high frequency power device Download PDFInfo
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- TW571478B TW571478B TW091115533A TW91115533A TW571478B TW 571478 B TW571478 B TW 571478B TW 091115533 A TW091115533 A TW 091115533A TW 91115533 A TW91115533 A TW 91115533A TW 571478 B TW571478 B TW 571478B
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- 239000003990 capacitor Substances 0.000 claims abstract description 20
- 239000004065 semiconductor Substances 0.000 claims abstract description 20
- 239000013078 crystal Substances 0.000 claims 2
- 230000005611 electricity Effects 0.000 claims 1
- 238000007789 sealing Methods 0.000 claims 1
- 238000000926 separation method Methods 0.000 claims 1
- 238000003466 welding Methods 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 abstract description 4
- 235000012431 wafers Nutrition 0.000 description 5
- 238000004806 packaging method and process Methods 0.000 description 2
- 230000001065 anti-restriction Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
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- H01L23/64—Impedance arrangements
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- H01L2223/66—High-frequency adaptations
- H01L2223/6644—Packaging aspects of high-frequency amplifiers
- H01L2223/6655—Matching arrangements, e.g. arrangement of inductive and capacitive components
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48153—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
- H01L2224/48195—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being a discrete passive component
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- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0255—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements
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- H01L2924/13063—Metal-Semiconductor Field-Effect Transistor [MESFET]
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- H01L2924/3025—Electromagnetic shielding
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
- H03K17/081—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
- H03K17/0812—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the control circuit
- H03K17/08122—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the control circuit in field-effect transistor switches
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
- Emergency Protection Circuit Devices (AREA)
Description
571478 五、發明説明(1 ) 發明背景 本發明係關於一般高電源 〇 , τ电Γ生裝置,更明確的說,本發 明係關於半導體電源裝置中 , 電反限制及靜電放電保護。 黾源半導體裝置’如Mesfet弋你酱认山 Τ或作業於兩頻之下的雙極性 電日日體之類,通常都會連 電今性裝置,如分離式 MOSCAP ’作為輸入頻率及 ι 午阻抗匹配。该分離式MOSCAP裝 置係與該半導體電晶體晶片安裝於半導體封裝内,並且利 用適當的裝置’如焊接線路之類,與其相連接。 ^電源裝置必須受到保護’否則輸人電壓過載便可能損 ,壞該裝置。目前為止’都係將電壓限制或靜電放電 衣置_),如齊納(Zener)二極體,崩冑二極體之類,或電 晶體整合至該功率電晶體晶片或電源積體電路晶片中。雖 然可在製程中輕易地將元件整合至該電源晶片中,不過在 哪裝置中使用電源晶片時所浪費的電源晶片空間卻相當 地昂貴。再者,必須在該靜電放電裝置的尺寸及彈性,該 靜電放電裝置及/或電晶體的測試能力之間進行取捨。 本發明能夠冑決先前技藝電源褒置結構中的上述限制。 發明簡單概要 根據本發明,供雨頻應用的功率電晶體裝置包括,在第 一分離半導體晶片上的-功率電晶體;在第二分離半導體 晶片上的一電容器及一電壓限制裝置;及一封裝,用以… 納及密封該第-及第二半導體晶片。電性連接器可將= 一晶片上的電容器及電壓限制裝置連接至該第—晶片上的 功率電晶體。 曰 I___ -4- 本紙張尺度適财® ®家標準(CNS) A4規格(21〇><297公爱) 571478 A7
在本發明的較佳具體實施例中,該電壓限制裝置包括一 一極體或電晶冑,而該電容器則係一並聯的MQSCAP。因 為,該M〇SCAP晶片擁有足夠的空間可製造該電麼限制或 ESD衣置所以在該半導體晶片中有更大的空間可供該功 率電晶體使用,因此在製造該電源裝置時會有更大的彈性 «下面的#細說明及相關的中請專利範圍,並結合圖示 將可更清楚本發明及其目的與特性。 圖式簡單說明 圖1A及1 B所不的係根據先前技藝之電性圖及封裝後功率 電晶體貫體結構的平面圖。 圖2A及2B所示的係根據本發明具體實施例之電性圖及封 裝後功率電晶體裝置配置的平面圖。 圖3所不的係根據本發明具體實施例之M〇scAp及二極體 區段的側面圖。 在該些圖式中,相同的元件具有相同的參考符號。 具體實施例之詳細說明 圖1A及1B所示的係根據先前技藝之電性圖及灯功率電晶 體實體配置的平面圖。如圖1A所示,RF會經由一可能係焊、 接線路的電感元件10及一位於第一晶片21中的分流電容器 12輸入至該電源裝置。接著,該輸入信號便會經由焊接線 路Η送至第二晶片22中的功率電晶體,如橫向dm〇s電晶體 18之類的閘極16。從電晶體18的汲極2〇可以取得電源輸出 ,而電壓限制裝置,如齊納二極體24之類.,則係連接在閘
裝 訂
k -5- 571478 A7
Claims (1)
- 申請專利範園 1 ·· 一種供高頻應用 a)-第-分離^?:裝置,其包括: ―:二分離半導體晶片中的—電晶體; C) 一電壓限制裝置; 冤合益; d) 一種用於衮知 、、内及密封該功率電曰辨 麼限制裝置的封袭,·及 B曰體’電容器,及電 e) 電性連接器,其可將該電 至該功率電晶體。 °電壓限制裝置連接 2 ·如申請專利範圍 限制裳置係與該電容哭一tt!晶體装置,其中該電屡 片中。 口口 e衣1"於该第二分離半導體晶 3·如申請專利範圍第1項之功率電晶體裝置 限制裝置包括—電晶體。 、 4.如申請專利範圍第丨項之功率電晶 限制裝置包括一二極體。 5 ·如申請專利範圍第1項之功率電晶體裝置 連接器戽括焊接線路。 、 “:申請專利範圍第1項之功率電晶體褒置 器係一 MOSCAP或其它的電容器結構。 7.如申請專利範圍第6項之功率電晶體裝置, 限制裝置包括一二極體。 3.如申凊專利範圍第7項之功率電晶體裝置, 其中該電壓 其中該電壓 其中該電性 其中該電容 其中該電壓 連接器包括谭接線路。 其中該電性 本紙張尺度適用中國國家標準(CNS) A4規格(21〇X 297公 571478種為與製造於一分離半導體晶片中的功率電晶體一起 使用之電谷為結構,該電容器結構包栝一分離半導體晶 片’二製造於該半導體晶片中的電容性元件,及一製造 於泫半導體晶片中且與該電容器結構龙聯的電壓限制穿 置。 、 .如申凊專利範圍第9項之電容器結構,其中該電壓限 裝置包括一二極體。 11.如申請專利範圍第9項之電容器結構,其中該電壓限 裝置包括'一電晶體。 12·如申請專利範圍第9項之電容器結構,其包 用以電性連接該電容器及該電壓限制裝置。舌烊接線 13·如申請專利範圍第9項之電容器結構, 構匕括一 MOSCAP或其它電容器結構。 口口 -9- 本紙張尺度適用中國國家標準(CNS) A4規格(210X 297公釐)
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Application Number | Priority Date | Filing Date | Title |
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US09/905,294 US6548869B2 (en) | 2001-07-13 | 2001-07-13 | Voltage limiting protection for high frequency power device |
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TW571478B true TW571478B (en) | 2004-01-11 |
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TW091115533A TW571478B (en) | 2001-07-13 | 2002-07-12 | Voltage limiting protection for high frequency power device |
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US (1) | US6548869B2 (zh) |
EP (1) | EP1415378A4 (zh) |
JP (1) | JP2004535680A (zh) |
KR (1) | KR100874795B1 (zh) |
CN (1) | CN100397742C (zh) |
CA (1) | CA2453562C (zh) |
TW (1) | TW571478B (zh) |
WO (1) | WO2003007451A1 (zh) |
Cited By (1)
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US9823123B2 (en) | 2015-01-30 | 2017-11-21 | Industrial Technology Research Institute | System and method for controlling excess bias of single photon avalanche photo diode |
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FR2841058A1 (fr) * | 2002-06-14 | 2003-12-19 | St Microelectronics Sa | Dispositif electrique comprenant deux supports et une borne de connexion reliee a un condensateur serie et a un limiteur de tension |
JP2005303940A (ja) * | 2004-04-16 | 2005-10-27 | Matsushita Electric Ind Co Ltd | アンテナスイッチ回路、ならびにそれを用いた複合高周波部品および移動体通信機器 |
US20060132996A1 (en) * | 2004-12-17 | 2006-06-22 | Poulton John W | Low-capacitance electro-static discharge protection |
US7767543B2 (en) * | 2005-09-06 | 2010-08-03 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing a micro-electro-mechanical device with a folded substrate |
US20110309872A1 (en) | 2010-06-17 | 2011-12-22 | Cynthia Blair | Voltage Spike Protection for Power DMOS Devices |
CN102023238B (zh) * | 2010-11-04 | 2012-09-12 | 中国电子科技集团公司第十三研究所 | 用于SiC MESFET直流测试的夹具 |
CN209104139U (zh) * | 2017-03-17 | 2019-07-12 | 株式会社村田制作所 | 薄膜esd保护器件 |
JP6316512B1 (ja) * | 2017-03-28 | 2018-04-25 | 三菱電機株式会社 | 半導体装置 |
CN110364511A (zh) * | 2019-07-24 | 2019-10-22 | 德淮半导体有限公司 | 半导体装置 |
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US4758873A (en) * | 1986-05-16 | 1988-07-19 | National Semiconductor Corporation | Balanced MOS capacitor with low stray capacitance and high ESD survival |
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JP3648451B2 (ja) * | 1997-10-20 | 2005-05-18 | 株式会社日立製作所 | 半導体モジュール及びそれを用いる電力変換装置 |
KR100351920B1 (ko) * | 1999-05-17 | 2002-09-12 | 앰코 테크놀로지 코리아 주식회사 | 반도체 패키지 및 그 제조 방법 |
-
2001
- 2001-07-13 US US09/905,294 patent/US6548869B2/en not_active Expired - Lifetime
-
2002
- 2002-07-12 CA CA2453562A patent/CA2453562C/en not_active Expired - Lifetime
- 2002-07-12 JP JP2003513104A patent/JP2004535680A/ja active Pending
- 2002-07-12 TW TW091115533A patent/TW571478B/zh not_active IP Right Cessation
- 2002-07-12 KR KR1020047000516A patent/KR100874795B1/ko active IP Right Grant
- 2002-07-12 WO PCT/US2002/022198 patent/WO2003007451A1/en active Application Filing
- 2002-07-12 CN CNB028140281A patent/CN100397742C/zh not_active Expired - Lifetime
- 2002-07-12 EP EP02756459A patent/EP1415378A4/en not_active Ceased
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9823123B2 (en) | 2015-01-30 | 2017-11-21 | Industrial Technology Research Institute | System and method for controlling excess bias of single photon avalanche photo diode |
Also Published As
Publication number | Publication date |
---|---|
US6548869B2 (en) | 2003-04-15 |
EP1415378A1 (en) | 2004-05-06 |
KR100874795B1 (ko) | 2008-12-19 |
CN1528039A (zh) | 2004-09-08 |
CN100397742C (zh) | 2008-06-25 |
WO2003007451A1 (en) | 2003-01-23 |
EP1415378A4 (en) | 2008-10-08 |
US20030011031A1 (en) | 2003-01-16 |
CA2453562C (en) | 2012-03-13 |
KR20040011599A (ko) | 2004-02-05 |
CA2453562A1 (en) | 2003-01-23 |
JP2004535680A (ja) | 2004-11-25 |
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