TW533350B - Data processing system having an on-chip background debug system and method therefor - Google Patents

Data processing system having an on-chip background debug system and method therefor Download PDF

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Publication number
TW533350B
TW533350B TW090131692A TW90131692A TW533350B TW 533350 B TW533350 B TW 533350B TW 090131692 A TW090131692 A TW 090131692A TW 90131692 A TW90131692 A TW 90131692A TW 533350 B TW533350 B TW 533350B
Authority
TW
Taiwan
Prior art keywords
data processing
processing system
background
unit
clock unit
Prior art date
Application number
TW090131692A
Other languages
English (en)
Chinese (zh)
Inventor
Michael C Wood
George E Baker
James M Sibigtroth
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Application granted granted Critical
Publication of TW533350B publication Critical patent/TW533350B/zh

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466—Performance evaluation by tracing or monitoring
    • G06F11/348—Circuit details, i.e. tracer hardware
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Prevention of errors by analysis, debugging or testing of software
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
TW090131692A 2001-02-21 2001-12-20 Data processing system having an on-chip background debug system and method therefor TW533350B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/788,816 US6823224B2 (en) 2001-02-21 2001-02-21 Data processing system having an on-chip background debug system and method therefor

Publications (1)

Publication Number Publication Date
TW533350B true TW533350B (en) 2003-05-21

Family

ID=25145644

Family Applications (1)

Application Number Title Priority Date Filing Date
TW090131692A TW533350B (en) 2001-02-21 2001-12-20 Data processing system having an on-chip background debug system and method therefor

Country Status (8)

Country Link
US (1) US6823224B2 (enExample)
EP (1) EP1423789A2 (enExample)
JP (1) JP4145146B2 (enExample)
KR (1) KR100819720B1 (enExample)
CN (1) CN1543604B (enExample)
AU (1) AU2002227439A1 (enExample)
TW (1) TW533350B (enExample)
WO (1) WO2002069146A2 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI628531B (zh) * 2017-05-31 2018-07-01 北京集創北方科技股份有限公司 Clock control circuit and controller

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US7222315B2 (en) 2000-11-28 2007-05-22 Synplicity, Inc. Hardware-based HDL code coverage and design analysis
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US7003698B2 (en) * 2002-06-29 2006-02-21 Intel Corporation Method and apparatus for transport of debug events between computer system components
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US7120743B2 (en) 2003-10-20 2006-10-10 Micron Technology, Inc. Arbitration system and method for memory responses in a hub-based memory system
US7216196B2 (en) * 2003-12-29 2007-05-08 Micron Technology, Inc. Memory hub and method for memory system performance monitoring
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US7216259B2 (en) 2004-04-28 2007-05-08 Via Telecom Co., Ltd. Increment power saving in battery powered wireless system with software configuration
US7310748B2 (en) 2004-06-04 2007-12-18 Micron Technology, Inc. Memory hub tester interface and method for use thereof
US20060075124A1 (en) * 2004-10-01 2006-04-06 Michael Joseph Dougherty Automatic activation and deactivation of wireless network adapter
US20060161818A1 (en) * 2005-01-14 2006-07-20 Ivo Tousek On-chip hardware debug support units utilizing multiple asynchronous clocks
US7550991B2 (en) 2005-07-15 2009-06-23 Tabula, Inc. Configurable IC with trace buffer and/or logic analyzer functionality
US7375550B1 (en) * 2005-07-15 2008-05-20 Tabula, Inc. Configurable IC with packet switch configuration network
US8069425B2 (en) 2007-06-27 2011-11-29 Tabula, Inc. Translating a user design in a configurable IC for debugging the user design
US7839162B2 (en) 2007-06-27 2010-11-23 Tabula, Inc. Configurable IC with deskewing circuits
US8412990B2 (en) 2007-06-27 2013-04-02 Tabula, Inc. Dynamically tracking data values in a configurable IC
US7652498B2 (en) 2007-06-27 2010-01-26 Tabula, Inc. Integrated circuit with delay selecting input selection circuitry
WO2009039462A1 (en) 2007-09-19 2009-03-26 Tabula, Inc. Method and system for reporting on a primary circuit structure of an integrated circuit (ic) using a secondary circuit structure of the ic
US8525548B2 (en) * 2008-08-04 2013-09-03 Tabula, Inc. Trigger circuits and event counters for an IC
US8165253B2 (en) * 2008-08-28 2012-04-24 Agere Systems Inc. Methods and apparatus for serializer/deserializer transmitter synchronization
US8072234B2 (en) 2009-09-21 2011-12-06 Tabula, Inc. Micro-granular delay testing of configurable ICs
CN101876928B (zh) * 2009-11-13 2012-07-25 北京全路通信信号研究设计院有限公司 一种二乘二取二系统的同步方法和设备
JP5467891B2 (ja) 2010-02-19 2014-04-09 ルネサスエレクトロニクス株式会社 情報処理装置、デバッグ装置、デバッグ方法
KR101992234B1 (ko) 2012-05-22 2019-06-24 삼성전자주식회사 디버깅 회로를 위한 클럭 제어 회로를 구비하는 집적 회로 및 이를 포함하는 시스템-온-칩
US20150012903A1 (en) 2013-07-04 2015-01-08 Tabula, Inc. Non-intrusive monitoring and control of integrated circuits
CN104679617B (zh) * 2013-11-27 2019-01-04 展讯通信（上海）有限公司 一种调试系统
US9684578B2 (en) 2014-10-30 2017-06-20 Qualcomm Incorporated Embedded universal serial bus (USB) debug (EUD) for multi-interfaced debugging in electronic systems
US20250109930A1 (en) 2023-10-03 2025-04-03 Louisiana-Pacific Corporation Foam depth inspection gauge

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI628531B (zh) * 2017-05-31 2018-07-01 北京集創北方科技股份有限公司 Clock control circuit and controller

Also Published As

Publication number Publication date
EP1423789A2 (en) 2004-06-02
JP2005508531A (ja) 2005-03-31
CN1543604B (zh) 2012-05-30
KR100819720B1 (ko) 2008-04-07
US20020116081A1 (en) 2002-08-22
KR20030075202A (ko) 2003-09-22
US6823224B2 (en) 2004-11-23
WO2002069146A3 (en) 2004-04-08
WO2002069146A2 (en) 2002-09-06
AU2002227439A1 (en) 2002-09-12
CN1543604A (zh) 2004-11-03
JP4145146B2 (ja) 2008-09-03

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