TW519725B - Via first dual damascene process for copper metallization - Google Patents
Via first dual damascene process for copper metallization Download PDFInfo
- Publication number
- TW519725B TW519725B TW090116395A TW90116395A TW519725B TW 519725 B TW519725 B TW 519725B TW 090116395 A TW090116395 A TW 090116395A TW 90116395 A TW90116395 A TW 90116395A TW 519725 B TW519725 B TW 519725B
- Authority
- TW
- Taiwan
- Prior art keywords
- insulating layer
- layer
- channel
- channels
- copper
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
- H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
- H10W20/085—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures involving intermediate temporary filling with material
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
- H10W20/435—Cross-sectional shapes or dispositions of interconnections
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
- H10W20/44—Conductive materials thereof
- H10W20/4403—Conductive materials thereof based on metals, e.g. alloys, metal silicides
- H10W20/4421—Conductive materials thereof based on metals, e.g. alloys, metal silicides the principal metal being copper
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US60854000A | 2000-06-30 | 2000-06-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW519725B true TW519725B (en) | 2003-02-01 |
Family
ID=24436949
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW090116395A TW519725B (en) | 2000-06-30 | 2001-07-02 | Via first dual damascene process for copper metallization |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JP2004503089A (https=) |
| KR (1) | KR100474605B1 (https=) |
| TW (1) | TW519725B (https=) |
| WO (1) | WO2002003457A2 (https=) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102454363B1 (ko) | 2020-08-24 | 2022-10-14 | 주식회사 세움피엔에프 | 운동기구의 수평 이동 장치 |
| KR102491980B1 (ko) | 2021-01-05 | 2023-01-27 | 최순복 | 필라테스용 레더바렐 |
| CN113394184B (zh) * | 2021-06-09 | 2022-06-17 | 武汉新芯集成电路制造有限公司 | 半导体器件及其制造方法 |
| US11876047B2 (en) | 2021-09-14 | 2024-01-16 | International Business Machines Corporation | Decoupled interconnect structures |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5904565A (en) * | 1997-07-17 | 1999-05-18 | Sharp Microelectronics Technology, Inc. | Low resistance contact between integrated circuit metal levels and method for same |
| US6057239A (en) * | 1997-12-17 | 2000-05-02 | Advanced Micro Devices, Inc. | Dual damascene process using sacrificial spin-on materials |
| US6127258A (en) * | 1998-06-25 | 2000-10-03 | Motorola Inc. | Method for forming a semiconductor device |
| US6380096B2 (en) * | 1998-07-09 | 2002-04-30 | Applied Materials, Inc. | In-situ integrated oxide etch process particularly useful for copper dual damascene |
| US6245662B1 (en) * | 1998-07-23 | 2001-06-12 | Applied Materials, Inc. | Method of producing an interconnect structure for an integrated circuit |
| JP2000150644A (ja) * | 1998-11-10 | 2000-05-30 | Mitsubishi Electric Corp | 半導体デバイスの製造方法 |
| EP1192656A1 (en) * | 1999-06-30 | 2002-04-03 | Intel Corporation | Method of protecting an underlying wiring layer during dual damascene processing |
-
2001
- 2001-07-02 KR KR10-2002-7018006A patent/KR100474605B1/ko not_active Expired - Lifetime
- 2001-07-02 JP JP2002507438A patent/JP2004503089A/ja active Pending
- 2001-07-02 WO PCT/US2001/021161 patent/WO2002003457A2/en not_active Ceased
- 2001-07-02 TW TW090116395A patent/TW519725B/zh not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| JP2004503089A (ja) | 2004-01-29 |
| KR20030020324A (ko) | 2003-03-08 |
| WO2002003457A2 (en) | 2002-01-10 |
| WO2002003457A3 (en) | 2002-06-06 |
| KR100474605B1 (ko) | 2005-03-10 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GD4A | Issue of patent certificate for granted invention patent | ||
| MK4A | Expiration of patent term of an invention patent |