TW518770B - Light-emitting-diode-chip on the basis of InGaN and its method of manufacturing - Google Patents

Light-emitting-diode-chip on the basis of InGaN and its method of manufacturing Download PDF

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TW518770B
TW518770B TW090116119A TW90116119A TW518770B TW 518770 B TW518770 B TW 518770B TW 090116119 A TW090116119 A TW 090116119A TW 90116119 A TW90116119 A TW 90116119A TW 518770 B TW518770 B TW 518770B
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active structure
growth
light
substrate
layer
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Johannes Baur
Georg Bruederl
Berthold Hahn
Volker Haerle
Uwe Strauss
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Osram Opto Semiconductors Gmbh
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    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/24Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction
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    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
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    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
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    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/08Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a plurality of light emitting regions, e.g. laterally discontinuous light emitting layer or photoluminescent region integrated within the semiconductor body
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    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen

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Description

518770 五、發明説明(1 ) 、 本發明是有關一種以InGaN爲主的發光二極體晶片 與一種方法用於製造以InGaN爲主之發光二極體晶 在與本發明有關的以InGaN爲主的發光二極體晶片 之下,在基本上包括所有的發光二極體晶片,其光線發 射區域具有I n G aN或使用氮化物以及以此爲主的混合 結晶,像是例如G a ( A 1,I n) N。 以I n G aN爲主之發光二極體晶片例如由S h u j i Nakamura, Gerhard Fasal 戶斤著之’’The Blue Laser Diode”(由在 Berlin Heidelberg 之 Springer 出版社於 1997年出版)之209頁之所述而爲熟知。 本發明之目的在於說明一種在一開始所提到特性之 發光二極體晶片其具有儘可能高的光線強度供使用。 此外說明一種方法以製造此種發光二極體晶片。 此首先所提到的目的是以具有申請專利範圍第1項 特徵之發光二極體晶片達成。有利的其他發展是申請 專利範圍第2至4項之標的◦此其次所提到的目的是 藉由根據申請專利範圍第5項之方法而達成。此方法 較佳之其他的發展是申請專利範圍第6至8‘項之標 的。 在根據本發明之發光二極體晶片中,是在基板上成長 磊晶層序列,其具有以InGaN爲主的光線發射主動結 構。在基板與光線發射主動結構之間配置緩衝(Buffer) 層,其由一或多層所構成。須選擇此緩衝層的材料,使 518770 五、發明説明(3 ) 在根據本發明的方法中,在基板上沈積發光磊晶層序 歹0,其具有以InGaN爲主的發光主動結構。 在此光線發射主動結構成長前,在基板上成長緩衝層 或緩衝層序列,其成長表面用於此光線發射主動結構之 成長,而在其成長溫度中並未拉緊或是稍微呈現張力。 以此方法有利地達成此主動結構關於其成成長平面 具有側面彼此相鄰配置之銦(I η)飽含區,在其中銦的含 量高於此主動結構其餘區域中銦的含量。 在此方法尤其較佳的實施形式中,產生具有I n G aN量 子井之單量子井結構或多量子井的結構,並且使用以 S i C爲主的基板。 作爲緩衝層較佳首先在基板上以磊晶的方式沈積數 百奈米(nm)厚之AlGaN:Si層,在此之上以磊晶方式成 長GaN:Si層。此GaN:Si層的厚度是在1微米至3微 米(// m)之間,並且在其表面上沈積光線發射磊晶層序 列。 作爲嘉晶方法較佳適用”有機金屬氣相嘉晶 法 ”(MOVPE:Metal Organic Vapour Phase Epitaxy)。 本發明其他有利之配置與發展是由此在以下與第1 a 至2圖有關之說明的實施例中產生。 圖式之簡單說明 第1 a圖以槪要圖式說明經由第一實施例之截面。 第1 b圖以槪要圖式說明此第一實施例之有利之接觸 設計與有利的安裝方法。 518770 五、發明説明(4 ) 第2圖以槪要圖式說明經由第二實施例之截面,包括 其有利的安裝方法。 在這些不同實施例的圖中相同或相同作用的組成成 份各自具有其參考號碼。 在第1 a圖的發光二極體晶片1中,在s i C基板2上 配置光線發射主動結構4 ◦其在本例中具有I n G a N之 單量子井7。 此光線發射主動結構4包括多個關於成長平面橫向 相鄰配置之銦飽含(e n r i c h)區5,中此銦含量高於此主動 結構4之其餘區域中之銦含量。在此銦飽含區5中之 銦含量例如是一直至4 0 %。 在此光線發射主動結構4之上成長一層薄的p-導電 摻雜AlGaN磊晶層8,以及一層例如2 00奈米(nm)厚的 p-導電摻雜GaN層9 ◦ 同樣地可以例如一個以InGaN爲主的光線發射主動結 構4具有雙異質結構或是多量子井結構(MQWiMulti-Quantum well)其設有 多個量 子井。 此SiC基板是導電並且對於此由磊晶層序列3所發 出的光線至少部份通過。 ‘ 在基板2與主動結構4之間是緩衝層2 0 ,其包含幾 百奈(nm)厚的AlGaN:Si層10,與在成長方向中配置於 GaN: Si層1 1之後。此GaN: Si層1 1的厚度在1微米 (//m)至3微米之間,並且其背向遠離基板2之表面在 當製造晶片1時形成爲成長表面6,用於長成此以 518770 五、發明説明(5 )
InGaN爲主的光線發射主動結構4。 在根據第1 b圖之晶片之接觸設計與安裝方式中,(此 關於其磊晶層結構3對應於第la圖之晶片1),是在p-導電摻雜G aN -層9上塗佈—層可連接之p _接觸層 12。其例如是由銀(Ag),由PtAg及/或PdAg合金所構 成,或是例如由、透光第一層與反射第二層所組成。在其 次所提到的替代方案中,此第一層例如在基本上由P t 及/或Pd構成,並且第二層^例如在基本上是由銀(Ag)、 金(Αι〇及/或鋁(A1)或介電反射層所構成。 在其背向遠離磊晶層序列3之面1 5上,此S i C基板 2設有接觸金屬化件1 3,其只將此主要表面1 5之一部 份覆蓋,並且形成爲至佈線連接之連接墊(bond pad) ◦ 晶片1是借助於小片接合(D i e ) -連接以其p -面,即 以其P -接觸層1 2安裝在電性連接框架丨4 ( L e a d框架) 的晶片安裝表面1 9上。此n-接觸金屬化件丨3是經由 連接線1 7而與連接框架1 4之連接部份1 8連接。 光線由晶片1之耦合而出是經由S i C基板2之主要 表面1 5之裸露區域以及經由晶片側面6而實施。 :選擇式地,晶片1具有一個在磊晶層序列成長之後變薄 之SiC基板2。同樣地,基板2在磊晶層序列3成長之 後完全由此序列去除,因而產生所謂的薄層L E D。 明顯地此根據本發明的晶片1還可以以其基板面, 即在所謂的”up side up”安裝中,裝設於電性連接框架 1 4之晶片安裝表面丨3之上。此接觸設計當然適合其 -7- 518770 五、發明説明(7) 試驗1在此情況下是晶片,其中此以I n G aN爲主的層 之成長表面6在成長的溫度中強烈緊密地拉緊。 在試驗2中此以InGaN爲主之層之成長表面6在此 成長的溫度中沒有或只有稍微的拉緊。 晶片的分析顯不,試驗1在主動層序列之不同的嘉晶 層之間非常光滑平坦的界面,並且具有大約1 5 %之均勻 之銦(In)含量,而試驗2中,在主動層序列之不同的磊晶 層之間的界面是非常粗糙,並且此結構具有點狀局部增 加的晶格常數5其與局部增加之直至40%之銦含量相對 應。 曰式驗.2藏不每女裝時在5毫米(ΠΜ )之徑向結構中在 2 〇毫安(m A)之向前電流中相對於試驗1明顯提高的功 率,在同時將此尖峰波長移至較大的波長。 此根據上述實施例之本發明之說明是被理解爲明顯 地不作爲對本發明的限制。更正確地說,本發明尤其是 在所有的發光二極體晶片中可使用,其中此主動區以 InGaN爲主。 符號說明 1…發光二極體晶片 ‘ 2…基板 4…主動層 5…In-飽含區 7…單量子井 9 ... G a N 層
518770 五、發明説明(8 ) 1 0 …AlGaN : S i 層 11.. .GaN:Si 層 1 4 ...連接框架 1 5 ...主要表面 18.. .連接部份 -10-

Claims (1)

  1. 518770 讲年/月β曰雙正L_Γ ___ 六、申請專利範圍 第90116119號「以InGaN爲主之發光二極體晶片與其製造方 法」專利案 (91年1月修正) 六、申請專利範圍 1· 一種發光二極體晶片(1),其中 在基板(2)上沈積磊晶層序列(3)其具有以InGaN爲主光線 發射主動結構(4),並且在基板(2)與主動結構(4)之間配置 緩衝層或緩衝層序列(20),其特徵爲, 其中須選擇緩衝層或緩衝層序列(20)之材料,使得其成 長表面(6)用於主動結構(4)之成長,而在其成長的溫度中 、並未拉緊或稍微呈現張力, 並且此主動結構(4)具有關於彼此橫向毗鄰地配置於成 長平面之銦(In)飽含區(5),其中此銦含量較主動結構(4)中 之其他區域爲高。 2. 如申請專利範圍第1項之發光二極體晶片(1),其中此基板 (2)在基本上是由SiC構成。 3. 如申請專利範圍第1或2項之發光二極體晶片(1),其中主 動結構(4)具有單量子井結構或多量子井結構,其中此或至 少一個量子井包含銦(In)飽含區。 4. 如申請專利範圍第1或2項之發光二極體晶片(1),其中此 緩衝層序列(20)具有數百奈米(nm)厚的AlGaN:Si層(9),其 在成長方向中配置於GaN: Si層(10)之後,其具有1微米U m)至3微米之厚度,並且其表面形成爲用於光線發射磊晶 層序列成長之成長表面(6)。 5. 如申請專利範圍第3項之發光二極體晶片(1),其中此緩衝 六、申請專利範圍 層序列(20)具有數百奈米(nm)厚的AlGaN:Si層(9),其在成 長方向中配置於GaN:Si層(10)之後,其具有1微米(/zm)至 3微米之厚度,並且其表面形成爲用於光線發射磊晶層序 列成長之成長表面(6)。 6_ —種用於製造以InGaN爲主之發光二極體構件之方法,其 特徵爲, 在基板(2)上沈積磊晶層序列(3),其具有以InGaN爲主 之光線發射主動結構(4),其中在光線發射主動結構(4)成 長之前,在基板(2)上成長緩衝層或緩衝層序列(20),其成長 表面用於光線發射主動結構(4)之成長,而在其成長溫度中 並未拉緊或稍微呈現張力。 7. 如申請專利範圍第6項之方法,其中 產生具有InGaN量子井之多量子井結構作爲主動結構 (4)。 8. 如申請專利範圍第6或7項之方法,其中 使用SiC基板作爲基板(2)。 9. 如申請專利範圍第6或7項之方法,其中 在基板(2)上首先沈積一個數百奈米(nm)厚之AlGaN:Si 層,在此上成長GaN:Si層,其具有1微米(/zm)至3微米之 厚度,並且在其表面上沈積光線發射主動結構(4)。 10. 如申請專利範圍第8項之方法,其中 在基板(2)上首先沈積一個數百奈米(nm)厚之AlGaN:Si 層,在此上成長GaN: Si層,其具有1微米(/zm)至3微米之 厚度,並且在其表面上沈積光線發射主動結構(4)。 -2-
TW090116119A 2000-07-03 2001-07-02 Light-emitting-diode-chip on the basis of InGaN and its method of manufacturing TW518770B (en)

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