TW517454B - Method and apparatus for controlling compensated buffers - Google Patents
Method and apparatus for controlling compensated buffers Download PDFInfo
- Publication number
- TW517454B TW517454B TW089121449A TW89121449A TW517454B TW 517454 B TW517454 B TW 517454B TW 089121449 A TW089121449 A TW 089121449A TW 89121449 A TW89121449 A TW 89121449A TW 517454 B TW517454 B TW 517454B
- Authority
- TW
- Taiwan
- Prior art keywords
- compensation value
- compensation
- value
- patent application
- circuit
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 17
- 239000000872 buffer Substances 0.000 title claims description 14
- 230000000295 complement effect Effects 0.000 claims description 10
- 239000004065 semiconductor Substances 0.000 claims description 8
- 239000013078 crystal Substances 0.000 claims description 6
- 238000012545 processing Methods 0.000 claims description 5
- 229910044991 metal oxide Inorganic materials 0.000 claims description 3
- 150000004706 metal oxides Chemical class 0.000 claims description 3
- 239000004020 conductor Substances 0.000 claims description 2
- 241001674048 Phthiraptera Species 0.000 claims 1
- 244000309464 bull Species 0.000 claims 1
- 238000009434 installation Methods 0.000 claims 1
- 230000008859 change Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 235000012431 wafers Nutrition 0.000 description 3
- 238000004458 analytical method Methods 0.000 description 2
- 238000004364 calculation method Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 229910052770 Uranium Inorganic materials 0.000 description 1
- 229910052797 bismuth Inorganic materials 0.000 description 1
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000012937 correction Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 235000011389 fruit/vegetable juice Nutrition 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000008520 organization Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
- 230000001568 sexual effect Effects 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 230000009469 supplementation Effects 0.000 description 1
- 230000029305 taxis Effects 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- JFALSRSLKYAFGM-UHFFFAOYSA-N uranium(0) Chemical compound [U] JFALSRSLKYAFGM-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00369—Modifications for compensating variations of temperature, supply voltage or other physical parameters
- H03K19/00384—Modifications for compensating variations of temperature, supply voltage or other physical parameters in field effect transistor circuits
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Semiconductor Integrated Circuits (AREA)
- Logic Circuits (AREA)
- Non-Silver Salt Photosensitive Materials And Non-Silver Salt Photography (AREA)
- Record Information Processing For Printing (AREA)
- Developing Agents For Electrophotography (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/418,762 US6300798B1 (en) | 1999-10-15 | 1999-10-15 | Method and apparatus for controlling compensated buffers |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW517454B true TW517454B (en) | 2003-01-11 |
Family
ID=23659472
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW089121449A TW517454B (en) | 1999-10-15 | 2000-10-27 | Method and apparatus for controlling compensated buffers |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US6300798B1 (enExample) |
| JP (1) | JP2003512753A (enExample) |
| KR (1) | KR100563106B1 (enExample) |
| AU (1) | AU7722200A (enExample) |
| DE (1) | DE10085097B4 (enExample) |
| GB (1) | GB2371694B (enExample) |
| TW (1) | TW517454B (enExample) |
| WO (1) | WO2001029967A1 (enExample) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6545522B2 (en) * | 2001-05-17 | 2003-04-08 | Intel Corporation | Apparatus and method to provide a single reference component for multiple circuit compensation using digital impedance code shifting |
| US6535047B2 (en) * | 2001-05-17 | 2003-03-18 | Intel Corporation | Apparatus and method to use a single reference component in a master-slave configuration for multiple circuit compensation |
| US6633178B2 (en) * | 2001-09-28 | 2003-10-14 | Intel Corporation | Apparatus and method for power efficient line driver |
| JP4502177B2 (ja) * | 2003-10-14 | 2010-07-14 | ルネサスエレクトロニクス株式会社 | 出力回路 |
| US7009894B2 (en) * | 2004-02-19 | 2006-03-07 | Intel Corporation | Dynamically activated memory controller data termination |
Family Cites Families (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4079456A (en) | 1977-01-24 | 1978-03-14 | Rca Corporation | Output buffer synchronizing circuit having selectively variable delay means |
| JPH0792492B2 (ja) | 1986-11-28 | 1995-10-09 | 日立電子エンジニアリング株式会社 | 電子デバイス駆動回路 |
| US4975598A (en) * | 1988-12-21 | 1990-12-04 | Intel Corporation | Temperature, voltage, and process compensated output driver |
| JPH0583111A (ja) * | 1991-09-24 | 1993-04-02 | Nec Ic Microcomput Syst Ltd | Cmos集積回路 |
| US5303191A (en) * | 1992-01-23 | 1994-04-12 | Motorola, Inc. | Memory with compensation for voltage, temperature, and processing variations |
| US5334885A (en) * | 1993-01-13 | 1994-08-02 | At&T Bell Laboratories | Automatic control of buffer speed |
| US5444406A (en) | 1993-02-08 | 1995-08-22 | Advanced Micro Devices, Inc. | Self-adjusting variable drive strength buffer circuit and method for controlling the drive strength of a buffer circuit |
| WO1994029798A1 (en) | 1993-06-08 | 1994-12-22 | National Semiconductor Corporation | Programmable cmos bus and transmission line driver |
| JPH0722597A (ja) | 1993-06-23 | 1995-01-24 | Kawasaki Steel Corp | 半導体集積回路装置 |
| US5548201A (en) | 1994-09-13 | 1996-08-20 | Norand Corporation | Battery charging method and apparatus with thermal mass equalization |
| DE4441523C1 (de) * | 1994-11-22 | 1996-05-15 | Itt Ind Gmbh Deutsche | Digitale Treiberschaltung für eine integrierte Schaltung |
| US5640122A (en) * | 1994-12-16 | 1997-06-17 | Sgs-Thomson Microelectronics, Inc. | Circuit for providing a bias voltage compensated for p-channel transistor variations |
| US5594373A (en) | 1994-12-20 | 1997-01-14 | Sgs-Thomson Microelectronics, Inc. | Output driver circuitry with selective limited output high voltage |
| US5883801A (en) | 1996-05-14 | 1999-03-16 | Microwave Science, Llc | Method and apparatus for managing electromagnetic radiation usage |
| US5870001A (en) | 1996-10-22 | 1999-02-09 | Telefonaktiebolaget L M Ericsson (Publ) | Apparatus, and associated method, for calibrating a device |
| US5959481A (en) * | 1997-02-18 | 1999-09-28 | Rambus Inc. | Bus driver circuit including a slew rate indicator circuit having a one shot circuit |
| US6031385A (en) | 1997-03-24 | 2000-02-29 | Intel Corporation | Method and apparatus for testing compensated buffer circuits |
| US5869983A (en) * | 1997-03-24 | 1999-02-09 | Intel Corporation | Method and apparatus for controlling compensated buffers |
| US5898321A (en) | 1997-03-24 | 1999-04-27 | Intel Corporation | Method and apparatus for slew rate and impedance compensating buffer circuits |
| US6092030A (en) * | 1997-04-02 | 2000-07-18 | Credence Systems Corporation | Timing delay generator and method including compensation for environmental variation |
| JPH1117516A (ja) | 1997-06-10 | 1999-01-22 | Ind Technol Res Inst | 制御されたスルーレートを有する高速及び低速出力バッファー |
| US5912569A (en) * | 1997-09-22 | 1999-06-15 | Cypress Semiconductor Corp. | Methods, circuits and devices for improving crossover performance and/or monotonicity, and applications of the same in a universal serial bus (USB) low speed output driver |
-
1999
- 1999-10-15 US US09/418,762 patent/US6300798B1/en not_active Expired - Fee Related
-
2000
- 2000-09-27 AU AU77222/00A patent/AU7722200A/en not_active Abandoned
- 2000-09-27 GB GB0210910A patent/GB2371694B/en not_active Expired - Fee Related
- 2000-09-27 DE DE10085097T patent/DE10085097B4/de not_active Expired - Fee Related
- 2000-09-27 WO PCT/US2000/026547 patent/WO2001029967A1/en not_active Ceased
- 2000-09-27 KR KR1020027004795A patent/KR100563106B1/ko not_active Expired - Fee Related
- 2000-09-27 JP JP2001531206A patent/JP2003512753A/ja active Pending
- 2000-10-27 TW TW089121449A patent/TW517454B/zh not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR20020060712A (ko) | 2002-07-18 |
| WO2001029967A1 (en) | 2001-04-26 |
| KR100563106B1 (ko) | 2006-03-27 |
| HK1044639A1 (en) | 2002-10-25 |
| DE10085097B4 (de) | 2008-12-18 |
| US6300798B1 (en) | 2001-10-09 |
| GB0210910D0 (en) | 2002-06-19 |
| DE10085097T1 (de) | 2002-09-19 |
| GB2371694A (en) | 2002-07-31 |
| GB2371694B (en) | 2004-07-21 |
| AU7722200A (en) | 2001-04-30 |
| JP2003512753A (ja) | 2003-04-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5991221A (en) | Microcomputer and microprocessor having flash memory operable from single external power supply | |
| US7385869B2 (en) | Microcomputer and microprocessor having flash memory operable from single external power supply | |
| EP2515305B1 (en) | Controlled value reference signal of resistance based memory circuit | |
| TW559815B (en) | Semiconductor memory device having memory cell arrays capable of accomplishing random access | |
| TWI282092B (en) | Nonvolatile static random access memory cell | |
| US8283972B1 (en) | Substrate bias feedback scheme to reduce chip leakage power | |
| TW200830322A (en) | Method, apparatus and system relating to automatic cell threshold voltage measurement | |
| JPH07176698A (ja) | 半導体集積回路装置 | |
| CN213424593U (zh) | 相变存储器、电子系统和电压调节器 | |
| US6567318B2 (en) | Control circuit for an output driving stage of an integrated circuit | |
| US11328759B2 (en) | Signal preserve in MRAM during reading | |
| TW517454B (en) | Method and apparatus for controlling compensated buffers | |
| WO2011066034A2 (en) | Resetting phase change memory bits | |
| US7764562B2 (en) | Semiconductor memory device having a short reset time | |
| CN109697999A (zh) | 半导体存储器件 | |
| US11854592B2 (en) | Signal amplification in MRAM during reading, including a pair of complementary transistors connected to an array line | |
| TW200836035A (en) | Voltage regulator system | |
| TW434553B (en) | Nonvolatile memory semiconductor devices having alternative programming operations | |
| JPH0736273B2 (ja) | 半導体集積回路 | |
| JP2003522366A (ja) | フラッシュメモリ用の電圧ブーストレベルクランプ回路 | |
| US6845046B1 (en) | Microcomputer and microprocessor having flash memory operable from single external power supply | |
| JP4593089B2 (ja) | フラッシュメモリ素子におけるトリムビット信号生成回路 | |
| US7339845B2 (en) | Memory device | |
| TWI284323B (en) | Method and circuit for reading fuse calls in a nonvolatile memory during power-up | |
| TW583683B (en) | Programming word line voltage generator of flash memory array |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GD4A | Issue of patent certificate for granted invention patent | ||
| MM4A | Annulment or lapse of patent due to non-payment of fees |