TW494548B - Semiconductor chip device and its package method - Google Patents

Semiconductor chip device and its package method Download PDF

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Publication number
TW494548B
TW494548B TW089117240A TW89117240A TW494548B TW 494548 B TW494548 B TW 494548B TW 089117240 A TW089117240 A TW 089117240A TW 89117240 A TW89117240 A TW 89117240A TW 494548 B TW494548 B TW 494548B
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film layer
pad
photosensitive film
semiconductor wafer
protection body
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TW089117240A
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English (en)
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I-Ming Chen
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I-Ming Chen
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Priority to TW089117240A priority Critical patent/TW494548B/zh
Priority to US09/688,855 priority patent/US6420788B1/en
Priority to JP2000368391A priority patent/JP3401518B2/ja
Priority to DE10103966A priority patent/DE10103966B4/de
Priority to US10/125,179 priority patent/US6610558B2/en
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Publication of TW494548B publication Critical patent/TW494548B/zh

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Description

494548 五、發明說明（l) 本發明係有關於一種半導體晶片裝置及其封裝方法， 更特別地，係有關於一種良率高的半導體晶片裝置及其 裝方法。 ^ 本案發明人於民國八十九年一月十四日向鈞局提出 名稱為『半導體晶片裝置及其封叢方法』發明專利申請宰 ^申請案號為89 1 00578號），該申請案係有關於一種適二 文裝至一基板之半導體晶片裝置及其封裝方法。於此，本 案發明人再提出一種良率高的半導體晶片裝置及其封裝方 法0 有鑑於此，本案發明人遂以其從事該行業之多年經驗 ，並本著精益求精之精神，積極研究改良，遂有本發明『 半導體晶片裝置及其封裝方法』產生。 本發明之目的是為提供一種良率高的半導體晶片 及其封裝方法。 根據本發明 法，包含如下之 具有一形成有數 於該半導體晶元 焊墊形成有數個 段，於每一焊墊 該形成板 形成有一 以致於感 光過程不 之後， 感光薄 光薄膜 會被暴 之一特徵， 步驟：提供 個焊墊的表 之上’該形 用以暴露對 上形成有一 於該半導體 膜層；把— 層之對應於 露，而該感 種半導體晶片 一半導 面；把 成板係 應之焊 抗酸驗 晶元的 光罩置 焊墊保 光薄膜 體晶元， 一焊墊保 對應於該 墊的貫孔 的焊墊保 表面和焊 於該感光 護體的部 層之餘下 裝置的 該半導 護體形 半導體 ;利用 護體； 墊保護 薄膜層 份在後 的部份 封裝方 體晶元 成板置 晶元的 印刷手 在移去 體上係 之上’ 續的曝 在經過
494548 五、發明說明（2) 後續的曝光過 膜層之對應於 可暴露對應的 於該感光薄膜 為倒丁形狀的 根據本發 :一半導體晶 表面；一感光 元的表面上， 成一橫載面成 電體。 有關本發 其功效，茲例 第一至七 之封裝方法的 程後會硬化 焊墊保護體 焊墊保護體 層在對應於 ;在經過 的部份係 曝光過程後，該 經過化學處理來 ;把焊墊保護體沖洗去除 的地方係形成一 内形成有一導電 每一焊墊 穿孔；及於每一穿孔 明之另一特徵’ 一種半導體晶 元，該半導 薄膜層，該 該感光薄膜 倒τ形狀的 體晶元具 感光薄膜 層在對應 穿孔；及 片裝置 有一形成有數個 層係形成於該半 於每一焊墊的地 形成於每一穿孔 感光薄 去除俾 ，以致 橫戴面 體。 ’包含 焊墊的 導體晶 方係形 内的導 1120 42 半導體晶 焊墊 貫孔 感光薄膜 光罩 延伸部 保護層 在本發明 明為達上述目的、特 舉較佳實施例並配合 圖係描繪本發明較佳 流程圖。 元件標號對照^ 1023愚 404143 徵所採用的技術手段及 圖式說明如下： 實施例半導體晶片裝置 表 表面 焊墊保護體形成板 焊墊保護體穿孔 導電體 連接部 被洋細描述之前，庫要#杳 J應要，主思的是在整個說明
第5頁 494548 施例之一 第 至七 係由相同的標號標示。 種半導體晶片裝置及其封裝$ 示’ 一半導體晶元1係被提供 成有數個焊墊11的表面丨〇 ( & 第一圖所 具有一形 一焊墊） 戶斤示，一 。在本實 板2係對 露對應之 。然後， 用印刷手 ，該等焊 感光薄膜 除來形成 被移去之 表面1 0和 五、發明說明（3) 當中，相同的元件 本發明較佳實 法將會在下面配合 首先，請參閱 。該半導體晶元1 第一圖中僅顯示有 請參閱第二圖 半導體晶元1之上 印刷網板。該形成 形成有數個用以暴 僅顯示有一貫孔） 樹脂或松香般，利 焊墊保護體3 。 應要注意的是 感光薄膜層、將該 曝光的部份沖洗去 在該形成板2 該半導體晶元1的 示般。 焊墊保護體形成板2係置於$ 施例中，該形成板2可以是 應於該半導體晶元1的焊塾1 1 焊塾11的貫孔20 (在第二圖中 以抗酸鹼的絕緣枯料，像取^ 段，於每一焊墊丨丨上形成有二 墊保護體3亦可以藉由形成一 層之預定部份曝光而然後把未 〇 後’ 一感光薄膜層4係形成於 '大干墊保遵體3上，如第三圖所 膜斤，請參閱第四圖所示，-光罩5係置於該感以 : ^，以致於感光薄膜層4之對應於焊墊保護體3 曝光過程不會被暴露。該感光薄膜廣4: 、邛伤在經過後續的曝光過程後會硬化。 現在請參閱第五圖所示，該感光薄膜層4之對應於4
五、發明說明（4) 墊保護體3 露對應的焊 液沖洗去除 的地方係形 所顯示般。 接著， 膠為材料形 該感光薄膜 伸部4 2延伸 的連接部4 3 上。 由於延 的專利申請 應要注 T形狀之穿 的電氣連接 良率。 的部份然後 t保護體3 ’以致於該 成一橫截面 請參閱第七 成有一導電 層4 上之作 出來之作為 。最後，一 伸部4 2和連 案中已有詳 意的是，藉 孔40的設置 在後績的加 係經過化學沖洗處理來去除俾可暴 。、接著’焊墊保護體3係以有機溶 感光薄膜層4在對應於每一焊墊j j 為倒T形狀的穿孔4〇，如第六圖中 圖所示，於每一穿孔40内係以導電 體41。每一導電體41具有一延伸於 為電路軌跡的延伸部4 2和一從該延 與外部電路（圖中未示）電氣連接 保護層6係形成於該感光薄膜層4 接部4 3的作用在本案發明人之前述 細描述，於此恕不再贅述。 由該感光薄膜層4上之橫截面為倒 ，導電體41與晶片1之焊墊^之間 熱測試過程中得到保障，進而提昇 綜上所述，本發明之『 方法』，確能藉上述所揭露 的與功效，且申請前未見於 專利之新穎、進步等要件。 種半導體晶片裝置及其封裝 之構造、裝置，達到預期之目 刊物亦未公開使用，符合發明 惟，上述所揭 已’非為限定本發 ’其所依本發明之 之圖式及說明，僅為 月之貫施例；大凡熟 特徵範疇，所作之其 本發明之實施例而 悉该項技藝之人仕 他等效變化或修飾
494548

Claims (1)

  1. 一種f導體晶片裝置的封裝方法，包含如下之步驟： 提供一半導體晶元，該半導體晶元具有一形 個焊墊的表面； 喝数 該
    把一焊墊保護體形成板置於該半導體晶元之上， 形成板係對應於該半導體晶元的蟬墊形成有數個用以 露對應之焊墊的貫孔； 利用印刷手段，於每一焊墊上形成有一抗酸鹼的焊 墊保護體； 在移去該形成板之後，於該半導體晶元的表面和焊 墊保護體上係形成有一感光薄膜層； 把一光罩置於該感光薄膜層之上，以致於感光薄膜 層之對應於焊墊保護體的部份在後續的曝光過程不會被 暴露，而該感光薄膜層之餘下的部份在經過後續的曝光 過程後會硬化； 在經過曝光過程後’該感光薄膜層之對應於焊墊保 護體的部份係經過化學處理來去除俾可暴露對應的焊墊 保護體； 把焊墊保護體沖洗去除致於該感光薄膜層在對 應於每一焊墊的地方係形成"^截面為倒T形狀的穿孔 ;及 於每一穿孔内形成有一導電體。 2·如申請專利範圍第1項所述之方法，其中，在形成導電 體的步驟中，每一導電體係以導電膠為材料形成並且具 有一延伸於該感應薄膜層上之作為電路執跡的延伸部和
    49454SL y年修正
    電氣連接的連 一從該延伸部延伸出來之作為與外部電路 接部。
    如申請專利範圍第1項所述之方法，在形成導電體 驟之後，更包含於該感光薄膜層上形成一保護層的步ς 4·如申請專利範圍第1項所述之方法，其中，在形成力曰 保護體的步驟中，該等焊墊保護體係以松香為材料ς成 〇 5·如申請專利範圍第1項所述之方法，其中，在形成焊塾 保護體的步驟中，該等焊墊保護體係以膠質樹脂為材料 形成。 ” 6·如申請專利範圍第1項所述之方法，其中，在去除焊塾 保護體的步驟中，焊墊保護體的沖洗去除係利用^機溶 液來達成 7. —種半導體晶片裝置’包含： /爭導體晶元，該半導體晶元具有一形成有數個焊 墊的表面； 一感光薄膜層，該感光薄膜層係形成於該半導體晶 元的表面上’該感光薄膜層在對應於每一焊墊的地方係 形成/横截面成倒τ形狀的穿孔；及 形成於每一穿孔内的導電體。 8. 如申請專利範圍第7項所述之半導體晶片裝置，其中， 每一導電體係以導電膠為材料形成並且具有一延伸於該 感應薄模層上之作為電路執跡的延伸部和一從該延伸部
    I _ 494548- 更包含 延伸出來之作為與外部電路電氣連接的連接部 9.如申請專利範圍第7項所述之半導體晶片裝置 一形成於該感光薄膜層上的保護層。
    第11頁
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