TW479339B - Package structure of dual die stack - Google Patents
Package structure of dual die stack Download PDFInfo
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- TW479339B TW479339B TW090104684A TW90104684A TW479339B TW 479339 B TW479339 B TW 479339B TW 090104684 A TW090104684 A TW 090104684A TW 90104684 A TW90104684 A TW 90104684A TW 479339 B TW479339 B TW 479339B
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Description
五、發明說明(1 ) 經濟部智慧財產局員工消費合作社印製 1 ·發明領域 θ本發明係關於一種封裝結構,詳言之 晶粒堆疊之封裝結構。 2 ·先前技術說明 如圖la及lb所示,目前習用之雜舌曰 』自用心又重日曰粒堆聱之封裝結4 丄’包括一基板11、_筮_ 一曰 日日粒1 2、一中間夹片j 3及一; -叩粒14。第一晶粒12固著於基板m,並以導線⑹ 至基板11,以與基板"形成電氣連接。中間夹片丨3設】 於第—晶粒12及第二晶粒14之間。該中間夹片13之尺1 通吊比第-晶粒i 2之尺寸小,以避免妨礙第—晶粒⑴ 基板1 1之導線連接。 中間夾片1 3以黏膠固著於第一晶粒丨2上,第二晶粒丄 汉置於中間夹片丨3之上,並以黏膠使第二晶粒丨4固著$ 中間夹片1 3。參考圖丨b所示,由於第二晶粒丨4之尺寸j 於該中間夾片13,在第二晶粒14之阻擋下,檢測儀器> 去心測第—晶粒! 4與中間夾片丨3之間之黏膠層1 5厚度3 周圍温膠區16之大小。若該黏膠層之厚度太薄或溢月 區16太大’經常會造成封裝產品之黏膠在溢膠區16| 開’使第二晶粒i 4無法確實固定於中間夾片1 3上,而έ 成封裝產品失敗。 因此,有必要提供一創新且富進步性的封裝結構’以角 決上述問題。
係關於一種雙J (請先閱讀背面之注意事 ---裝 寫- 寫本頁) 訂: -丨線- 本紙張尺度翻中國國家標準(CNS)A4規格(210 X 297公爱) 479339 A7 B7 _ 五、發明說明(2 ) 發明概述 本發明之目的在於提供一種雙重晶粒堆疊之封裝結構, 包括:一基板、一第一晶粒、一第二晶粒及一中間夹片。 該第一晶粒固著於該基板上,第一晶粒與第二晶粒分別以 導線連接至該基板,第二晶粒具有相對之二侧邊,該二侧 邊間之長度為一第一長度。該中間夾片設置於第一晶粒及 第二晶粒之間,並分別以黏膠固著連接於第一晶粒及第二 晶粒;對應於第二晶粒之二侧邊,該中間夾片具有相對之 二侧邊,該二侧邊間之長度為一第二長度,該第二長度大 於該第一長度,丨吏中間夾片之該二侧邊之邊緣侧向外露於 第二晶粒,使得中間夾片與第二晶粒間之黏膠在第二晶粒 之二侧邊之邊緣下所形成之溢膠區外霧,俾檢測儀器得以 檢測第二晶粒與中間夾片之間之溢膠區之大小或黏膠層之 厚度,以利控制封裝之品質,並可增強第二晶粒與中間夹 片之固著強度,以提高封裝產品之可靠度。 圖式簡述 圖1 a為習用之雙重晶粒堆疊之封裝結構之前視剖面示意 圖; 經濟部智慧財產局員工消費合作社印製 L----K----------裝·-- (請先閱讀背面之注意事寫本頁) •線· 圖1 b為習用之雙重晶粒堆疊之封裝結構之俯視圖; 圖2 a為本發明第一實施例之雙重晶粒堆疊之封裝結構之 前視剖面示意圖; 圖2 b為本發明第一實施例之雙重晶粒堆疊之封裝結構之 俯視圖; 圖2 c為本發明第一實施例之雙重晶粒堆叠之封裝結構之 -5 - 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 經濟部智慧財產局員工消費合作社印製 479339 A7 B7_ 五、發明說明(3 ) 右侧剖面7F意圖, 圖3 a為本發明第二實施例之雙重晶粒堆疊之封裝結構之 前視剖面示意圖; 圖3 b為本發明第二實施例之雙重晶粒堆疊之封裝結構之 俯視圖; 圖3 c為本發明第二實施例之雙重晶粒堆疊之封裝結構之 右侧剖面示意圖。 圖式元件符號說明 1 :習用之雙重晶粒堆疊之封裝結構 1 1 :基板 1 2 ·弟一晶粒 1 3 :中間夾片 1 4 ·第二晶粒 1 5 :黏膠層 1 6 :溢膠區 2 :本發明之雙重晶粒堆疊之封裝結構 2 1 :基板 2 2 :第一晶粒 2 3 :中間夾片 2 4 ·弟二晶粒 25 :黏膠層 2 6 :溢膠區 L 1 :第一長度 L2 :第二長度 一 6 — , 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) -----1---------裝--- (請先閱讀背面之注意事寫本頁) . -線· 479339 A7 B7 五、發明說明(4 ) wi :第一寬度 W2 :第二寬度 3 :本發明之雙重晶粒堆疊之封裝結構 3 1 :基板 3 2 :第一晶粒 3 3 :中間夹片 3 4 ·弟二晶粒 3 5 :黏膠層 3 6 :溢膠區 L4 :第一長度 L 5 :第二長度 L6 :第三長度 W4 :第一寬度 W5 :第二寬度 W6 :第三寬度 發明詳述 參考圖2a、圖2b及圖2c,本發明第一實施例之雙重晶 粒堆疊之封裝結構2包括:一基板21、一第一晶粒22、一 中間爽片2 3及一第二晶粒24。該第一晶粒2 2固者於該基 板2 1上,第一晶粒2 2與第二晶粒2 4分別以導線電氣連接 至該基板2 1。該中間夹片2 2設置於第一晶粒2 1及第二晶 粒2 2之間,並疊置於第一晶粒2 1之上,以黏膠固著於第 一晶粒2 1上。 第二晶粒2 4設置於中間夾片2 3之上,並以黏膠固著於中 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) ------------------- (請先閱讀背面之注意事寫本頁) 訂· · —線- 經濟部智慧財產局員工消費合作社印製 ^/9339 A7 ----^______ 五、發明說明(5 ) I ·— ϋ ϋ Γ· ϋ ϋ I ϋ H — ϋ n I · n I (請先閱讀背面之注意事寫本頁) 間夾片23。參考圖2b,第二晶粒24之縱向相對二侧邊間 具有一第一長度L 1 ;對應於該第二晶粒2 4之該縱向二侧 邊,該中間夾片2 3之縱向相對二侧邊間具有一第二長产 Λ2。該第二長度大於該第一長度!^,使中間夹片23之 該縱向二侧邊之邊緣外露於第二晶粒2 4之邊緣,並使得中 間夾片2 3與第二晶粒2 4間之黏膠在第二晶粒2 4邊緣下所 形成之溢膠區2 6外露,俾檢測儀器得以檢測第二晶粒2 4 與中間夾片2:)之祕膠區26之大小或黏膠層25之厚度,以 利控制封裝之品質,並可增強第二晶粒2 4與中間夹片2 3 之固著強度,以提高封裝產品之可靠度。 •線· 經濟部智慧財產局員工消費合作社印製 本發明第一實施例之第一晶粒2 2及第二晶粒2 4之尺寸大 約相同;惟為預留空間使第一晶粒22之導線可連接至基板 2 1,該中間夾片2 3不可完全覆蓋第一晶粒2 2。因此,對 應於該第二晶粒2 4之縱向二侧邊,該第一晶粒2 2及第二 晶粒2 4各另具有橫向相對之二侧邊,該橫向二侧邊間之長 度為一第一寬度W1 ;該中間夾片23亦另具有橫向相對二 侧邊,該橫向二侧邊間之長度為一第二寬度W 2。第二寬 度W 2小於第一寬度w1,俾有足夠之空間,使第一晶粒 22之導線連接至基板21。 如圖3a、圖3b及圖3c所示,本發明第二實施例之雙重 曰曰粒堆璺之封裝結構3包括:一基板31、一第一晶粒32、 一中間夾片3 3及一第二晶粒3 4。本發明第二實施例之封 裝結構3與第一實施例之封裝結構2之上下晶粒堆疊之結構 大致相同,不同之處在於第一晶粒3 2、中間夾片3 3及第 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 479339 經濟部智慧財產局員工消費合作社印製 A7 ------- B7 __五、發明說明(6 ) 二晶粒3 4之尺寸大小。 參考圖3 b ’該第二晶粒3 4具有縱向相對二侧邊’該二侧 邊間之長度為一第一長度L 4,對應於該第二晶粒3 4之二 侧邊,該中間夾片3 3之縱向相對二侧邊間之長度為一第二 長度L5。該第二長度L5大於該第一長度L4,使得中間夹 片3 3與第二晶粒3 4間之黏膠在第二晶粒3 4邊緣所形成之 溢膠區3 6外露,俾檢測儀器得以檢測第二晶粒3 4與中間 夾片3 3之間之溢膠區3 6之大小或黏膠層3 5之厚度,以利 控制封裝之品質。 對應於第二晶粒3 4之縱向二侧邊,該第^一晶粒3 2具有縱 向相對之二侧邊形成一第三長度L 6,該第三長度L 6大於 該第二長度L 5,俾使在該第一晶粒3 2之縱向二侧邊之導 線能連接至該基板3 1。 另外,對應於該第二晶粒3 4之縱向二侧邊,該第二晶粒 3 4另具有橫向相對之二侧邊,該橫向二侧邊間之長度為一 第一寬度W 4 ;該中間夾片3 3之橫向相對二侧邊則具有一 第二寬度W 5 ;第一晶粒3 2之橫向相對二侧邊則具有一第 三寬度W6。第二寬度W5小於第一寬度W4及第三寬度 W 6,俾有足夠之空間,使第一晶粒3 2橫向二侧邊之導線 可連接至基板3 1。 唯上述實施例僅為說明本發明之原理及其功效,而非限 制本發明。因此,習於此技術之人士可在不達背本發明之 精神對上述實施例進行修改及變化。本發明之權利範圍應 如後述之申請專利範圍所列。 一 9 一 本紙張尺度適用中國國家標準(CNS)A4規格(210 χ 297公釐) ----厂---------裝---- (請先閱讀背面之注意事項寫本買) ' # ί線
Claims (1)
- 479339 A8 B8 C8 D8 六、申請專利範圍 1 . 一種雙重晶粒堆疊之封裝結構,包括: 一基板; 二晶粒,具有一第一晶粒及一第二晶粒,其中該第一晶 粒固著於該基板上,該第一晶粒與該第二晶粒分別以導 線電氣連接至該基板,該第二晶粒具有相對之縱向二侧 邊,該縱向二侧邊之間具有一第一長度;及 一中間夾片,設置於第一晶粒及第二晶粒之間,並以黏 膠固著連接於第' ^晶粒及第二晶粒,對應於第二晶粒之 縱向二侧邊’該中間爽片具有相對之縱向二侧邊形成一 第二長度,該第二長度大於該第一長度,使中間夾片之 該縱向二侧邊之、邊緣外露。 2.如申請專利範圍第1項之封裝結構,其中對應於第二晶 粒之縱向二侧邊,該第一晶粒具有相對之縱向二侧邊形 成一第三長度,該第三長度大於該第二長度,俾使第一 晶粒以導線連接至該基板。 3 .如申請專利範圍第1或2項之封裝結構,其中對應於該 弟二晶粒之縱向二侧邊’該第二晶粒另具有相對之橫向 二侧邊形成一第一寬度,該中間夾片另具有相對之橫向 二侧邊形成一第二寬度,該第二寬度小於第一寬度。 4 .如申請專利範圍第3項之封裝結構,其中該第一晶粒另 具有相對之橫向二侧邊形成一第三寬度,該第二寬度小 於第三寬度。 - 10 - 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐)~ ---------------裝—— (請先閱讀背面之注意事項本頁) 訂· -線_ 經濟部智慧財產局員工消費合作社印製
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US10/087,432 US7023079B2 (en) | 2001-03-01 | 2002-03-01 | Stacked semiconductor chip package |
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US8198713B2 (en) * | 2007-07-13 | 2012-06-12 | Infineon Technologies Ag | Semiconductor wafer structure |
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JP6707292B2 (ja) * | 2016-10-14 | 2020-06-10 | 株式会社ディスコ | 積層チップの製造方法 |
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MK4A | Expiration of patent term of an invention patent |