經濟部中央標準局員工消費合作社印製 42T869 A7 ______B7 五、發明説明（e) 發明背景= 本發明係一種積體電路晶片之封裝方法及其結構，尤 指一種該&置_亀嚴J1須考慮晶片及固定元件之厚度，故可 縮小整個晶片封裝後_么厚度，而獲得較傳統晶片封裝之厚 - · 一 ~ 度更小、製程良率更髙之產品，有效提髙其市場之競爭力 先前技藝： 按，傳統之積體電路|其在作晶片之封裝時，請參照 第四、五圖所示，其係設有連續尙未沖斷之導線架7 1， 該導線架7 1中間位置處設有一支撐架7 2，奄支撐架7 2之兩側邊分別Μ複數個尙未沖切彎折之接腳7 3，另 ，在該支撐架7 2上藉由黏著劑固設有一晶片7 4，而兩 側邊之接腳7 3則以連接線7 5分別與晶片7 4相連接， 藉由該連接線7 5作爲電路訊號之傳遞，當欲封裝時，即 先將晶片7 4及接腳7 3置於模具內，並予以灌膠，使晶 片7 4及接腳7 3被固封於封膠7 6內，而接腳7 3未與 晶片14固接之一端7 3 1則外露於封膠7 6外，再將該 等接腳7 3予以沖切，並膂成所需之形狀，如此即完成 積體電路晶片之對裝怍業。 惟，傳統之積體電路經過上述之封裝程序後，請 參照第五圖所示，該整個積體電路之厚度大約係由幾部份 所構成，其中，從封膠7_6之底部至变撐架7 2底部具有 一 a.厚度，支撐架7 2本身之b厚度，再者，支撐架7 2 本纸張尺度適用中國國家標準（CNS ) A4規格（21 〇 X 297公釐） -----------裝------訂------旅 (請先閱讀背面之注意事項再填寫本頁) 4 21869 A7 __B7 五、發明説明（一） 經濟部中央標準局員工消費合作社印製 與晶片74間黏著劑之厚度f，支撐架72上方之晶片7 4本身之义厚度，另，從晶片7 4頂部至連接線7 5頂部 厚度，以及從連接線7 5頂部至封膠7 6頂部之e厚 度，故，傳統之積體電路經由這些厚度之組成，令積體電 路之整體I度無法縮小。 此外，傳統之稹體電路因晶片7 4係藉由接著劑 固設在導線之戈撐架‘7 2上，容易在支撐架7 2上 造威污染，且支撐架72本身材_置舆鼓膠7 „6材質之熱膨 脹，數差異較大，而容易在兩者介面間產生分離縫隙，使 水氣凝聚，當積體電路元件經週時，水|會汽化，產 生高壓而使遲靡爆開，使得在封膠7 6上產生裂痕，造成 產品之破壞，面不堪使用。 另外一種傳統積體電路之封裝結構，如美國專利第4 8 6 2 2 4 5號，請參照第六、七圖所示，其亦設有一導 線架8 1，該導線架8 1上之兩側邊設有複數個尙未彎折 沖斷之接腳8 2，而在兩側接腳8 2之底部則設有晶片8 3，該晶片<8 31與接腳8 2之間係先以雙面喊8 4固設在 一起，而兩側邊接腳8 2之相對應一端並以連接線8 5連 接至晶片8 3中間位置處，以該連接線8 5作爲電路訊號 之傳遞，當澈封裝時，亦先將晶片8JL及接胍8 2置於模 具內，並予以灌膠，使晶.片8 3及接腳8 2被固封於封膠 86內，而接腳82未與晶片83固接之一端821則外 露於封膠8 6外，再將該等接腳8 2之一端8 2 1予以沖 切，並彎折成所需之形狀，如此即完成積體電路晶片之封 本纸張尺度適用中國國家標準（CNS ) Α4規格（210Χ 297公釐） --- ί -1 - -- J— . --- ϋ ί __ *ςτ (請先閲讀背面之注意事項再填寫本頁) 421869 at _________B7五、發明説明（3Γ ) 經濟部中炎樣準局員工消費合作社印製 裝作業。 惟，第二種傳統之積體電路其雖然不再使用金屬 支撐架，而可改善第一種傳統積體電路之瘦線齩長的缺點 ，但，其整個積體電路厚度仍由幾部份所構成，其中，從 封膠8 6之底部至晶片8 3底部具有一a厚度，晶片8 3 本身之b厚度，晶片8 3上方之雙面膠8 4本身之c厚度 ，再者，雙面膠8 4上方之接腳8 2本身之d厚度，另， 從接腳8 2頂部至連接線8 5頂部之e厚度，以及從連接 線8 5頂部至封膠8 6頂部之f厚度，故，條疏之mil電 路仍須經由這些元件之組成，令第二種傳統積體電路之整 體厚度依窜無法縮小。 有鑑於此，爲改進上述習用裝置構造之缺點，發明人 經過長久努力硏究與實驗，終於開發設計@本發明之積體 電路晶片之封裝方法及其結構》 本發明之一目的，在提供一種積體電路晶片之封裝方 法，其中，係先將至少一固定元件固置在一導線架上，該 晶片與導線架上尙未沖切彎折之接腳約在同一平面，再藉 由固定元件將晶片與導線架固定在一起，蹰後’再將該等 接腳以連接線與晶片相連接|同時，_靈違蓋篇直Μ室元 件約在同一平面上，俟該等元件在導線架上完成連接定位 後，再將其置於獏具內施以灌膠之封裝程序’並將該等接 腳沖切膂折至所需之形狀，如此，即可完成積體電路晶片 (請先閱讀背面之注意事項再填寫本頁)Printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 42T869 A7 ______B7 V. Description of the Invention (e) Background of the Invention = The present invention is a packaging method and structure for integrated circuit chips, especially a & Considering the thickness of the chip and the fixed components, the thickness of the entire chip package can be reduced to obtain a thickness that is thicker than traditional chip packages-· Products with smaller degrees and better process yields can effectively enhance competition in their markets The previous technology: Press, the traditional integrated circuit | When it is used for the package of the chip, please refer to the fourth and fifth figures, it is provided with a continuous and unbroken lead frame 7 1, the lead frame 7 1 A support frame 7 2 is provided at the middle position, and a plurality of 尙 unpunched and bent pins 7 3 are respectively formed on both sides of the support frame 7 2. In addition, the support frame 7 2 is fixed by an adhesive. There is a chip 7 4, and the pins 7 3 on both sides are connected to the chip 7 4 with connection lines 7 5 respectively. The connection line 7 5 is used as the signal transmission of the circuit. When the package is to be packaged, the chip is firstly 7 4 and pins 7 3 are placed in the mold and filled with glue to make the wafer 7 4 Pin 7 3 is fixed in the sealant 7 6, and one end 7 3 1 of pin 7 3 which is not fixed to the chip 14 is exposed outside the sealant 7 6, and then these pins 7 3 are die-cut. And form the required shape, thus completing the assembly of the integrated circuit chip. However, after the traditional integrated circuit passes the above-mentioned packaging process, please refer to the fifth figure. The thickness of the entire integrated circuit is roughly composed of several parts, from the bottom of the sealant 7_6 to the variable support. The bottom of the 7 2 has a thickness, the thickness of the support frame 7 2 itself, and the support frame 7 2 This paper size is applicable to the Chinese National Standard (CNS) A4 specification (21 0X 297 mm) ---- ------- Installation ------ Order ------ Brigade (Please read the notes on the back before filling this page) 4 21869 A7 __B7 V. Description of Invention (I) Central Standard of the Ministry of Economic Affairs The thickness f of the adhesive printed between the bureau ’s consumer cooperative and the wafer 74, the thickness of the wafer 74 above the support frame 72 itself, and the thickness from the top of the wafer 74 to the top of the connection line 7 5 and from the connection line 7 5 The thickness of e from the top to the top of the sealant 76 is, therefore, the traditional integrated circuit is composed of these thicknesses, so that the overall I degree of the integrated circuit cannot be reduced. In addition, the conventional carcass circuit is fixed on the wire support '7 2 by the adhesive because the chip 7 4 is fixed by the adhesive, and it is easy to cause contamination on the support 7 2, and the support 72 is of its own material. The thermal expansion of the glue 7 „6 material has a large difference in number, and it is easy to create a separation gap between the two interfaces to condense water and gas. When the integrated circuit components pass through, the water | Open, causing cracks on the sealant 76, causing damage to the product and making it unusable. Another traditional integrated circuit packaging structure, such as US Patent No. 4 8 6 2 2 4 5 As shown in the figure, a lead frame 8 1 is also provided. The lead frame 8 1 is provided with a plurality of unbent and broken pins 8 2 on both sides, and the bottoms of the pins 8 2 on both sides are provided. There is a chip 8 3. The chip < 8 31 and the pin 8 2 are first fixed together with a double-sided shout 8 4, and the corresponding ends of the pins 8 2 on both sides are connected by a connecting wire 8 5. To the middle position of the chip 8 3, the connection line 8 5 is used as the transmission of the circuit signal. When the package is encapsulated, the chip 8JL and the guanidine 8 2 are also placed first. In the mold, glue is applied so that the wafer 8 3 and the pin 8 2 are fixed in the sealant 86, and the end 821 of the pin 82 that is not fixed to the chip 83 is exposed outside the sealant 8 6 Then, one end 8 2 1 of these pins 8 2 is die-cut and bent into a desired shape. In this way, the sealing of the integrated circuit chip is completed. The paper size is applicable to the Chinese National Standard (CNS) Α4 specification ( 210 × 297 mm) --- ί -1--J--. --- ϋ ί __ * ςτ (Please read the notes on the back before filling this page) 421869 at _________B7 V. Description of Invention (3Γ) Ministry of Economic Affairs The printing and assembly operation of the consumer cooperative of the Zhongyan-like Prospective Bureau. However, although the second traditional integrated circuit no longer uses a metal support frame, it can improve the shortcomings of the thin wire of the first traditional integrated circuit. However, the entire integrated circuit thickness is still composed of several parts, among which, there is an a thickness from the bottom of the sealant 86 to the bottom of the wafer 8 3, the b thickness of the wafer 8 3 itself, and the two sides above the wafer 8 3 The thickness of c of the adhesive 8 4 itself, in addition, the thickness of the d of the pin 8 2 above the double-sided adhesive 8 4, and from the top of the pin 8 2 to The thickness of e at the top of the wiring 8 5 and the thickness of f from the top of the connecting wire 8 5 to the top of the sealant 86. Therefore, the sparse mil circuit must still be composed of these components to make the second traditional integrated circuit as a whole. In view of this, in order to improve the shortcomings of the conventional device structure described above, the inventor finally developed and designed after long-term research and experiment. @ 发明 发明 Integrated Circuit Chip Packaging Method and Structure " One purpose is to provide a method for packaging an integrated circuit chip, wherein at least one fixing element is first fixed on a lead frame, and the chip is on the same plane as the unpunched and bent pins on the lead frame. Then, the chip and the lead frame are fixed together by the fixing element, and then the pins are connected to the chip with a connecting line | At the same time, the element of the M chamber is about the same plane, 俟After the components are connected and positioned on the lead frame, they are placed in a tool and applied with a potting packaging process, and the pins are die-cut and folded to the desired shape, so that the product can be completed. Body Circuit Chip (Please read the notes on the back before filling this page)
本紙伕尺度適用t國國家標準（CNS ) Α4规格（210X297公釐） 經濟部中央標準局員工消費合作，杜印裝 A7 ---------B7 五、發明説明（四） 之封裝。 本發明之另一目的，在提供一種積體電路晶片之封裝 結構，其中，係設有一導線架，該導線架上設有尙未沖切 彎折之複數個接腳，並在導線架上置設一晶片，該晶片之 位置並與接腳約在同一平面上，其與導線架間係藉由固定 元件相結合，與每一接腳間則藉由連接線予以連接，其中 該等連接線與該固定元件約在M—平面上，俟該等元件在 導線架上完成連接定位後，再將其置於模具內施以灌膠之 封裝程序，並將該等接腳沖切彎_折1所需之形狀，如此， 即可完成稹邋電路晶段之封裝，本發明中，由於，該積體 電路內僅須考_盧逼发及_嵐定元件之曼度，故可大幅縮小整 值稹體之厚度，且本發明之晶片不盪_與僂兢之支撐架 氣军在一起，可避免民杰第_之汽化而使封膠爆裂產生裂痕 之1J形，再者，本發明之連接線距離縮短，更_可傳_停輸速 度提髙，及電感效應降低，有效提高產品之信賴度及可靠 度。 爲使能對本發明之目的、形狀構造裝置特徵及其功效 ，作更進一步的認識與瞭解，茲舉實施例配合圖示，詳細 說明如下： 圖示之簡單說明： 第一圖係本發明之積體電路內部剖面示意圖。 第二圖係第一圖之側面剖面圖。 本紙浪尺度適用中國國家榇準（CNS ) A4规格（2丨0X297公釐） ϋ ίί —J n n r. — n n ___士K--.1 I 1I, I I_ 丁___ , 0¾. -"-------------1 -—-------- (請先閱讀背面之注意事項再填寫本頁) 421869 A7 B7 五、發明説明 (五） 第三圖係本發明固定元件之放大剖面圖。 第四圖係習用之導線架示意圖。 第五圖係習用之積體電路之剖面圖。 第六圖係另一習用之導線架示意圖。 第七圖係另一習用之積體電路之剖面圖。 主要元件編號： 導線架 1 晶片 2 接腳 11 連接線 3 固定元件 4 膠帶 41 封膠 5 詳細說明： 請參閱第一 '二圖所示’本發明係一種「稩髀雷路晶 片之封裝方法及其精構」，芏要係設·有一導線架1，該導 線架1中間位MJ1中空恰可容置一晶片2，而在該導 線架1之側邊上係形成有複數個尙未彎折沖斷之接脚11 ，使接脯U 1與晶片②約在同一平_面上，邀等接腳1 1鄰 近於晶片2之一端係藉由連接線3與晶片2相連接，以作 爲電路訊號之傳遞，而連接線3係呈一弧狀的與晶片2及 接腳11相連接。 經濟部中央標準局員工消費合作社印製 (請先閱讀背面之注意事項再填寫本頁) 在本發明之最佳實施例中，該導線架1在對應於晶片 2之兩側邊則係形成有連接板12，並在該晶片2與連接 板1 2之間黏固有固定元件4，以藉由該固定元件4使晶 片2與連接板1 2固定在一起，當然，對於熟悉該項技術 之人士’亦可直接藉由固定元件4將晶片2與導線架1固 本紙张尺度適用中國國家標準（CNS ) A4規格（210X297公瘦） 經濟部中央梂準局貝工消費合作社印裝 421869 A7 ___B7 五、發明説明（+) 定在一起，本實施例中該固定元件4係黏固在晶片2與連 接板1 2上方，其亦可固設在晶片2與連接板1 2下方， 而該固定元件係爲膠帶4 1，請參照第三圖所示，該膠帶 4 1之材質係包括有一曆基材層4 1 1，在基材層4 1 1 之一面係設有一黏膠屠4 1 2，藉由該黏謬餍4 1 2黏固 在晶片2與導線架1所形成之連接板1 2上，另，可在基 材層4 1 1上加入一金屬層，如銅箔等，以增加膠帚4 1 之結構強度，而該膠帶4 1之厚度係恰能與連接線3在同 一平面上· 請參照第二圓所示，本發明中，_曼元佐_在導線架 1上完成連接定位後·即可作封合之步腰，首先，先將導 線架1輸送至一模具內，予以灌膠，使該等接脚1 1及晶 片2被封固於封膠5內*而接脚1 1遠離晶片2之另一端 係作爲焊接部1 1 1，其係外露於封膠5外，俾藉由該焊 接部1 1 1使穣«電路能焊固於電路板上，嗣後，再將該 導線架1上之複數個接脚11予以沖切彎折至所需之形狀 *如此，即完成整個積體電路晶片封合之步骤· 請再參照第二圖所示，本發明中，該積《電路之厚度 大約係由幾部份所構成•其中*從封膠5之底部至晶片2 之底部具有一a厚度，晶片2本身之bff度•以及連接線 3本身之c髙度，另，從連接線3至封膠5頂部之d厚度 ，由上可知，本發明之積雔電路，由於，僅須考慮晶片2 及固定元件4之厚度*故可大幅縮小整個積镫電路之厚度 ，從而提升灌膠製程良率，而獲得較傅統積髖電路之厚度 本紙张尺度適用中國國家棣率（CNS ) A4规格（210X297公釐） {請先閱讀背面之注意事項再填寫本頁) 】裝_ 421869 A7 —__B7 _ 五、發明説明（七） 更小之產品，有效提髙其市場之競爭力。 再者，本發明之晶片2不再需要與傳統之支撐架固定 在一起，可避免因水氣之汽化而使封膠爆裂產生裂痕之情 形發生，此外，本發明之連接線3距雔亦較傳統之連接線 縮短，更可使傳輸速度提高，及電感效應降低，俾有效提 高產品之信賴度及可靠度。 惟以上所述，僅爲本發明之諸可行實施例而已，並非 用以限定本發明之專利範圍，舉凡依據下列申請專利範圍 所述之內容、特徵以及其精神而爲之其他爱化之等效實施 •皆應包含於本發明之專利範圍內。 H I— I— I .^1 n n · ^Ϊ n n* n —Ϊ T I— -- I n 1 I A (請先閱讀背面之注意事項再填寫本頁) 經濟部中央標準局負工消費合作社印製 本紙浪尺度適用中國國家標率（CNS ) Α4規格（210X297公釐）The size of this paper is applicable to the national standard (CNS) A4 specification (210X297 mm). The consumer cooperation of the Central Standards Bureau of the Ministry of Economic Affairs, printed on A7 --------- B7 V. Description of the Invention (4) Packaging . Another object of the present invention is to provide a package structure of an integrated circuit chip, wherein a lead frame is provided, and the lead frame is provided with a plurality of pins which are not punched and bent, and are placed on the lead frame. A chip is set, and the chip is positioned at about the same plane as the pins. The chip and the lead frame are connected by a fixing element, and each pin is connected by a connecting line. These connecting lines It is on the M-plane with the fixed component. After the components are connected and positioned on the lead frame, they are placed in a mold to apply the encapsulation procedure of the glue, and the pins are punched and bent. 1 required shape, in this way, the package of the crystal circuit segment can be completed. In the present invention, since the integrated circuit only needs to test the _Lu forced and _Landing components, it can be greatly reduced The thickness of the carcass is adjusted, and the wafer of the present invention is not __ together with the support frame of the __, which can avoid the 1J shape of Minjiedi ’s vaporization and cracks in the sealant. Furthermore, the invention The distance between the connecting lines is shortened, and the transmission speed can be improved. Should be reduced, effectively improve the reliability of products and reliable. In order to enable further understanding and understanding of the object, shape structure, and features of the present invention, the embodiments are illustrated in detail with the illustrations as follows: A brief description of the drawings: The first diagram is the product of the present invention Schematic cross-section of the internal body circuit. The second figure is a side sectional view of the first figure. The paper scale is applicable to China National Standards (CNS) A4 (2 丨 0X297 mm) ϋ ίί —J nn r. — Nn ___ 士 K-. 1 I 1I, I I_ 丁 ___, 0¾.-&Quot; ------------- 1 ----------- (Please read the notes on the back before filling this page) 421869 A7 B7 V. Description of the Invention (5) Third The drawing is an enlarged cross-sectional view of the fixing element of the present invention. The fourth diagram is a schematic diagram of a conventional lead frame. The fifth figure is a cross-sectional view of a conventional integrated circuit. The sixth diagram is a schematic diagram of another conventional lead frame. The seventh diagram is a cross-sectional view of another conventional integrated circuit. Main component number: lead frame 1 chip 2 pin 11 connecting wire 3 fixing element 4 tape 41 sealing compound 5 detailed description: please refer to the first 'shown in the second figure'. "The fine structure", there is a lead frame 1. The middle of the lead frame 1 MJ1 can hold a wafer 2 in the hollow, and a plurality of unbent punches are formed on the side of the lead frame 1. The broken pin 11 makes the connection U1 and the chip ② approximately on the same plane, and invites the end of the pin 1 1 adjacent to the chip 2 to be connected to the chip 2 through the connection line 3 as a circuit signal. The connection line 3 is connected to the chip 2 and the pin 11 in an arc shape. Printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs (please read the precautions on the back before filling this page). In the preferred embodiment of the present invention, the lead frame 1 is formed on the two sides corresponding to the wafer 2. The connecting plate 12 and an inherent fixing element 4 is adhered between the wafer 2 and the connecting plate 12 to fix the wafer 2 and the connecting plate 12 together by the fixing element 4, of course, for those who are familiar with the technology 'It is also possible to fix the chip 2 and the lead frame 1 directly by the fixing element 4. The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297 male and thin). Printed by the Central Labor Bureau of the Ministry of Economy Description of the invention (+) together, in this embodiment, the fixing element 4 is fixed above the wafer 2 and the connecting plate 12, and it can also be fixed below the wafer 2 and the connecting plate 12, and the fixing element The tape 4 1 is shown in the third figure. The material of the tape 4 1 includes a calendar base layer 4 1 1, and one side of the base layer 4 1 1 is provided with an adhesive layer 4 1 2. It is formed by the stickiness 4 1 2 fixed on the chip 2 and the lead frame 1 A metal layer, such as copper foil, can be added to the base layer 4 1 1 to increase the structural strength of the rubber broom 41, and the thickness of the adhesive tape 4 1 can be precisely connected to the connecting line. 3 On the same plane. Please refer to the second circle. In the present invention, after _Man Yuan Zuo has completed the connection and positioning on the lead frame 1, it can be used as a sealing step. First, the lead frame 1 is transported first. Into a mold, fill the glue so that the pins 11 and the chip 2 are sealed in the sealant 5 *, and the other end of the pin 1 1 away from the chip 2 is used as the welding part 1 1 1, which is exposed. Outside the sealant 5, the soldering portion 1 1 1 enables the circuit to be soldered on the circuit board, and then the plurality of pins 11 on the lead frame 1 are punched and bent to the required position. The shape of the product is * In this way, the entire integrated circuit chip sealing step is completed. Please refer to the second figure. In the present invention, the product "the thickness of the circuit is approximately composed of several parts. The bottom of 5 to the bottom of chip 2 has an a thickness, the bff degree of the chip 2 itself, and the c 髙 degree of the connection line 3 itself, and from the connection line 3 to the top of the sealant 5 d thickness, as can be seen from the above, since the accumulation circuit of the present invention only needs to consider the thickness of the chip 2 and the fixed component 4 *, the thickness of the entire accumulation circuit can be greatly reduced, thereby improving the yield of the pouring process and obtaining a relatively Fu Tongji's hip circuit thickness This paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) {Please read the precautions on the back before filling this page)】 _ 421869 A7 —__ B7 _ 5. Description of the invention (7 ) Smaller products effectively enhance their market competitiveness. In addition, the wafer 2 of the present invention no longer needs to be fixed together with the traditional support frame, which can avoid the occurrence of cracks in the sealant due to the vaporization of water and gas. In addition, the distance between the connecting wire 3 and the distance 3 of the present invention is also relatively small. The shortening of the traditional connection line can increase the transmission speed and reduce the inductance effect, which can effectively improve the reliability and reliability of the product. However, the above are only the feasible embodiments of the present invention, and are not intended to limit the patent scope of the present invention. For example, other equivalents based on the content, features and spirit of the following patent scope Implementations should be included in the patent scope of the present invention. HI— I— I. ^ 1 nn · ^ Ϊ nn * n —Ϊ TI—-I n 1 IA (Please read the notes on the back before filling this page) Printed by the Central Standards Bureau, Ministry of Economic Affairs The wave scale is applicable to China National Standards (CNS) Α4 specifications (210X297 mm)