TW454246B - Method for fabricating a semiconductor structure having a crystalline alkaline earth metal oxide interface with silicon - Google Patents
Method for fabricating a semiconductor structure having a crystalline alkaline earth metal oxide interface with silicon Download PDFInfo
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- TW454246B TW454246B TW089105137A TW89105137A TW454246B TW 454246 B TW454246 B TW 454246B TW 089105137 A TW089105137 A TW 089105137A TW 89105137 A TW89105137 A TW 89105137A TW 454246 B TW454246 B TW 454246B
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B23/00—Single-crystal growth by condensing evaporated or sublimed materials
- C30B23/02—Epitaxial-layer growth
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/10—Inorganic compounds or compositions
- C30B29/16—Oxides
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/10—Inorganic compounds or compositions
- C30B29/16—Oxides
- C30B29/22—Complex oxides
- C30B29/30—Niobates; Vanadates; Tantalates
Description
4 5 4X46 ~y 五、發明說明(l) 本申請書已在1 999年3月22曰在美國申請為專利申請號 09/273, 929 0 本發明之領域 本發明係一般性地關於一種製造半導體結構的方法,包 括結晶形驗土金屬氧化物與石夕基材及其他氧化物的介面, 且更特別地關於製造包括驗土金屬、石夕及氧之原子層的介 面.。 本發明之背景 有序且穩定的矽(Si)表面是用於許多裝置用途、在石夕上 單晶薄膜的後續磊晶(ep i t ax i a 1)生長最想要的,例如:電 鐵或高介電常數氧化物’用於非揮發性高密度記憶及邏輯 裝置。重要的是:在Si表面上建立有序的過渡層,特別是 単晶氧化·物的後續生長,例如:perovskites。 有一些報告了這些氧化物的生長,如:在Si(l〇〇)的BaO 及BaTi03 ’是以BaSi2 (立方)樣板(template)為基礎,使 用反應性磊晶(epitaxy)在大於850 °C的溫度下,在 Si(100)上沉積四分之一單層的Ba ^見例如:r.麥基 (McKee)等人 ’ Αρρΐ. Phys. Lett. 59(7), 782-784頁 (1991 年8 月 12 日);R.麥基(McKee)等人,Appl. Phys. Lett. 63 ( 20 ),28 1 8-28 20 頁( 1 9 93 年 11 月 15 日);R.麥基 (McKee)等人 ’ Mat. Res. Soc. Symp. Proc. 21 冊, 131-135頁(1991年);1 9 93年7月6日頒發之美國專利 5,2 2 5,0 3 1號,標題為"磊晶地沉積氧化物於矽基材上的方 法及以該方法製備的結構(process for Depositing an
_s··— 19 112 Iper'ovsk: i 涵1 3舜 B o s 1 4= SI s 101舜涩 $ s 1 齊命*-藤H ^ M VP •Is 今 & - 沐 ® Θ S i A Λ 44 s 馨 — Λ 私 _ $ -i-i β ^ t p 雜私$孙 讲.涵一知2_ $ 1 Ο ο ϊ, 妝二 * 含J釦0 : 丄 lA^r V-^L N^— v>^r X 1 ) & 衆 霖雜A & Mr o 雜舯麥 奸咖咐 ' 〇2 率s舜s ( 3 ) • Lp V® Γ+e
1 3 Θ 今Γ1Ι VA^*P f 贴一 13-^ 钿 + _ 。 L^l· s-(si)_$¥ I p Ψ ^ s p Λ^ s ^ fa 。 β Λ1 $ s ^ '知耻♦& _t-> 斜 utr 。S i ON黎澌雜舯库s , ΛΎ o 1 斗 > 耻卡斗皿έ s Λ* _跏P s V ^ ft I $ . p 亦和 V/濟(2X 1)洳 &12^Γί 市身 ^ β ^ ft- ^ ^ o on JM ^ ωοοοπ φσ μη ^ j f hr ο hr IT p ^ ? s 12 IF s dan闪 1 in旳 W s 冷 & 1 4= 4 _ Λ、Jy 今 β、J- :¾^ 锋凇 1 x 1 oi 難 y 碎诹梦漪餐A A 碎辦赞濟择A A s ftt Λ^υ $u .9 B o ^ ^ ¥r s > VP i M $u B o ^ ^ ¥r y VP 1 H w h 齣捭ΛΓ麥卜M彥诛驾4 ί ^ $ 耻 Λ-斜 ί ,¾ h ?ΛΓ^^( Si 02 ) ssiJ ^T ^ ^ s - H K, Λ— ftt Λ^υ ^pr ΛΚ s ftM ΐ ^ 斜VI净v/濟如 ® 1 2 s S i 雌 1 s v/濟 餐-\\, -ί S i 〇2 i 萍 p、4 -势 M y 斧餺!審s S i ( 1 ύ, i M 耻卡 Λ.雜f 库 Lr - t 辦条雜舯雜 ^ usf ο ο o on JM / ^F p ( m B a IT )奇 ,δ- s- M, s 005 雜
B 4 5 4 6 > 五、發明說明(4) 或連續供應(如圖1中箭號所示) 想 表面1 2而形成。使用於表面丨2、 入 %到 是任何金屬,但在較佳1體f ^ ;, ,金屬可以 鋇㈤或·) 實施例中包含驗土金屬,如: 使用Ba、Si及%形成BaSi〇2做 能電子繞射(RHEED)技術來監測^ ,疋^用反射高 ..+, ^ 仉术皿剧生長,其在習知技藝φ =地敘4,並可就地使用,即:在生長室中進行=已 t =RHEED技術可用來侦測或感應表面結晶結構了步 以Μ1。2原子層的形成,快速地改變為忒在 1然要了解:一旦提供並照著特定的I、, ,八一疋在每一個基材上需要進行RHEED技術。、坆方. 二面14的新穎原子結構會在後續的段落中敘述。 3知此藝者必須了解:$些方法所給的溫度及步顿θ · 2 :二特別具體實施例的建議,但本發明不限疋f士 度或壓力範圍。 寸别的溫 參照圖3-6,另一個方法包含形成具有表面12的Si基材 10及其上的3丨〇2層16。一旦Si基材10曝露於空氣(氧氣) 中’ S 1 〇2層1 6自然地存在(自然氧化物),或以此藝中已熟 知^的ί控制方式特意地形成,例如:在表面1 2上加熱地加上 (前號)氧氣。新穎的介面14可以在至少兩個所建議的具'體 實她例之一中如下地形成:在700-900 °C、超高真空下,將 驗土金屬塗覆到Si 02層16的表面18上。更特定地,Si基材 1 0及無結晶性的S i 02層1 6被加熱到低於S i 02層1 6之昇華溫 度的溫度(通常低於9 0 0 °C )。此可在分子束磊晶室中完
第8頁 案號 89105137 」。* - ——-----勹 9 年 修正 曰 五、發明說明(5) _ f劁^ Ϊ Ϊ轉到生長室並加熱完成之後,S 1基材1 0至少可 在生被Ϊ分加熱。一旦Si基材10被適當地加熱,且 ί的5力被適當地降低,其上具有Si〇2層16之Si i n 曝露於金屬束中,較佳的是鹼土金 ^ ^圖5所示。在較佳具體實施例中,該束為Sr, ΐϊ 池。或從卜束蒸發來源所產生。在特定實 並將Si(^16轉換二2二6U^a束中,a聯結叫 u 3秸日日形之BaS 1 0?的介面1 4 。s 二〇,Γ丄金較低的溫度下被提供到表面w上,在 700 900C、超兩真空下將該結果退火。 矣:ί,成介面14,一或多層的單晶氧化物可在介面14的 st〇 ^ - : Β:0 Ϊ .,, ;;丨面4及單晶氧化物之間。此鹼土金屬氧 ^匕物k供低介_電常數。(對某些用途有優點,如:記憶電屬 '夫者^ t R氧氣從單晶氧化物移動到S i基材1 0上' 或等曰’η驗Λ金屬氧化,層22的形成,可以在小於 ' C且〇2分壓小於或等於1χ1〇-5荟Ρτ ± ,, 土金屬及氧氣之介面14的表面20而完:i 夂i if ! 1物層22可以包含例如:50~ 5 0 0 A的厚度。 參考圖9-12,單晶氧化物層26,如:驗土 、氧氣分壓小於或 的鈇’到介面14之表面20上、或驗土 化物層22的表面24上而形成。例如:此單晶氧化物層以可
O:\63\63044.ptc 第9頁 2001.07.10.009 五、發明說明
層i2辞曰念?3度’且與下面介面14或驗土金屬氧化物 1 ^ m ZZ 拍‘地相合。必須了解:單晶氧化物層2 6在 其他具體實施例中可包含一或多層。 2 fi ί Ϊ 3能顯示S 1基材1 〇、介面1 4及鹼土金屬氧化物層 能ί f ·Γ、的側面(以<ϊ1()〉的方向看)。所顯示的形 ^匕3 對大小做說明的目的,從較大到較小:鋇原子 &二矽a、氧原子34、及鈦原子36。Si基材10只包含 ’、子 ”面1 4包含金屬原子(在較佳具體實施例中被 j明為鋇原子3〇)、矽原子32及氧原子34。鹼土金屬氧化 物層26包含鋇原子3〇、氧原子34及鈦原子36。 參考圖1 4 ’為沿著圖丨3之觀察線AA的介面正面圖,顯示 鋇、矽及氧原子3 0、3 2、3 4的排置。 參考圖1 5,為沿著圖丨3之線A A的正面圖,顯示介面丨4及 S i基材1 0之頂.部原子層11。 對此討論’單層等於6. 8 χ ίο!4原子/平方公分,且原子 層是一個原子厚》可見:顯示於圖中的介面丨4包含單一原 子層,但可多於一個原子層,而Si基枒1〇及鹼土金屬氧化 物層可以是許多原子層。要注意:在圖丨3中,顯示只有四 個原子層的s i基材10及只有三個原子層鹼土金屬氧化物 層26。介面14包含半個單層鹼土金屬、半個單層矽 '及單 層氧。母一個鎖原子30與在Si基材1〇中的四個梦原子32大 概等距。在介面14的矽原子32大致在一條線上,且在< 110>的方向上在鹼土金屬原子之間等距。在Si基材1〇頂 層原子中每一個矽原子32 ’在介面1 4中鍵結到氧原子34,
O:\63\63044.ptc 第10頁
2001.07.10.010 4 b 4 ^ 4 b 和年^月<丨日修正/更正/補充 ,·. _索號89105137 90年Ί月丨7曰 修正___ 五、發明說明(7) 且在介面1 4中的每一個矽原子3 2鍵結到介面1 4中的兩個氧 原子3 4。介面1 4在S i基材1 0之(0 0 1 )表面上的2 X 1形態一 中、<110〉方向的lx及<110〉方向的2x中,包含成行 的鋇、矽、及氧原子30、32、34。介面14具有2x 1的再建 構。 製造有矽1 0之薄結晶形介面1 4的方法已在此敘述。介面 1 4可包含單一原子層。較佳的電晶體用途可以薄的介面1 4 達到,其中堆疊氧化物層對S i基材1 0的偶電不會被犧牲, 且其中介面14更穩定,因為原子會在加工中更偏向維持其 結晶性。
O:\63\63044.ptc 第11頁 2001.07.10.011
Claims (1)
- 六、申請專利範圍 1. 一種製造半導體結構的方法,包含的步驟為: 提供具有表面的矽基材; 在矽基材的表面上形成一個介面,其包含矽、氧及金 屬;且 '在介面上形成一或多層的單晶氧化物。 2. 如申請專利範圍第1項中之製造半導體結構的方法, 其中形成介面的步驟包括形成一個2 X 1的形態。 3. 如申請專利範圍第1項中之製造半導體結構的方法, 其中形成介面的步驟包括在超高真空系統中形成介面。 4. 如申請專利範圍第1項中之製造半導體結構功方法, 其中形成介面的步驟包括在化學氣相沉積系統中形成介 面。 5. 如申請專利範圍第1項中之製造半導體結構的方法, 其中形成介面的步驟包括在化學氣相沉積系統中形成介 面0 6. 如申請專利範圍第1項中之製造半導體結構的方法, 其中形成介面的步驟包括形成矽、氧、及鹼土金屬的單一 原子層。 7. 如申請專利範圍第6項中之製造半導體結構的方.法, 其中鹼土金屬是選自鋇及勰的族群。 8..如申請專利範圍第1項中之製造半導體結構的方法, 其中形成介面之步驟所包含的步驟為: 形成一半的單層驗土金屬; 形成一半的單層矽;且O:\63\63044.PTD 第12頁 4 5 4^4 8 > 六、申請專利範圍 形成單層氧。 9. 一種製造半導體結構的方法,包含的步驟為: 提供具有表面的矽基材; 在石夕基材的表面上形成無結晶性之二氧化碎; 在無結晶性之二氧化矽上提供鹼土金屬;且 將半導體結構加熱,以在鄰近矽基材的表面形成包含單 一原子層的介面。 10. 如申請專利範圍第9項中之製造半導體結構的方 法,其中加熱步驟包括形成2 X 1再建構的介面。O:\63\63044.PTD 第13頁
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US09/273,929 US6241821B1 (en) | 1999-03-22 | 1999-03-22 | Method for fabricating a semiconductor structure having a crystalline alkaline earth metal oxide interface with silicon |
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US6639249B2 (en) | 2001-08-06 | 2003-10-28 | Motorola, Inc. | Structure and method for fabrication for a solid-state lighting device |
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US6806202B2 (en) * | 2002-12-03 | 2004-10-19 | Motorola, Inc. | Method of removing silicon oxide from a surface of a substrate |
DE10303875B4 (de) * | 2003-01-31 | 2006-03-16 | Technische Universität Clausthal | Struktur, insbesondere Halbleiterstruktur, sowie Verfahren zur Herstellung einer Struktur |
DE10340202A1 (de) | 2003-08-28 | 2005-04-14 | IHP GmbH - Innovations for High Performance Microelectronics/Institut für innovative Mikroelektronik | Herstellungsverfahren für ein Halbleiterbauelement mit Praseodymoxid-Dielektrikum |
JP4826971B2 (ja) * | 2009-04-15 | 2011-11-30 | 日本電気株式会社 | 高誘電率薄膜を用いた半導体装置の製造方法 |
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US5482003A (en) | 1991-04-10 | 1996-01-09 | Martin Marietta Energy Systems, Inc. | Process for depositing epitaxial alkaline earth oxide onto a substrate and structures prepared with the process |
US5225031A (en) | 1991-04-10 | 1993-07-06 | Martin Marietta Energy Systems, Inc. | Process for depositing an oxide epitaxially onto a silicon substrate and structures prepared with the process |
DE4120258A1 (de) | 1991-06-19 | 1992-12-24 | Siemens Ag | Verfahren zur herstellung einer schicht aus einem hochtemperatursupraleiter-material auf einem silizium-substrat |
DE69325614T2 (de) | 1992-05-01 | 2000-01-13 | Texas Instruments Inc | Pb/Bi enthaltende Oxide von hohen Dielektrizitätskonstanten unter Verwendung von Perovskiten als Pufferschicht, die keine Pb/Bi enthalten |
US5514484A (en) | 1992-11-05 | 1996-05-07 | Fuji Xerox Co., Ltd. | Oriented ferroelectric thin film |
US5450812A (en) | 1993-07-30 | 1995-09-19 | Martin Marietta Energy Systems, Inc. | Process for growing a film epitaxially upon an oxide surface and structures formed with the process |
JP3095944B2 (ja) * | 1994-06-21 | 2000-10-10 | シャープ株式会社 | 酸化物結晶薄膜の製造方法及び薄膜素子 |
TW410272B (en) * | 1996-05-07 | 2000-11-01 | Thermoscan Lnc | Enhanced protective lens cover |
JPH09315897A (ja) | 1996-05-31 | 1997-12-09 | Sumitomo Electric Ind Ltd | 水晶型結晶構造を有する単結晶酸化物薄膜および製造法 |
US5830270A (en) | 1996-08-05 | 1998-11-03 | Lockheed Martin Energy Systems, Inc. | CaTiO3 Interfacial template structure on semiconductor-based material and the growth of electroceramic thin-films in the perovskite class |
US6023082A (en) * | 1996-08-05 | 2000-02-08 | Lockheed Martin Energy Research Corporation | Strain-based control of crystal anisotropy for perovskite oxides on semiconductor-based material |
US5767543A (en) | 1996-09-16 | 1998-06-16 | Motorola, Inc. | Ferroelectric semiconductor device having a layered ferroelectric structure |
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1999
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2000
- 2000-03-10 JP JP2000066646A patent/JP2000294554A/ja active Pending
- 2000-03-14 KR KR1020000012773A patent/KR20000076851A/ko not_active Application Discontinuation
- 2000-03-21 EP EP00106104A patent/EP1043426A1/en not_active Withdrawn
- 2000-03-28 TW TW089105137A patent/TW454246B/zh not_active IP Right Cessation
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2001
- 2001-06-04 US US09/871,958 patent/US20010023660A1/en not_active Abandoned
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JP2000294554A (ja) | 2000-10-20 |
US6241821B1 (en) | 2001-06-05 |
KR20000076851A (ko) | 2000-12-26 |
US20010023660A1 (en) | 2001-09-27 |
EP1043426A1 (en) | 2000-10-11 |
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