TW432708B - Method for enhancing the alignment accuracy of semiconductor devices - Google Patents

Method for enhancing the alignment accuracy of semiconductor devices Download PDF

Info

Publication number
TW432708B
TW432708B TW088107163A TW88107163A TW432708B TW 432708 B TW432708 B TW 432708B TW 088107163 A TW088107163 A TW 088107163A TW 88107163 A TW88107163 A TW 88107163A TW 432708 B TW432708 B TW 432708B
Authority
TW
Taiwan
Prior art keywords
epitaxial layer
semiconductor
wafer alignment
alignment mark
selectively
Prior art date
Application number
TW088107163A
Other languages
English (en)
Chinese (zh)
Inventor
Kouichi Harada
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Application granted granted Critical
Publication of TW432708B publication Critical patent/TW432708B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54453—Marks applied to semiconductor devices or parts for use prior to dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Solid State Image Pick-Up Elements (AREA)
TW088107163A 1998-05-11 1999-05-03 Method for enhancing the alignment accuracy of semiconductor devices TW432708B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10126945A JPH11329923A (ja) 1998-05-11 1998-05-11 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
TW432708B true TW432708B (en) 2001-05-01

Family

ID=14947792

Family Applications (1)

Application Number Title Priority Date Filing Date
TW088107163A TW432708B (en) 1998-05-11 1999-05-03 Method for enhancing the alignment accuracy of semiconductor devices

Country Status (5)

Country Link
US (1) US6358814B1 (enExample)
EP (1) EP0961320A3 (enExample)
JP (1) JPH11329923A (enExample)
KR (1) KR100610717B1 (enExample)
TW (1) TW432708B (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11329002B2 (en) 2017-08-21 2022-05-10 Sony Semiconductor Solutions Corporation Semiconductor device and fabrication method for semiconductor device

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6531374B2 (en) * 2001-08-10 2003-03-11 Taiwan Semiconductor Manufacturing Co., Ltd Overlay shift correction for the deposition of epitaxial silicon layer and post-epitaxial silicon layers in a semiconductor device
FR2869459B1 (fr) 2004-04-21 2006-08-04 Commissariat Energie Atomique Realignement entre niveaux apres une etape d'epitaxie.
CN113109997B (zh) * 2021-03-18 2022-08-26 上海信及光子集成技术有限公司 测量外延前后光刻套刻误差的方法及结构

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4632724A (en) * 1985-08-19 1986-12-30 International Business Machines Corporation Visibility enhancement of first order alignment marks
US4936930A (en) * 1988-01-06 1990-06-26 Siliconix Incorporated Method for improved alignment for semiconductor devices with buried layers
JPH0291690A (ja) * 1988-09-28 1990-03-30 Toshiba Corp 拡大縮小表示方式
JPH0478123A (ja) * 1990-07-20 1992-03-12 Fujitsu Ltd 半導体装置の製造方法
US5300797A (en) * 1992-03-31 1994-04-05 Sgs-Thomson Microelectronics, Inc. Coplanar twin-well integrated circuit structure
JPH05343319A (ja) * 1992-06-09 1993-12-24 Sumitomo Electric Ind Ltd 半導体装置の製造方法
JPH07130603A (ja) * 1993-06-24 1995-05-19 Hitachi Ltd 半導体装置の製造方法
KR0170909B1 (ko) * 1995-09-27 1999-03-30 김주용 반도체 소자의 오버레이 검사방법
JPH09181189A (ja) * 1995-12-25 1997-07-11 Toshiba Corp 半導体装置の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11329002B2 (en) 2017-08-21 2022-05-10 Sony Semiconductor Solutions Corporation Semiconductor device and fabrication method for semiconductor device

Also Published As

Publication number Publication date
US6358814B1 (en) 2002-03-19
EP0961320A3 (en) 2001-01-17
EP0961320A2 (en) 1999-12-01
KR19990088170A (ko) 1999-12-27
JPH11329923A (ja) 1999-11-30
KR100610717B1 (ko) 2006-08-09

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Legal Events

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GD4A Issue of patent certificate for granted invention patent
MM4A Annulment or lapse of patent due to non-payment of fees