TW432486B - Method of improving surface morphology and reducing resistivity of chemical vapor deposition-metal films - Google Patents
Method of improving surface morphology and reducing resistivity of chemical vapor deposition-metal films Download PDFInfo
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
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- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/50—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
- C23C16/505—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges
- C23C16/509—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges using internal electrodes
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/06—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material
- C23C16/18—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material from metallo-organic compounds
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/02—Pretreatment of the material to be coated
- C23C16/0227—Pretreatment of the material to be coated by cleaning or etching
- C23C16/0245—Pretreatment of the material to be coated by cleaning or etching by etching with a plasma
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/06—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material
- C23C16/08—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material from metal halides
- C23C16/14—Deposition of only one other metal element
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
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- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
4324 86 - 苤號 87116727 五、發明說明(I) 發明範圍 本發明係關於在半導體基材上金屬薄膜之 (cvd),特別是在基材表面上產生一具有相 ’及低; 阻率之金屬薄膜。 田千t及低電 發明背景 在積體電路(I◦的製造,包括金屬與似金 臈通常沉積於半導體基材表面,以提供路的_ 裝J間之導通與歐姆接點。例如,所需金= = 於半導體基材上的接點或導通孔之外露 、,’ 材之絕緣層的薄膜提供導通材料 =’此一穿越基 接之用。 刊竹之接頭u做為絕緣層間連 一已知的金屬沉積製程為化學,蒸氣沉積(cv :二利:-许多不同的沉積氣體或反應物氣體間之化與反應 常接近基材,而後L在:室;!引^ 種應副產物沉積於暴露的基材表面:j 面==氣=於的金屬薄膜具有平坦、似鏡 面型態會變得袓糙、霧;時,薄膜的表 流動電子所施Z的子會由於在高電流密度下的 的-端形成空洞型態1而2曰:5界移·,因此金屬線 空洞區域的電路故ϋ機率增加㈣冑壓型態’而使得在 钔'專臈'儿積時’除了為能獲得平坦的表面型態,對於半 O:\55\55253.ptc 2000.07.13. 005 案號.871167g_7 432486 月 曰 、發明說明(2) 導體基材之商業化生產而言 1.68//〇111115-(:111之電阻率,〜-电限平值砀现荆贫屬之電 阻率,電阻率高於約2 " ohms-cm的銅薄膜因其他具類似高 屬可取代銅而不且制:生Α Μ > # ϋ U …β 五 薄臈需且有接近整體電阻率 電阻.率值為純銅金屬之電 此 阻率,電阻率尚於洶Ζ " ohms-cm的銅薄膜因其他具類似高 電阻率之金屬可取代銅而不具製造技術之可行性。影經薄 膜電阻率的因素包括臈厚、密度、純度以及晶粒大小〔 因此,本發明提供製造塗布有具平坦表面型態與低電阻 率的金屬厚膜之基材的方法。 — 發明概述 :據本發明之原自,本發明的目的之一為提供基材表面 上有一具有相當平坦表面型態之金屬薄膜。 本發明之目的之二為提供美好本 之金屬薄膜。 心供基材表面上有-具有低電阻率 本發明的另一目的為提供基材表面上有一 表面型態及低電阻率之銅薄膜β 有相虽平坦 本發明尚有一目的為接供其^ ^ 約7 5 0埃且具有相當平 ’、土 一塗布厚度超過 oh一m之銅;臈:+…型癌以及電阻率小於約“ 是本發明針對於基材表面上沉 低電阻率之金屬薄獏的方*,本發Π:表面 材表面上沉積具有塗 月更疋針對於基 型態以及電阻率較約75。孕埃度以超下過: 方法。 埃以下之銅溽膜為佳的鋼薄膜之 根據本發明$ jg 暴露於電喂中舍止,本發明提供一方法,此方法為其从 电漿中。百先以化學菽乾乃忐為基材 '、轧積將金屬薄膜沉積於基
O:\55\55253.ptc 第6頁 200Γ) Ϊ9. 8.以修正 4324 Ββ 年 月 _ 案號 87116727 五、發明說明(3) 於電漿中,第二層金屬薄膜 已沉積薄膜層,接著又此基 沉積薄膜層的添加與電敷暴 較佳具體實施例中,電漿為 使用本發明之方法沉積的 電阻率且有相當平坦表面型 材表面,再將已塗布基材暴露 繼續沉積於基材表面上的先前 材暴露於電漿_,循環地進行 露,直到獲得所需的厚度。在 氫/氬電漿,而薄膜為銅薄膜 銅薄膜所具有接近純銅金屬之 態。 由於上述的優點,本發明提供可以化學蒸氣沉積於基材 表面上沉積具有相當平坦表面型態與低電阻率之金屬厚膜 的方法,本發明的其他目的與優點可經由後續的參考圖例 與說明而變為顯而易見。 圖例說明 圖1為承載器與基材之圖解。 圖2為銅CVD用反應室之剖面圖。
圖 號簡 要 說 明 20 代 表 承 載 器 22 代 表 半 導 體 基 材 24 代 表 原 生 氧 化 層 30 代 表 原 生 氧 化 層 34 代 表 矽 層 45 代 表 反 應 器 46 代 表 反 應 室 48 代 表 處 理 空 間 5 0 代 表 平 面 喷 頭 5 1 代 表 電 漿 生 產 裝置 O:\55\55253.ptc 第7頁 2000. 08. 25.007 乎; 4 3 24· 8 6案號87116727_年月日 L.,齡8❿補尤._ 五、發明說明(4) 5 2 代表射頻產生器 發明詳述 參照圖1,表示銅CVD時之半導體基材22使用之承載器 2 〇,典型的承载器2 0在其頂端2 6 a與侧邊2 6 b均有原生氧化 層2 4,基材2 2以承載器2 0支持著以進行處理,基材2 2之上 表面2 8有厚度為約1 0埃至約2 0埃的原生氧化層3 0,頂層3 0 位於厚度為約500埃之TiN層32的上方,而TiN層32塗布於 矽層3 4之上。 參照圖2,說明以化學蒸氣沉積將銅沉積於半導體基材 22的表面28之反應器45,反應器45包含包圍住處理空間48 之反應室46,如圖所示,反應室46之中,内部含有置於承 載器20上的基材22,CVD所需之反應氣體導入至處理空間
O:\55\55253.ptc 第7a頁 2000.08. 24. 008 4 324 8#l 87116727 年 月 a 89. 7:ΤΓΤ^ μ 五、發明4明(4) 4 8,氣體傳送系統如本發明所併入參考之美國專利第 5’ 628, 829號,'’化學蒸氣沉積(CVD)與電漿強化化學蒸氣 /儿積(PECVD)薄膜之低溫沉積的方法與裝置η的内容,該專 利提供製程所需之適當的氣流與分佈,通常氣體傳送系統 包含氣體分散元件,如反應室46内之平面喷頭50,喷頭50 分散入料反應氣體至反應室4 6之處理空間4 8,以確保均一 的分佈與氣體能接近承載器2 〇及基材2 2之氣流,均一的氣 體分佈與氣流對於均一且有效率的沉積,較密的電漿,及 均一的沉積薄膜乃是必需的。 對銅溥膜沉積而言,鋼先驅物—銅(一價)六氟乙醯酮三 乙石夕烧((:111(1^&(:)(1;11^5))的兩個分子依下列不對稱反應 式發生反應,產生銅金屬: 2CuI(hfac)(tmvs) -> Cu° + Cun (hf ac)2 + 2 ( tmvs ) tmvs於先驅物蒸發時穩定先驅物,而hfac則在基材表面活 化先驅物達到較高的金屬化速率,反應室4 6的典型條件 為:基材為約1 7 0 t: ’反應壓力為約〇 5托至約2. 0托,先 驅物流速為約0. 2毫升/分鐘至約1, 〇毫升/分鐘之液體(相 當於約16-80 seem的蒸氣),以及稀釋液流速為約1〇〇 seem β 根據本發明之具體實施例之一,反應室4 6配置有用以先 將承载器20暴露於氫/氬電漿,再放置待處理基材22之電 滎生產裝置51。用以將承載器20暴露於氫/氬電漿之生產 裝置5 1 ’如本發明所併入參考之美國專利申請公告第 08/797,397號”氮化鈦基材表面上沉積鶴之化學蒸氣沉積
O:\55\55253.ptc 第8頁 2000.07. 13. 008 432486 五、發明說明(5) 方法"所述,裝置51較佳為包含連接於喷頭50之射頻(RF) 產生器52,可產生450 KHz。 在本發明之方法中,基材22以承載器20支持,於反應室 46内暴露於氫/氬電漿之中,反應室46的條件為:反應室 壓力為約1托;功率為約750 W ;頻率為約450 KHz ;氫氣 流速為約2 0 0 seem ;氬氣流速為約5 〇 sccm ;時間為約工0 秒;以及基材為約1 7 0 °C。 “Coppei^ChfacOCtmvs)以化學蒸氣沉積於基材22沉積一 薄層’以形成銅薄層,在較最佳具體實施例中,銅膜厚度 f近500埃,反應室46的條件為:基材溫度&17(rc ;反應 室壓力為約0,5-2.0托;先驅物流速為on 〇毫升/分 鐘’以及稀釋液流速為約1〇〇 sccm。 β接著將基材22暴露於與上述電漿暴露之相同條件下的氫 /二電生裝之V第,層鋼層再於與上述鋼沉積之相同反應 ^ ’’n下/儿積於第~層之上,較佳的第二層銅薄膜厚度 Γ:銅薄膜露與麵沉積之添加猶環可製作出所需厚 本發明以具體實施例的描述來說明 施例相當詳細,但不意味 的 承載器2。可先以金屬預d二疋顯而易見的’例如, 明所併人參考之中請專=除22的邊緣效應如本發 邊緣效應,,。 中之〉肖除金屬化學蒸氣沉積之 本發明以其廣泛的觀點 不受.特殊細節、代表性裝置及
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C:\Program Files\Patent\55253.ptd 第丨0頁
Claims (1)
- f。年ί -4^2-4-8^6&修正 案號 87116727 年 月 修正 ‘六…:-夺备春-士}範圍 1 · 一種以化學蒸氣沉積於半導體基材表面上沉積金屬薄 膜之方法,包括下列步驟: (a) 將基材暴露-於電漿中; (b) 沉積第一層金屬薄膜於基材之至少一個表面上; (c) 將已於其上沉積薄膜之基材暴露於電漿中;及 (d) 沉積第二層金屬薄膜於基材表面之第一層金屬薄 膜之上。 進一步包括重複步驟 其中暴露步驟(a )與 而沉積步驟(b)與(d)包 進一步包重複步驟(c) 沉積步驟係發生於壓 2 .如申請專利範圍第1項之方法 (c )與(d )以達到所要之膜厚。 3. 如申請專利範圍第1項之方法 (c)包括將基材暴露至氫/氬電類:, 括沉積銅薄膜。 4. 如申請專利範圍第3項之方法 與(d )以達到所要之膜厚。 5 .如申請專利範圍第3項之方法 力範圍為0 . 1 - 1 0托,且較佳範圍為0 . 5至2 . 0托下之反應室 内。. 6. 如申請專利範圍第3項之方法,沉積步驟係發生於先. 驅物流量範圍為0 . 0 1毫升/分鐘至5毫升/公分,且較佳為 0. 2毫升/分鐘至1 . 0毫升/分鐘之反應室内。 7. 如申請專利範圍第3項之方法,沉積步驟係發生於氫 氣流量範圍為10-1500 seem,且較佳為100 seem之反應室 内。 8 ·如申請專利範圍第3項之方法,沉積步驟係發生於承O:\55\55253.ptc 第1頁 2001.01. 16.013 432486 _案號 87116727_年月 曰. 修正_ 六、申請專利範圍 載器溫度範圍為1 2 0 - 2 8 0 °C ,且較佳為1 7 0 t:之反應室内。 9 .如申請專利範圍第3項之方法,暴露步驟係發生於壓 力為0 · 1 - 2 5托,較佳為1托下之反應室内。 1 0,如申請專利範圍第3項之方法,暴露步驟係發生於功 率範圍為50-1500 W,且較佳為750 W之反應室内。 1 1 .如申請專利範圍第3項之方法,曝露步驟係發生於頻 率範圍為250-500 KHz,且較佳為450 KHz之反應室内。 1 2.如申請專利範圍第3項之方法,暴露步驟係發生於氫 氣流量範圍為50-5000 seem,且較佳為200 seem之反應室 内。 1 3.如申請專利範圍第3項之方法,暴露步驟係發生於氬_( 氣流量範圍為10-1500 seem,且較佳為50 seem之反應室 内。 1 4.如申請專利範圍第3項之方法,暴露步驟係發生於承 載器溫度範圍為1 2 0 - 2 8 0 °C ,且較佳為1 7 0 °C之反應室内。 1 5 .如申請專利範圍第3項之方法,暴露步驟係發生於時 間範圍為2 - 2 4 0秒,且較佳為1 0秒之反應室内。 16. —種半導體基材上製造CVD-銅薄膜之方法,包括下 列步驟: (a) 將以承載器支持之基材暴露於氫/氬電漿; (b) 沉積第一層銅薄膜於基材之盖少一個表面上; (c) 將已於其上沉積薄膜之基材暴露於電漿;及 (d) 沉積厚度為300埃之第二層銅薄膜於基材表面的第 一層金屬薄膜之上。O:\55\55253.ptc 第2頁 2001.01. 16.014O:\55\55253.ptc 第3頁 2001. 01. 16.015
Applications Claiming Priority (1)
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US08/948,955 US6121140A (en) | 1997-10-09 | 1997-10-09 | Method of improving surface morphology and reducing resistivity of chemical vapor deposition-metal films |
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TW087116727A TW432486B (en) | 1997-10-09 | 1998-10-12 | Method of improving surface morphology and reducing resistivity of chemical vapor deposition-metal films |
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US (1) | US6121140A (zh) |
EP (1) | EP1021589B1 (zh) |
JP (1) | JP4079591B2 (zh) |
KR (1) | KR100624351B1 (zh) |
AU (1) | AU9789498A (zh) |
DE (1) | DE69801231T2 (zh) |
TW (1) | TW432486B (zh) |
WO (1) | WO1999019532A1 (zh) |
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US6440494B1 (en) * | 2000-04-05 | 2002-08-27 | Tokyo Electron Limited | In-situ source synthesis for metal CVD |
KR100383759B1 (ko) * | 2000-06-15 | 2003-05-14 | 주식회사 하이닉스반도체 | 반도체 소자의 구리 금속 배선 형성 방법 |
KR100539274B1 (ko) * | 2003-07-15 | 2005-12-27 | 삼성전자주식회사 | 코발트 막 증착 방법 |
KR101236211B1 (ko) | 2008-08-27 | 2013-02-25 | 소이텍 | 선택되거나 제어된 격자 파라미터들을 갖는 반도체 물질층들을 이용하여 반도체 구조물들 또는 소자들을 제조하는 방법 |
EP2502266B1 (en) | 2009-11-18 | 2020-03-04 | Soitec | Methods of fabricating semiconductor structures and devices using glass bonding layers, and semiconductor structures and devices formed by such methods |
US8133806B1 (en) | 2010-09-30 | 2012-03-13 | S.O.I.Tec Silicon On Insulator Technologies | Systems and methods for forming semiconductor materials by atomic layer deposition |
US8486192B2 (en) | 2010-09-30 | 2013-07-16 | Soitec | Thermalizing gas injectors for generating increased precursor gas, material deposition systems including such injectors, and related methods |
FR2968830B1 (fr) | 2010-12-08 | 2014-03-21 | Soitec Silicon On Insulator | Couches matricielles ameliorees pour le depot heteroepitaxial de materiaux semiconducteurs de nitrure iii en utilisant des procedes hvpe |
FR2968678B1 (fr) | 2010-12-08 | 2015-11-20 | Soitec Silicon On Insulator | Procédés pour former des matériaux a base de nitrure du groupe iii et structures formées par ces procédés |
US9023721B2 (en) | 2010-11-23 | 2015-05-05 | Soitec | Methods of forming bulk III-nitride materials on metal-nitride growth template layers, and structures formed by such methods |
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US4751101A (en) * | 1987-04-30 | 1988-06-14 | International Business Machines Corporation | Low stress tungsten films by silicon reduction of WF6 |
US5628829A (en) * | 1994-06-03 | 1997-05-13 | Materials Research Corporation | Method and apparatus for low temperature deposition of CVD and PECVD films |
US5576071A (en) * | 1994-11-08 | 1996-11-19 | Micron Technology, Inc. | Method of reducing carbon incorporation into films produced by chemical vapor deposition involving organic precursor compounds |
US5773363A (en) * | 1994-11-08 | 1998-06-30 | Micron Technology, Inc. | Semiconductor processing method of making electrical contact to a node |
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1997
- 1997-10-09 US US08/948,955 patent/US6121140A/en not_active Expired - Lifetime
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1998
- 1998-10-07 KR KR1020007003774A patent/KR100624351B1/ko not_active IP Right Cessation
- 1998-10-07 WO PCT/US1998/021113 patent/WO1999019532A1/en active IP Right Grant
- 1998-10-07 DE DE69801231T patent/DE69801231T2/de not_active Expired - Lifetime
- 1998-10-07 JP JP2000516079A patent/JP4079591B2/ja not_active Expired - Fee Related
- 1998-10-07 AU AU97894/98A patent/AU9789498A/en not_active Abandoned
- 1998-10-07 EP EP98952123A patent/EP1021589B1/en not_active Expired - Lifetime
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DE69801231D1 (de) | 2001-08-30 |
WO1999019532A1 (en) | 1999-04-22 |
KR100624351B1 (ko) | 2006-09-18 |
AU9789498A (en) | 1999-05-03 |
DE69801231T2 (de) | 2001-11-08 |
JP2001520314A (ja) | 2001-10-30 |
JP4079591B2 (ja) | 2008-04-23 |
KR20010030989A (ko) | 2001-04-16 |
EP1021589A1 (en) | 2000-07-26 |
US6121140A (en) | 2000-09-19 |
EP1021589B1 (en) | 2001-07-25 |
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