TW429527B - Plug fabricating method - Google Patents
Plug fabricating methodInfo
- Publication number
- TW429527B TW429527B TW088113484A TW88113484A TW429527B TW 429527 B TW429527 B TW 429527B TW 088113484 A TW088113484 A TW 088113484A TW 88113484 A TW88113484 A TW 88113484A TW 429527 B TW429527 B TW 429527B
- Authority
- TW
- Taiwan
- Prior art keywords
- plug
- film
- inter
- insulating film
- layer
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 3
- 239000010410 layer Substances 0.000 abstract 3
- 229910020323 ClF3 Inorganic materials 0.000 abstract 2
- 101100441092 Danio rerio crlf3 gene Proteins 0.000 abstract 2
- 230000008021 deposition Effects 0.000 abstract 2
- 238000005530 etching Methods 0.000 abstract 2
- 239000011229 interlayer Substances 0.000 abstract 2
- 230000001603 reducing effect Effects 0.000 abstract 2
- JOHWNGGYGAVMGU-UHFFFAOYSA-N trifluorochlorine Chemical compound FCl(F)F JOHWNGGYGAVMGU-UHFFFAOYSA-N 0.000 abstract 2
- 230000001747 exhibiting effect Effects 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/32115—Planarisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
Landscapes
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Chemical & Material Sciences (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
- Drying Of Semiconductors (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10225794A JP2000058643A (ja) | 1998-08-10 | 1998-08-10 | プラグの形成方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW429527B true TW429527B (en) | 2001-04-11 |
Family
ID=16834893
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW088113484A TW429527B (en) | 1998-08-10 | 1999-08-06 | Plug fabricating method |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US6329285B1 (zh) |
| JP (1) | JP2000058643A (zh) |
| KR (1) | KR20000017211A (zh) |
| TW (1) | TW429527B (zh) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4570204B2 (ja) | 2000-05-31 | 2010-10-27 | Ｏｋｉセミコンダクタ株式会社 | 半導体装置の製造方法 |
| JP3643807B2 (ja) * | 2001-11-14 | 2005-04-27 | 三菱重工業株式会社 | エッチング方法及びエッチング装置 |
| KR100538097B1 (ko) * | 2003-04-24 | 2005-12-21 | 삼성전자주식회사 | 금속막 제조 방법 및 이를 이용한 반도체 장치의 제조 방법 |
| JP2007227698A (ja) * | 2006-02-24 | 2007-09-06 | Renesas Technology Corp | 半導体装置の製造方法 |
| US8207026B2 (en) * | 2009-01-28 | 2012-06-26 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of thin film transistor and manufacturing method of display device |
| GB2495256B (en) | 2010-06-25 | 2014-07-23 | Anastasios J Tousimis | Integrated processing and critical point drying systems for semiconductor and mems devices |
| JP5829926B2 (ja) * | 2011-07-06 | 2015-12-09 | 東京エレクトロン株式会社 | タングステン膜の成膜方法 |
| KR101256797B1 (ko) | 2012-01-20 | 2013-04-22 | 주식회사 테스 | 반도체소자 제조방법 |
| JP6823533B2 (ja) * | 2017-04-24 | 2021-02-03 | 東京エレクトロン株式会社 | チタンシリサイド領域を形成する方法 |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0414372A3 (en) * | 1989-07-21 | 1991-04-24 | Sony Corporation | Dry etching methods |
| JPH05243218A (ja) * | 1992-02-28 | 1993-09-21 | Nec Corp | 半導体装置の製造方法 |
-
1998
- 1998-08-10 JP JP10225794A patent/JP2000058643A/ja active Pending
-
1999
- 1999-08-06 TW TW088113484A patent/TW429527B/zh not_active IP Right Cessation
- 1999-08-10 KR KR1019990032708A patent/KR20000017211A/ko not_active Application Discontinuation
- 1999-08-10 US US09/371,386 patent/US6329285B1/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2000058643A (ja) | 2000-02-25 |
| US6329285B1 (en) | 2001-12-11 |
| KR20000017211A (ko) | 2000-03-25 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GD4A | Issue of patent certificate for granted invention patent | ||
| MM4A | Annulment or lapse of patent due to non-payment of fees |