TW418420B - Routing topology for identical connector point layouts on primary and secondary sides of a substrate - Google Patents

Routing topology for identical connector point layouts on primary and secondary sides of a substrate Download PDF

Info

Publication number
TW418420B
TW418420B TW088102277A TW88102277A TW418420B TW 418420 B TW418420 B TW 418420B TW 088102277 A TW088102277 A TW 088102277A TW 88102277 A TW88102277 A TW 88102277A TW 418420 B TW418420 B TW 418420B
Authority
TW
Taiwan
Prior art keywords
connection point
connection points
patent application
scope
layout
Prior art date
Application number
TW088102277A
Other languages
English (en)
Chinese (zh)
Inventor
Dawson L Yee
Earl Roger Noar
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of TW418420B publication Critical patent/TW418420B/zh

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10159—Memory
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10507—Involving several components
    • H05K2201/10545—Related components mounted on both sides of the PCB

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Combinations Of Printed Boards (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
TW088102277A 1998-02-13 1999-04-03 Routing topology for identical connector point layouts on primary and secondary sides of a substrate TW418420B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/023,388 US6118669A (en) 1998-02-13 1998-02-13 Routing topology for identical connector point layouts on primary and secondary sides of a substrate

Publications (1)

Publication Number Publication Date
TW418420B true TW418420B (en) 2001-01-11

Family

ID=21814799

Family Applications (1)

Application Number Title Priority Date Filing Date
TW088102277A TW418420B (en) 1998-02-13 1999-04-03 Routing topology for identical connector point layouts on primary and secondary sides of a substrate

Country Status (6)

Country Link
US (1) US6118669A (enExample)
JP (1) JP4344088B2 (enExample)
KR (1) KR100347444B1 (enExample)
AU (1) AU2342199A (enExample)
TW (1) TW418420B (enExample)
WO (1) WO1999041770A2 (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6347041B1 (en) * 2000-01-21 2002-02-12 Dell Usa, L.P. Incremental phase correcting mechanisms for differential signals to decrease electromagnetic emissions
CN1211723C (zh) * 2000-04-04 2005-07-20 胜开科技股份有限公司 计算机卡制作方法
US6875930B2 (en) * 2002-04-18 2005-04-05 Hewlett-Packard Development Company, L.P. Optimized conductor routing for multiple components on a printed circuit board

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0249463A (ja) * 1988-05-27 1990-02-19 Matsushita Electron Corp 半導体装置
JP2793378B2 (ja) * 1991-03-28 1998-09-03 株式会社東芝 セミカスタム半導体集積回路マクロセル設計法
US5604710A (en) * 1994-05-20 1997-02-18 Mitsubishi Denki Kabushiki Kaisha Arrangement of power supply and data input/output pads in semiconductor memory device
US5841686A (en) * 1996-11-22 1998-11-24 Ma Laboratories, Inc. Dual-bank memory module with shared capacitors and R-C elements integrated into the module substrate
US5831890A (en) * 1996-12-16 1998-11-03 Sun Microsystems, Inc. Single in-line memory module having on-board regulation circuits

Also Published As

Publication number Publication date
US6118669A (en) 2000-09-12
JP4344088B2 (ja) 2009-10-14
AU2342199A (en) 1999-08-30
WO1999041770A2 (en) 1999-08-19
KR100347444B1 (ko) 2002-08-03
JP2002517080A (ja) 2002-06-11
WO1999041770A3 (en) 1999-09-23
KR20010096460A (ko) 2001-11-07

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Legal Events

Date Code Title Description
GD4A Issue of patent certificate for granted invention patent
MM4A Annulment or lapse of patent due to non-payment of fees