TW399240B - Self-aligned contacts for semiconductor device - Google Patents

Self-aligned contacts for semiconductor device Download PDF

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Publication number
TW399240B
TW399240B TW087120754A TW87120754A TW399240B TW 399240 B TW399240 B TW 399240B TW 087120754 A TW087120754 A TW 087120754A TW 87120754 A TW87120754 A TW 87120754A TW 399240 B TW399240 B TW 399240B
Authority
TW
Taiwan
Prior art keywords
etching
patent application
item
scope
substrate
Prior art date
Application number
TW087120754A
Other languages
English (en)
Chinese (zh)
Inventor
Janet M Flanner
Linda N Marquez
Joel M Cook
Ian J Morey
Original Assignee
Lam Res Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lam Res Corp filed Critical Lam Res Corp
Application granted granted Critical
Publication of TW399240B publication Critical patent/TW399240B/zh

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
TW087120754A 1997-12-29 1998-12-14 Self-aligned contacts for semiconductor device TW399240B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/998,954 US6165910A (en) 1997-12-29 1997-12-29 Self-aligned contacts for semiconductor device

Publications (1)

Publication Number Publication Date
TW399240B true TW399240B (en) 2000-07-21

Family

ID=25545701

Family Applications (1)

Application Number Title Priority Date Filing Date
TW087120754A TW399240B (en) 1997-12-29 1998-12-14 Self-aligned contacts for semiconductor device

Country Status (7)

Country Link
US (1) US6165910A (enExample)
EP (1) EP1042797A1 (enExample)
JP (1) JP4638030B2 (enExample)
KR (1) KR100595866B1 (enExample)
IL (1) IL137016A (enExample)
TW (1) TW399240B (enExample)
WO (1) WO1999034426A1 (enExample)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6638843B1 (en) * 2000-03-23 2003-10-28 Micron Technology, Inc. Method for forming a silicide gate stack for use in a self-aligned contact etch
US6716302B2 (en) 2000-11-01 2004-04-06 Applied Materials Inc. Dielectric etch chamber with expanded process window
US6403491B1 (en) * 2000-11-01 2002-06-11 Applied Materials, Inc. Etch method using a dielectric etch chamber with expanded process window
US6452033B1 (en) * 2002-02-11 2002-09-17 Dow Corning Corporation Method of making N-[2-aminoethyl] aminoalkylalkoxysilanes with ethyenediamine salt recycle
KR100576463B1 (ko) * 2003-12-24 2006-05-08 주식회사 하이닉스반도체 반도체소자의 콘택 형성방법
US7164095B2 (en) * 2004-07-07 2007-01-16 Noritsu Koki Co., Ltd. Microwave plasma nozzle with enhanced plume stability and heating efficiency
US7806077B2 (en) 2004-07-30 2010-10-05 Amarante Technologies, Inc. Plasma nozzle array for providing uniform scalable microwave plasma generation
US20060021980A1 (en) * 2004-07-30 2006-02-02 Lee Sang H System and method for controlling a power distribution within a microwave cavity
US7189939B2 (en) * 2004-09-01 2007-03-13 Noritsu Koki Co., Ltd. Portable microwave plasma discharge unit
US7271363B2 (en) * 2004-09-01 2007-09-18 Noritsu Koki Co., Ltd. Portable microwave plasma systems including a supply line for gas and microwaves
US20060052883A1 (en) * 2004-09-08 2006-03-09 Lee Sang H System and method for optimizing data acquisition of plasma using a feedback control module
US7456097B1 (en) * 2004-11-30 2008-11-25 National Semiconductor Corporation System and method for faceting via top corners to improve metal fill
US7740736B2 (en) * 2006-06-08 2010-06-22 Lam Research Corporation Methods and apparatus for preventing plasma un-confinement events in a plasma processing chamber
JP6521848B2 (ja) * 2015-01-16 2019-05-29 東京エレクトロン株式会社 エッチング方法
JP6550278B2 (ja) * 2015-06-24 2019-07-24 東京エレクトロン株式会社 エッチング方法
US10217707B2 (en) * 2016-09-16 2019-02-26 International Business Machines Corporation Trench contact resistance reduction

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1168762A (en) * 1981-06-22 1984-06-05 Osamu Michikami Method of fabrication for josephson tunnel junction
KR0129663B1 (ko) * 1988-01-20 1998-04-06 고다까 토시오 에칭 장치 및 방법
US4987099A (en) * 1989-12-29 1991-01-22 North American Philips Corp. Method for selectively filling contacts or vias or various depths with CVD tungsten
US4980304A (en) * 1990-02-20 1990-12-25 At&T Bell Laboratories Process for fabricating a bipolar transistor with a self-aligned contact
JPH0590221A (ja) * 1991-02-20 1993-04-09 Canon Inc 珪素化合物膜のエツチング方法及び該方法を利用した物品の形成方法
KR100297358B1 (ko) * 1991-07-23 2001-11-30 히가시 데쓰로 플라즈마에칭장치
US5286344A (en) * 1992-06-15 1994-02-15 Micron Technology, Inc. Process for selectively etching a layer of silicon dioxide on an underlying stop layer of silicon nitride
US5286667A (en) * 1992-08-11 1994-02-15 Taiwan Semiconductor Manufacturing Company Modified and robust self-aligning contact process
TW273067B (enExample) * 1993-10-04 1996-03-21 Tokyo Electron Co Ltd
US5798016A (en) * 1994-03-08 1998-08-25 International Business Machines Corporation Apparatus for hot wall reactive ion etching using a dielectric or metallic liner with temperature control to achieve process stability
JPH0817796A (ja) * 1994-06-28 1996-01-19 Hitachi Ltd ドライエッチング装置とその方法および半導体装置
US5643394A (en) * 1994-09-16 1997-07-01 Applied Materials, Inc. Gas injection slit nozzle for a plasma process reactor
DE4444325C2 (de) 1994-12-13 1998-04-30 Gogas Goch Gmbh & Co Heizstrahler
JP3215320B2 (ja) * 1996-03-22 2001-10-02 株式会社東芝 半導体装置の製造方法
US5783496A (en) * 1996-03-29 1998-07-21 Lam Research Corporation Methods and apparatus for etching self-aligned contacts
US5843847A (en) * 1996-04-29 1998-12-01 Applied Materials, Inc. Method for etching dielectric layers with high selectivity and low microloading
JPH10261628A (ja) * 1996-10-24 1998-09-29 Hyundai Electron Ind Co Ltd 半導体素子のコンタクトホール製造方法
JP2988455B2 (ja) * 1997-10-15 1999-12-13 日本電気株式会社 プラズマエッチング方法

Also Published As

Publication number Publication date
KR100595866B1 (ko) 2006-07-03
IL137016A0 (en) 2001-06-14
JP4638030B2 (ja) 2011-02-23
EP1042797A1 (en) 2000-10-11
WO1999034426A1 (en) 1999-07-08
IL137016A (en) 2003-05-29
KR20010033646A (ko) 2001-04-25
US6165910A (en) 2000-12-26
JP2002500442A (ja) 2002-01-08

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