TW368786B - Universal surface finish for DCA, SMT, and PAD on pad interconnections - Google Patents
Universal surface finish for DCA, SMT, and PAD on pad interconnectionsInfo
- Publication number
- TW368786B TW368786B TW087100507A TW87100507A TW368786B TW 368786 B TW368786 B TW 368786B TW 087100507 A TW087100507 A TW 087100507A TW 87100507 A TW87100507 A TW 87100507A TW 368786 B TW368786 B TW 368786B
- Authority
- TW
- Taiwan
- Prior art keywords
- pad
- masking
- coating
- seals
- nickel
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/244—Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45147—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/4554—Coating
- H01L2224/45565—Single coating layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/4554—Coating
- H01L2224/45599—Material
- H01L2224/456—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45644—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Electroplating Methods And Accessories (AREA)
- Wire Bonding (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/873,060 US5910644A (en) | 1997-06-11 | 1997-06-11 | Universal surface finish for DCA, SMT and pad on pad interconnections |
Publications (1)
Publication Number | Publication Date |
---|---|
TW368786B true TW368786B (en) | 1999-09-01 |
Family
ID=25360910
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW087100507A TW368786B (en) | 1997-06-11 | 1998-01-15 | Universal surface finish for DCA, SMT, and PAD on pad interconnections |
Country Status (7)
Country | Link |
---|---|
US (1) | US5910644A (zh) |
EP (1) | EP0884935B1 (zh) |
KR (1) | KR100295286B1 (zh) |
DE (1) | DE69834768T2 (zh) |
MY (1) | MY115395A (zh) |
SG (1) | SG71123A1 (zh) |
TW (1) | TW368786B (zh) |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7049177B1 (en) * | 2004-01-28 | 2006-05-23 | Asat Ltd. | Leadless plastic chip carrier with standoff contacts and die attach pad |
US6307160B1 (en) * | 1998-10-29 | 2001-10-23 | Agilent Technologies, Inc. | High-strength solder interconnect for copper/electroless nickel/immersion gold metallization solder pad and method |
US8021976B2 (en) * | 2002-10-15 | 2011-09-20 | Megica Corporation | Method of wire bonding over active area of a semiconductor circuit |
CN1314225A (zh) * | 2000-02-18 | 2001-09-26 | 德克萨斯仪器股份有限公司 | 铜镀层集成电路焊点的结构和方法 |
EP1139413B1 (en) * | 2000-03-24 | 2005-03-16 | Texas Instruments Incorporated | Wire bonding process |
US6417088B1 (en) | 2000-07-24 | 2002-07-09 | Chartered Semiconductor Manufacturing Ltd. | Method of application of displacement reaction to form a conductive cap layer for flip-chip, COB, and micro metal bonding |
US6586683B2 (en) * | 2001-04-27 | 2003-07-01 | International Business Machines Corporation | Printed circuit board with mixed metallurgy pads and method of fabrication |
JP2003037215A (ja) * | 2001-07-26 | 2003-02-07 | Mitsui Mining & Smelting Co Ltd | 電子部品実装用基板及び電子部品実装用基板の製造方法 |
JP3833216B2 (ja) | 2001-09-24 | 2006-10-11 | リカ デンシ アメリカ, インコーポレイテッド | 電気的テストプローブ及びその製造方法 |
US6784544B1 (en) * | 2002-06-25 | 2004-08-31 | Micron Technology, Inc. | Semiconductor component having conductors with wire bondable metalization layers |
DE10333439A1 (de) * | 2003-07-23 | 2005-02-17 | Robert Bosch Gmbh | Verfahren zur Herstellung eines aus mehreren Verdrahtungsebenen bestehenden Hybrid-Produktes |
DE102004030800B4 (de) * | 2004-06-25 | 2017-05-18 | Epcos Ag | Verfahren zur Herstellung einer keramischen Leiterplatte |
KR100752722B1 (ko) * | 2006-07-10 | 2007-08-28 | 삼성전기주식회사 | 표면 실장용 커넥터 |
US7700476B2 (en) * | 2006-11-20 | 2010-04-20 | Intel Corporation | Solder joint reliability in microelectronic packaging |
US10251273B2 (en) * | 2008-09-08 | 2019-04-02 | Intel Corporation | Mainboard assembly including a package overlying a die directly attached to the mainboard |
US8251494B2 (en) * | 2009-11-30 | 2012-08-28 | Eastman Kodak Company | Bondable printed wiring with improved wear resistance |
US8834729B2 (en) * | 2009-11-30 | 2014-09-16 | Eastman Kodak Company | Method of making bondable printed wiring member |
US8394713B2 (en) * | 2010-02-12 | 2013-03-12 | Freescale Semiconductor, Inc. | Method of improving adhesion of bond pad over pad metallization with a neighboring passivation layer by depositing a palladium layer |
KR101125463B1 (ko) * | 2010-08-17 | 2012-03-27 | 엘지이노텍 주식회사 | 인쇄회로기판 및 그의 제조 방법 |
KR101219905B1 (ko) * | 2011-04-08 | 2013-01-09 | 엘지이노텍 주식회사 | 인쇄회로기판 및 그의 제조 방법 |
US8801914B2 (en) | 2011-05-26 | 2014-08-12 | Eastman Kodak Company | Method of making wear-resistant printed wiring member |
US20130155629A1 (en) * | 2011-12-19 | 2013-06-20 | Tong Hsing Electronic Industries, Ltd. | Hermetic Semiconductor Package Structure and Method for Manufacturing the same |
KR101980666B1 (ko) * | 2011-12-19 | 2019-08-29 | 엘지이노텍 주식회사 | 인쇄회로기판 및 이의 제조 방법 |
KR20140043955A (ko) * | 2012-09-21 | 2014-04-14 | 삼성전기주식회사 | 전극 패드, 이를 이용한 인쇄 회로 기판 및 그의 제조 방법 |
TWI576033B (zh) * | 2016-05-06 | 2017-03-21 | 旭德科技股份有限公司 | 線路基板及其製作方法 |
CN110087398A (zh) * | 2019-05-05 | 2019-08-02 | 东莞市奕东电子有限公司 | 一种新型fpc的制作方法 |
WO2021080600A1 (en) * | 2019-10-25 | 2021-04-29 | Hewlett-Packard Development Company, L.P. | Electrical connectors |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4068022A (en) * | 1974-12-10 | 1978-01-10 | Western Electric Company, Inc. | Methods of strengthening bonds |
US4016050A (en) * | 1975-05-12 | 1977-04-05 | Bell Telephone Laboratories, Incorporated | Conduction system for thin film and hybrid integrated circuits |
JPS5990938A (ja) * | 1982-11-17 | 1984-05-25 | Nec Corp | 半導体装置用プリント回路基板 |
US5169680A (en) * | 1987-05-07 | 1992-12-08 | Intel Corporation | Electroless deposition for IC fabrication |
JPH04116837A (ja) * | 1990-09-06 | 1992-04-17 | Matsushita Electric Ind Co Ltd | 電子回路の表面実装方法 |
US5235139A (en) * | 1990-09-12 | 1993-08-10 | Macdermid, Incorprated | Method for fabricating printed circuits |
US5272596A (en) * | 1991-06-24 | 1993-12-21 | At&T Bell Laboratories | Personal data card fabricated from a polymer thick-film circuit |
JPH0563331A (ja) * | 1991-09-03 | 1993-03-12 | Nec Ibaraki Ltd | 印刷回路基板 |
JPH05327187A (ja) * | 1992-05-18 | 1993-12-10 | Ishihara Chem Co Ltd | プリント配線板及びその製造法 |
JP2783093B2 (ja) * | 1992-10-21 | 1998-08-06 | 日本電気株式会社 | プリント配線板 |
US5367195A (en) * | 1993-01-08 | 1994-11-22 | International Business Machines Corporation | Structure and method for a superbarrier to prevent diffusion between a noble and a non-noble metal |
US5249728A (en) * | 1993-03-10 | 1993-10-05 | Atmel Corporation | Bumpless bonding process having multilayer metallization |
JP2606115B2 (ja) * | 1993-12-27 | 1997-04-30 | 日本電気株式会社 | 半導体実装基板用素子接合パッド |
US5587336A (en) * | 1994-12-09 | 1996-12-24 | Vlsi Technology | Bump formation on yielded semiconductor dies |
JP3345529B2 (ja) * | 1995-06-20 | 2002-11-18 | 日立化成工業株式会社 | ワイヤボンディング用端子とその製造方法並びにそのワイヤボンディング端子を用いた半導体搭載用基板の製造方法 |
-
1997
- 1997-06-11 US US08/873,060 patent/US5910644A/en not_active Expired - Fee Related
-
1998
- 1998-01-15 TW TW087100507A patent/TW368786B/zh active
- 1998-04-29 EP EP98303350A patent/EP0884935B1/en not_active Expired - Lifetime
- 1998-04-29 DE DE69834768T patent/DE69834768T2/de not_active Expired - Lifetime
- 1998-05-08 MY MYPI98002088A patent/MY115395A/en unknown
- 1998-05-18 KR KR1019980017874A patent/KR100295286B1/ko not_active IP Right Cessation
- 1998-06-08 SG SG1998001312A patent/SG71123A1/en unknown
Also Published As
Publication number | Publication date |
---|---|
DE69834768D1 (de) | 2006-07-20 |
US5910644A (en) | 1999-06-08 |
KR19990006469A (ko) | 1999-01-25 |
SG71123A1 (en) | 2000-03-21 |
DE69834768T2 (de) | 2007-05-24 |
EP0884935A2 (en) | 1998-12-16 |
EP0884935A3 (en) | 2000-03-08 |
KR100295286B1 (ko) | 2001-07-12 |
EP0884935B1 (en) | 2006-06-07 |
MY115395A (en) | 2003-05-31 |
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