TW336324B - Column select signal control circuit - Google Patents

Column select signal control circuit

Info

Publication number
TW336324B
TW336324B TW085113677A TW85113677A TW336324B TW 336324 B TW336324 B TW 336324B TW 085113677 A TW085113677 A TW 085113677A TW 85113677 A TW85113677 A TW 85113677A TW 336324 B TW336324 B TW 336324B
Authority
TW
Taiwan
Prior art keywords
output
circuit
making
delay circuit
merge
Prior art date
Application number
TW085113677A
Other languages
English (en)
Inventor
Kim Chul-Soo
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Application granted granted Critical
Publication of TW336324B publication Critical patent/TW336324B/zh

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)
TW085113677A 1995-11-13 1996-11-08 Column select signal control circuit TW336324B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950040994A KR0157289B1 (ko) 1995-11-13 1995-11-13 컬럼 선택 신호 제어회로

Publications (1)

Publication Number Publication Date
TW336324B true TW336324B (en) 1998-07-11

Family

ID=19433883

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085113677A TW336324B (en) 1995-11-13 1996-11-08 Column select signal control circuit

Country Status (4)

Country Link
US (1) US5812464A (zh)
JP (1) JP3814033B2 (zh)
KR (1) KR0157289B1 (zh)
TW (1) TW336324B (zh)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100252043B1 (ko) * 1997-11-07 2000-05-01 윤종용 반도체 메모리 장치의 칼럼 선택 신호 제어기 및 칼럼 선택제어 방법
JPH11306758A (ja) 1998-04-27 1999-11-05 Matsushita Electric Ind Co Ltd 半導体記憶装置
JP3959211B2 (ja) * 1999-09-22 2007-08-15 株式会社東芝 半導体記憶装置
JP2001084762A (ja) 1999-09-16 2001-03-30 Matsushita Electric Ind Co Ltd 半導体メモリ装置
KR100610018B1 (ko) * 2004-12-13 2006-08-08 삼성전자주식회사 반도체 메모리 장치의 컬럼 선택선 신호 생성 장치
US7522467B2 (en) 2005-09-29 2009-04-21 Hynix Semiconductor Inc. Semiconductor memory device
KR100780636B1 (ko) * 2005-09-29 2007-11-29 주식회사 하이닉스반도체 반도체 메모리 장치
KR20190030432A (ko) 2017-09-14 2019-03-22 김진강 안전기능이 강화된 톰슨 프레스

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2531829B2 (ja) * 1990-05-01 1996-09-04 株式会社東芝 スタティック型メモリ
JP3100622B2 (ja) * 1990-11-20 2000-10-16 沖電気工業株式会社 同期型ダイナミックram
KR950002724B1 (ko) * 1992-03-13 1995-03-24 삼성전자주식회사 데이타 리텐션(dr)모드 컨트롤 회로
US5384745A (en) * 1992-04-27 1995-01-24 Mitsubishi Denki Kabushiki Kaisha Synchronous semiconductor memory device
US5379261A (en) * 1993-03-26 1995-01-03 United Memories, Inc. Method and circuit for improved timing and noise margin in a DRAM
US5386385A (en) * 1994-01-31 1995-01-31 Texas Instruments Inc. Method and apparatus for preventing invalid operating modes and an application to synchronous memory devices
JP2616567B2 (ja) * 1994-09-28 1997-06-04 日本電気株式会社 半導体記憶装置

Also Published As

Publication number Publication date
JPH09167489A (ja) 1997-06-24
KR970029812A (ko) 1997-06-26
KR0157289B1 (ko) 1998-12-01
JP3814033B2 (ja) 2006-08-23
US5812464A (en) 1998-09-22

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees
GD4A Issue of patent certificate for granted invention patent