TW333624B - Memory device - Google Patents

Memory device

Info

Publication number
TW333624B
TW333624B TW085113221A TW85113221A TW333624B TW 333624 B TW333624 B TW 333624B TW 085113221 A TW085113221 A TW 085113221A TW 85113221 A TW85113221 A TW 85113221A TW 333624 B TW333624 B TW 333624B
Authority
TW
Taiwan
Prior art keywords
coupled
output
decoder
memory device
latch
Prior art date
Application number
TW085113221A
Other languages
English (en)
Inventor
Myoung Choi Jae
Original Assignee
Hyundai Electronics Ind
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hyundai Electronics Ind filed Critical Hyundai Electronics Ind
Application granted granted Critical
Publication of TW333624B publication Critical patent/TW333624B/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
TW085113221A 1995-10-27 1996-10-28 Memory device TW333624B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950037694A KR100209364B1 (ko) 1995-10-27 1995-10-27 메모리장치

Publications (1)

Publication Number Publication Date
TW333624B true TW333624B (en) 1998-06-11

Family

ID=19431652

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085113221A TW333624B (en) 1995-10-27 1996-10-28 Memory device

Country Status (4)

Country Link
US (1) US5701273A (zh)
JP (1) JPH09171685A (zh)
KR (1) KR100209364B1 (zh)
TW (1) TW333624B (zh)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2538659B2 (ja) * 1988-12-28 1996-09-25 花王株式会社 感熱記録材料
US7681005B1 (en) * 1996-01-11 2010-03-16 Micron Technology, Inc. Asynchronously-accessible memory device with mode selection circuitry for burst or pipelined operation
JPH09320269A (ja) * 1996-05-31 1997-12-12 Nippon Steel Corp アドレス装置
US6009038A (en) * 1996-05-31 1999-12-28 United Microelectronics Corporation Addressing unit
KR100231605B1 (ko) * 1996-12-31 1999-11-15 김영환 반도체 메모리 소자의 전력소모 방지 장치
KR100499626B1 (ko) * 2000-12-18 2005-07-07 주식회사 하이닉스반도체 반도체 메모리 장치
JP2005070673A (ja) * 2003-08-27 2005-03-17 Renesas Technology Corp 半導体回路
JP2006208517A (ja) * 2005-01-26 2006-08-10 Renesas Technology Corp 半導体回路

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62202399A (ja) * 1985-10-04 1987-09-07 Mitsubishi Electric Corp 半導体メモリ
JP2648840B2 (ja) * 1988-11-22 1997-09-03 株式会社日立製作所 半導体記憶装置
JP2531829B2 (ja) * 1990-05-01 1996-09-04 株式会社東芝 スタティック型メモリ
US5233565A (en) * 1990-12-26 1993-08-03 Motorola, Inc. Low power BICMOS memory using address transition detection and a method therefor
JP3179788B2 (ja) * 1991-01-17 2001-06-25 三菱電機株式会社 半導体記憶装置
JP3179791B2 (ja) * 1991-02-22 2001-06-25 株式会社日立製作所 半導体記憶装置
JP3178859B2 (ja) * 1991-06-05 2001-06-25 株式会社東芝 ランダムアクセスメモリ装置およびそのパイプライン・ページモード制御方法
US5537353A (en) * 1995-08-31 1996-07-16 Cirrus Logic, Inc. Low pin count-wide memory devices and systems and methods using the same

Also Published As

Publication number Publication date
KR100209364B1 (ko) 1999-07-15
US5701273A (en) 1997-12-23
JPH09171685A (ja) 1997-06-30
KR970023387A (ko) 1997-05-30

Similar Documents

Publication Publication Date Title
TW325535B (en) Memory system and data transfer method
TW353166B (en) Synchronous semiconductor memory device
EP2006858A3 (en) Micro-tile memory interface
KR910003515A (ko) 단순화된 동기적 메시 프로세서
KR930018594A (ko) 반도체 기억 장치
WO2002015190A3 (en) Non-volatile memory, method of manufacture and programming
EP0211565A3 (en) Random access memories
AU2002240742A1 (en) Apparatus for variable word length computing in an array processor
JPS6042554B2 (ja) Ｃｍｏｓメモリデコ−ダ回路
TW333624B (en) Memory device
KR960012002A (ko) 반도체 메모리와 그 사용방법, 컬럼 디코더 및 화상 프로세서
KR960012026A (ko) 반도체 기억장치
US5073873A (en) Semiconductor memory device
WO1995012164A3 (en) Frame buffer system designed for windowing operations
TW336294B (en) Semiconductor memory device and access method for the same
US6256681B1 (en) Data buffer for programmable memory
EP0017862B1 (en) Memory device
EP0345791A3 (en) Nonvolatile semiconductor memory
TW332355B (en) Semiconductor device having a latch circuit for latching externally input data
KR900019013A (ko) 파셜 랜덤 액세스 메모리
US5680127A (en) Parallel-to-serial conversion device and linear transformation device making use thereof
ES8407615A1 (es) Memoria que emplea lineas de direcciones en filas y columnas multiplexadas
KR20010021062A (ko) 반도체 메모리장치 및 이의 메모리셀 어레이 블락 제어방법
EP0924707A3 (en) Synchronous dynamic random access memory architecture for sequential burst mode
KR970051170A (ko) 메모리 셀 어레이 및 그를 이용한 프로그램 방법

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees