TW331041B - Semiconductor memory device - Google Patents

Semiconductor memory device

Info

Publication number
TW331041B
TW331041B TW086107551A TW86107551A TW331041B TW 331041 B TW331041 B TW 331041B TW 086107551 A TW086107551 A TW 086107551A TW 86107551 A TW86107551 A TW 86107551A TW 331041 B TW331041 B TW 331041B
Authority
TW
Taiwan
Prior art keywords
electrode
bitline
sub
memory transistor
part functioning
Prior art date
Application number
TW086107551A
Other languages
English (en)
Inventor
Yasuhiro Horita
Takeshi Nojima
Hiroji Komatsu
Original Assignee
Sharp Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Kk filed Critical Sharp Kk
Application granted granted Critical
Publication of TW331041B publication Critical patent/TW331041B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
    • G11C17/126—Virtual ground arrays

Landscapes

  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
TW086107551A 1996-06-11 1997-06-02 Semiconductor memory device TW331041B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14961596A JP3235715B2 (ja) 1996-06-11 1996-06-11 半導体記憶装置

Publications (1)

Publication Number Publication Date
TW331041B true TW331041B (en) 1998-05-01

Family

ID=15479091

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086107551A TW331041B (en) 1996-06-11 1997-06-02 Semiconductor memory device

Country Status (4)

Country Link
US (1) US5852570A (zh)
JP (1) JP3235715B2 (zh)
KR (1) KR100251690B1 (zh)
TW (1) TW331041B (zh)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100252475B1 (ko) * 1997-05-24 2000-04-15 윤종용 반도체 롬 장치
JP2000019709A (ja) 1998-07-03 2000-01-21 Hitachi Ltd 半導体装置及びパターン形成方法
JP3420089B2 (ja) * 1998-11-04 2003-06-23 Ｎｅｃエレクトロニクス株式会社 電子デバイス並びに半導体装置、及び電極形成方法
JP3729665B2 (ja) * 1998-11-25 2005-12-21 松下電器産業株式会社 半導体装置
JP3779480B2 (ja) 1999-02-10 2006-05-31 Ｎｅｃエレクトロニクス株式会社 半導体記憶装置
US6269017B1 (en) * 1999-03-04 2001-07-31 Macronix International Co., Ltd. Multi level mask ROM with single current path
JP2001014876A (ja) 1999-06-25 2001-01-19 Nec Corp 半導体記憶装置
JP3393600B2 (ja) * 1999-07-07 2003-04-07 シャープ株式会社 半導体記憶装置
US6424556B1 (en) * 2000-12-28 2002-07-23 Virage Logic Corp. System and method for increasing performance in a compilable read-only memory (ROM)
KR100463602B1 (ko) * 2001-12-29 2004-12-29 주식회사 하이닉스반도체 불휘발성 강유전체 메모리의 배선
TW556221B (en) * 2002-05-20 2003-10-01 Macronix Int Co Ltd ROM with reduced loading
CN100446115C (zh) * 2002-06-13 2008-12-24 旺宏电子股份有限公司 降低负载值的只读存储器
KR20090097893A (ko) * 2006-11-29 2009-09-16 램버스 인코포레이티드 작동열화를 반전시킬 가열회로가 내장된 집적회로
JP4907563B2 (ja) 2008-01-16 2012-03-28 パナソニック株式会社 半導体記憶装置
JP2009206492A (ja) * 2008-01-31 2009-09-10 Toshiba Corp 半導体装置
JP2009271261A (ja) * 2008-05-02 2009-11-19 Powerchip Semiconductor Corp 回路構造とそれを定義するためのフォトマスク
US9269405B1 (en) * 2014-11-04 2016-02-23 Mediatek Inc. Switchable bit-line pair semiconductor memory
US9685239B1 (en) * 2016-10-12 2017-06-20 Pegasus Semiconductor (Beijing) Co., Ltd Field sub-bitline nor flash array
CN112802523A (zh) * 2019-11-14 2021-05-14 力旺电子股份有限公司 只读式存储单元及其相关的存储单元阵列

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2845414B2 (ja) * 1992-09-18 1999-01-13 シャープ株式会社 半導体読み出し専用メモリ
JPH06275795A (ja) * 1993-03-19 1994-09-30 Fujitsu Ltd 半導体記憶装置
US5493527A (en) * 1993-08-26 1996-02-20 United Micro Electronics Corporation High density ROM with select lines
JPH07130163A (ja) * 1993-11-01 1995-05-19 Matsushita Electron Corp 半導体メモリ
US5432730A (en) * 1993-12-20 1995-07-11 Waferscale Integration, Inc. Electrically programmable read only memory array
US5506816A (en) * 1994-09-06 1996-04-09 Nvx Corporation Memory cell array having compact word line arrangement

Also Published As

Publication number Publication date
KR980006417A (ko) 1998-03-30
US5852570A (en) 1998-12-22
KR100251690B1 (ko) 2000-04-15
JP3235715B2 (ja) 2001-12-04
JPH09331030A (ja) 1997-12-22

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees