TW325594B - Method for fabricating semiconductor device - Google Patents
Method for fabricating semiconductor deviceInfo
- Publication number
- TW325594B TW325594B TW085110740A TW85110740A TW325594B TW 325594 B TW325594 B TW 325594B TW 085110740 A TW085110740 A TW 085110740A TW 85110740 A TW85110740 A TW 85110740A TW 325594 B TW325594 B TW 325594B
- Authority
- TW
- Taiwan
- Prior art keywords
- conductivity type
- impurity
- layers
- forming
- low
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title abstract 3
- 238000000034 method Methods 0.000 title abstract 2
- 239000012535 impurity Substances 0.000 abstract 8
- 238000009792 diffusion process Methods 0.000 abstract 2
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 238000009413 insulation Methods 0.000 abstract 1
- 150000002500 ions Chemical class 0.000 abstract 1
- 238000002955 isolation Methods 0.000 abstract 1
- 230000002093 peripheral effect Effects 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B20/00—Read-only memory [ROM] devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B20/00—Read-only memory [ROM] devices
- H10B20/27—ROM only
- H10B20/30—ROM only having the source region and the drain region on the same level, e.g. lateral transistors
- H10B20/38—Doping programmed, e.g. mask ROM
- H10B20/387—Source region or drain region doping programmed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823412—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823437—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
- H01L21/823456—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes gate conductors with different shapes, lengths or dimensions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B20/00—Read-only memory [ROM] devices
- H10B20/60—Peripheral circuit regions
- H10B20/65—Peripheral circuit regions of memory structures of the ROM only type
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Semiconductor Memories (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Element Separation (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP05591596A JP3355083B2 (ja) | 1996-03-13 | 1996-03-13 | 半導体装置の製造方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW325594B true TW325594B (en) | 1998-01-21 |
Family
ID=13012415
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW085110740A TW325594B (en) | 1996-03-13 | 1996-09-03 | Method for fabricating semiconductor device |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US5780344A (zh) |
| JP (1) | JP3355083B2 (zh) |
| KR (1) | KR100221064B1 (zh) |
| TW (1) | TW325594B (zh) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6214675B1 (en) * | 1999-02-08 | 2001-04-10 | Lucent Technologies Inc. | Method for fabricating a merged integrated circuit device |
| JP2000349173A (ja) * | 1999-06-04 | 2000-12-15 | Nec Corp | フラットセル型半導体メモリ装置の製造方法 |
| KR100401005B1 (ko) * | 2001-08-27 | 2003-10-10 | 동부전자 주식회사 | 마스크롬 제조방법 |
| KR100401004B1 (ko) * | 2001-08-27 | 2003-10-10 | 동부전자 주식회사 | 마스크롬 구조 및 그의 제조방법 |
| CN1225782C (zh) * | 2002-12-27 | 2005-11-02 | 中芯国际集成电路制造(上海)有限公司 | 一种掩膜式只读存储器工艺与元件 |
| CN102315170B (zh) * | 2011-05-26 | 2013-07-31 | 北京大学 | 一种基于湿法腐蚀制备硅纳米线场效应晶体管的方法 |
| KR20190111389A (ko) | 2018-03-22 | 2019-10-02 | 주식회사 다온 인터내셔널 | 김서림 방지용 마스크 |
| KR20200114043A (ko) | 2019-03-27 | 2020-10-07 | 주식회사 화림에프포 | 김서림 방지패드가 부착된 마스크 |
| KR20210065539A (ko) | 2019-11-27 | 2021-06-04 | 주식회사 다온 인터내셔널 | 김서림 방지용 팬 유닛 및 마스크 |
| KR102640783B1 (ko) | 2022-03-16 | 2024-02-23 | 강태구 | 안경김서림방지패드를 갖는 마스크 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4458262A (en) * | 1980-05-27 | 1984-07-03 | Supertex, Inc. | CMOS Device with ion-implanted channel-stop region and fabrication method therefor |
| US5330924A (en) * | 1993-11-19 | 1994-07-19 | United Microelectronics Corporation | Method of making 0.6 micrometer word line pitch ROM cell by 0.6 micrometer technology |
| US5597753A (en) * | 1994-12-27 | 1997-01-28 | United Microelectronics Corporation | CVD oxide coding method for ultra-high density mask read-only-memory (ROM) |
| US5576573A (en) * | 1995-05-31 | 1996-11-19 | United Microelectronics Corporation | Stacked CVD oxide architecture multi-state memory cell for mask read-only memories |
-
1996
- 1996-03-13 JP JP05591596A patent/JP3355083B2/ja not_active Expired - Fee Related
- 1996-09-03 US US08/707,252 patent/US5780344A/en not_active Expired - Lifetime
- 1996-09-03 TW TW085110740A patent/TW325594B/zh not_active IP Right Cessation
- 1996-10-19 KR KR1019960047625A patent/KR100221064B1/ko not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR970067907A (ko) | 1997-10-13 |
| JP3355083B2 (ja) | 2002-12-09 |
| KR100221064B1 (ko) | 1999-09-15 |
| JPH09246403A (ja) | 1997-09-19 |
| US5780344A (en) | 1998-07-14 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |