TW307027B - Process for reducing circuit damage during pecvd in single wafer pecvd system - Google Patents
Process for reducing circuit damage during pecvd in single wafer pecvd system Download PDFInfo
- Publication number
- TW307027B TW307027B TW085106056A TW85106056A TW307027B TW 307027 B TW307027 B TW 307027B TW 085106056 A TW085106056 A TW 085106056A TW 85106056 A TW85106056 A TW 85106056A TW 307027 B TW307027 B TW 307027B
- Authority
- TW
- Taiwan
- Prior art keywords
- plasma
- electrode
- pecvd
- bias
- potential
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 43
- 239000004065 semiconductor Substances 0.000 claims abstract description 22
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims abstract description 17
- 238000006243 chemical reaction Methods 0.000 claims description 22
- 238000000151 deposition Methods 0.000 claims description 8
- 230000008021 deposition Effects 0.000 claims description 6
- 239000000126 substance Substances 0.000 claims description 3
- 230000002079 cooperative effect Effects 0.000 claims description 2
- 238000002309 gasification Methods 0.000 claims 1
- 238000009413 insulation Methods 0.000 claims 1
- 238000012544 monitoring process Methods 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 description 28
- 239000007789 gas Substances 0.000 description 14
- 150000002500 ions Chemical class 0.000 description 9
- 239000010410 layer Substances 0.000 description 9
- 238000004519 manufacturing process Methods 0.000 description 9
- 239000011241 protective layer Substances 0.000 description 5
- MWUXSHHQAYIFBG-UHFFFAOYSA-N Nitric oxide Chemical compound O=[N] MWUXSHHQAYIFBG-UHFFFAOYSA-N 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 230000001681 protective effect Effects 0.000 description 3
- 230000005855 radiation Effects 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 230000002411 adverse Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 239000000356 contaminant Substances 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000008246 gaseous mixture Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 235000009328 Amaranthus caudatus Nutrition 0.000 description 1
- 240000001592 Amaranthus caudatus Species 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- IOVCWXUNBOPUCH-UHFFFAOYSA-N Nitrous acid Chemical compound ON=O IOVCWXUNBOPUCH-UHFFFAOYSA-N 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- 235000012735 amaranth Nutrition 0.000 description 1
- 239000004178 amaranth Substances 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 230000001276 controlling effect Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003344 environmental pollutant Substances 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- NBVXSUQYWXRMNV-UHFFFAOYSA-N fluoromethane Chemical compound FC NBVXSUQYWXRMNV-UHFFFAOYSA-N 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 239000012071 phase Substances 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 238000009832 plasma treatment Methods 0.000 description 1
- 231100000719 pollutant Toxicity 0.000 description 1
- 239000000376 reactant Substances 0.000 description 1
- 239000012495 reaction gas Substances 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 241000894007 species Species 0.000 description 1
- 230000002269 spontaneous effect Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
- 239000012808 vapor phase Substances 0.000 description 1
Classifications
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/4401—Means for minimising impurities, e.g. dust, moisture or residual gas, in the reaction chamber
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/50—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
- C23C16/505—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges
- C23C16/509—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges using internal electrodes
- C23C16/5096—Flat-bed apparatus
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/52—Controlling or regulating the coating process
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/0214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/318—Inorganic layers composed of nitrides
- H01L21/3185—Inorganic layers composed of nitrides of siliconnitrides
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Physics & Mathematics (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- General Chemical & Material Sciences (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Chemical Vapour Deposition (AREA)
- Formation Of Insulating Films (AREA)
Description
經濟部中央標準局貝工消費合作社印製 A7 _____B7 五、發明説明(1 ) 發明領域 本發明係關於半導體的製造,更仔細地説,係關於在積 體電路晶圓上沈積防護膜的方法。 發明背景 在半導體主體上沈積絕緣層或防護層時,通常會利用化 學氣相沈積(CVD),使所需成份之氣趙所組成的化學品( 反應物)在氣相中進行化學反應,而在積體電路晶圓上形 成堅實的絕緣膜。PEC VD系統可依照壓大小和能量輸入的 方式分類。PECVD系統並不單只依靠熱能,相反地也使用 無線電(RF)所引發的白熱放電電漿,將能量轉移到反應氣 雜内’使積禮電路晶圓可以維持在低於其他製程的溫度。 一般説來,在PECVD系統中沈積絕緣膜時,都是在低頻 、低能量密度的批量反應器中進行的。批量反應器可以同 時容納大量的晶圓。在低能量密度的製程中,會將R F能 量散佈到大量的晶圓上’使各晶圓都接受到低能量密度的 電漿。在這種狀況下’沈積時間很長。低頻製程也有其他 的缺點。在低頻製程中,膜層對特定的元件圖案非常敏感 。換句話説’每一種不同型態的元件,都需要一種不同的 製程,而各晶圓上又具有許多不同的元件圖案。第二,低 頻製程所製作的防護膜在整面晶圓上很容易產生不均勻的 現象。如果晶圓上有各式不同的元件,結構密度也相差很 大,也會發生不均勻的問題。而且批量系統比起單晶圓系 統,更容易產生晶圓之間厚度不一致的問題。 在傳統的電漿製程中,在製程完成率,或説產出率,與 本f張尺度適用中0®家辟(CNS ) A4制·( 21GX297公釐) 一~~' (請先閲讀背面之注意事項再填寫本頁) -裝· -訂· 線· 307027五、發明説明( A7 B7 經濟部中央橾準局貝工消費合作社印製 半導體几件的晶質之間必須有所取捨。要提高製程完成率 ’就要增加電漿密度和離子流量。對傳統的電漿製程方法 而言,提高產生電漿的RF能量就會提高離子密度。但是 ,提高送往電漿媒介的RF能量,也會提高電漿離子的平 均能量水平,而具有多餘導向能量(例如數百電予伏特)的 離子可能會損壞半導體元件。這是因爲離子具有這麼大的 能量,以致當撞擊到半導體元件時,會穿入元件表面,對 元件造成輻射性的損害。如果發生了這種離子引發的輻射 損害時,就要在製造完成後再進行清洗或回火製程,才能 將半導體元件的效能所受到的不良影響降到最低。此外, 許多非均向性的電漿蝕刻製程常會在半導體晶圓表面上, 留下碳氫化氟等類不需要的化學殘留物,降低製造良率。 最後,製造者就必需藉由一些蝕刻後的清洗步驟,將這些 殘留物從半導體的表面上去除。在傳統的電漿製程技術中 ’電漿媒介會與電漿反應腔的内壁發生反應,使得不同的 污染物(如金屬)會沈積到半導體晶圓上(這些污染物可用 濺鍍的方式,從電漿電極和反應器的内壁上蝕去)。 這些輻射損害,碳氟膜層,電漿生成的污染物,和其他 一些不理想的現象加總起來,會使得所產生的半導體元件 無法達到最好的效能良率。因此,在傳統電漿協助的製程 技術中,爲了要提高製程完成率而藉由提高RF能量來提 高離子密度,確實會造成很嚴重的不良後果。但是,如果 有一種方法可以在提高電漿密度和離子流量的同時,控制 並限制住白熱放電,那麼製造者就可以提高電漿協助的製 -5 本紙張尺度適用中國國家揉準(CMS ) Α4規格(210 X 297公釐) (請先閲讀背面之注意事項再填寫本頁) .人丨裝· -訂· 線 A7 B7 經濟部中央樣準局男工消費合作社印装 五、發明説明(3 ) 程完成率,而不致降低元件的良率。 因此,確實需要有一種方法和裝置,可以在電漿協助製 程中,提高半導禮元件附近的離子密度,同時不致於產生 不受約束的白熱放電_。 正如以上的説明’傳統電漿協助的製程還有另一個限制 ’這是因爲在製程進行中時,電漿會散佈到整個製造處理 腔。結果,與處理腔的内壁發生反應。這些内壁包含了各 種金屬,當電漿物種在進行濺鍍蝕刻或化學反應時,就被 去除並傳送到半導碰元件表面,再埋入半導雅元件内。結 果,會進一步影響半導體元件的品質。 因此’確實需要有一種方法和裝置’足能避免電漿與製 造反應器的處理腔内壁,在電漿協助製程處理過程中發生 反應。 本發明在受到控制的狀況下進行PECVD反應器的操作, 使白熱放電受到控制,也不致與反應器的内壁發生反應, 可以順利地製造氮氧化物防護層之類的絕緣層,完全避免 高頻’高RF能量密度之單晶圓PECVD製程的缺點。本發 明可以處理單晶圓,而且不論元件類型爲何,都能生成均 句的絕緣膜。然而,使用高頻的R F能源製造超大型積體 電路(VLSI)時,一般都會在電漿處理過程中發生損害電路 元件的問題。例如,通常作爲FET電晶體之閘極絕緣層的 閘極氧化薄層(<200埃),在閘極暴露於電漿處理的製程步 驟中,就很容易崩潰。特別是在電晶體上使用電漿加強型 化學氣相沈積(PECVD)法沈積絕緣層時,如果對白熱放電 ___ -6- (請先聞讀背面之注意Ϋ項再填寫本頁) 本紙張尺度適用中國國家棵準(CNS ) A4規格(210X297公釐) 經濟部中央標準局貝工消费合作社印製 307027 A7 --------— _^_ 五、發明説明(4 ) 不加以控制和約束,就會造成損害,並降低良率。 發明的簡要説明 我們提出本發明之新製程的基礎在於我們發現,先前習 知的高能RF電漿加強型化學氣相沈積製程所以會造成損 害並降低良率的原因,就是無法控制或約束電漿的白熱放 電,結果在反應腔内,頂部與底部電極之間的放電狹縫附 近的區域,會有電漿白熱放電與放電腔内壁發生反應。這 會使電極之間的電漿電位產生發散或接地等不均勻的現象 ,並使形成的電漿與放電腔的内壁發生反應,而無法均勻 地控制和約束在電極之間的狹缝區域内,形成對稱的放電 〇 本發明可以控制電漿的電位,使之維持在均勻的水平, 使形成的電漿被侷限在遠離放電腔内壁影響的電極之間的 間隙區域,所以能在使用夠高的能量形成高密度膜層的同 時’還能降低支撑在底部電極或承受電極上電路元件所受 的損害。 本發明控制電漿電位的方式是,先在約高於12托耳的高 壓下進行系統操作,然後一面觀察頂面或驅動電極上的直 流偏壓,一面監控系統的操作,直到獲得最好高於〖〇伏特 的正電位。這時,在驅動電極與承受電極之間會發生對稱 的白熱放電,並有受到控制的電漿存在,只要將壓力大致 維持在14至20托耳之間,就能控制住電漿。 附圖的簡要銳昍 附圖分別爲: -7- 本紙張尺度適用中國國家榡準(CNS ) A4规格(21〇><297公釐) f I裝------訂-----L.線 (請先閲讀背面之注項再填寫本頁) A7 B7 經濟部中央樣準局貝工消費合作社印製 五、發明説明(5 ) 圖1是本發明實施例之一的PECVD裝置的側面説明圖; 圖2疋當囷1的裝置中維持均勻的平面化電壓時,被約束 於電極之間均勻電漿的説明圖;而 圖3是囷2的對照圖,其中電極之間的電漿並不受約束, 而且向外擴散到沈積腔的内壁上,在頂部或驅動電極上造 成不平衡的平面化電壓或負電位的直流偏壓。 發明的詳細説明 圖1所説明的PECVD裝置1 0中,包含了外壁1 2所圍住的 電衆·沈積腔11,並有頂部或驅動電極13,與接地的底部 或承受電極14相隔一段距離,而底部電極】4支撐住將以 電漿塗佈一層防護層的半導體積體電路晶圓15。 頂部電極13連接至RF能源,可以高能驅動,而且最好 包含一個傳統的蓮蓬頭結構,並且有單一氣體源或多種氣 體混合源’以便將電漿源導至反應腔11。密封的反應腔 11有一個壓力口 16’含有控制閥17,可以使反應腔!1内 維持所需的壓力。 在蓮蓬頭電極I3上,還有一個可變的RF產生器18藉1117 線19與之耦合’對它施以Rf電位,在電極13和14之間建 立放電電位。這就使得晶圓15得以暴露在RF電漿下,因 爲氣體混合物被導至密封的反應腔丨〗後,會經放電作用成 爲電漿’使氣體開始反應,而在預定的高眞空壓力的條件 下’在晶圓15上沈積出所需的防護層。 接至電極13的RF線19還接至一個包含可變電容之類的 可變RF電壓調節器2〇,和一個量測頂部電極13之尺?電壓 -8 本紙張適用中闺國家榇丰(CNS ) M胁(21〇><297公着 (丨裝------訂------線 (請先閲讀背面之注意事項再填寫本頁) 五、發明説明(6 ) 和直流電流的裝置21。操作時,RF能量放電會在驅動電 極13和底部電極14上之半導體晶圓15之間,產生電漿和 自發性的負直流偏壓。電漿内的電子會產生一個垂直電場 ,提高電漿密度並使電漿被侷限在晶圓表面上。自發性的 直流電壓所產生的電場,垂直於陰極或晶圓的表面。電子 因此會沿著平行半導體晶圓22表面的路徑移動。 我們發現只要監控頂部或驅動電極13的尺?電壓和直流 電壓,也就是直流偏壓,並且調節壓力和/或RF能量,使 直流偏壓浮動至約大於1 〇伏特的正電位,即可在高壓高 RF能量密度下執行PECVD製程,而不致遭遇習知技術的 缺失。在這種條件下,電漿的白熱放電22受到控制,並且 侷限在電極13和14之間的狹縫區域,只要電漿電位像圖2 所説明的維持均句。 圖3説明了電漿電位不受約束,而且白熱放電23延伸至 反應腔壁12外時’不受約束之白熱放電23與反應器外圍 壁12之間的反應。 本發明提出一種於積體電路半導體晶圓上沈積防護層之 類的絕緣層的高密度、高頻單晶圓電漿加強型化學氣相沈 積(PECVD)製程。其中的—個實施例中,晶圓是放置在第 一或驅動電極上,這是一個反應腔22中接地的承受器。然 後將晶圓1 5加熱至製程所需溫度。在較佳實施例中,製程 溫度最好在350。至430X:之間。接著,對反應腔丨丨加壓, 最好約在12至20托耳之間。 等到達到高壓後,可以將包含氮氣、矽烷、氨氣和氧化 -9 * t紙張尺度逍用中國國家梯準(CNS ) A4規格(21〇χ297公釐 (請先聞讀背面之注f項再填寫本莧) .裝. 訂 經濟部中央榡準局貝工消費合作社印裝 • —I- —1 ·
• In —--I 307〇27 ————五、發明説明(
經濟部中央樣準局員工消費合作社印製 亞氮之類的混合氣體,經由設計成蓮蓬頭結構的頂部電極 13,導至反應腔11内。氣禮混合物會直接流至晶圓15上 。然後經由線19對蓮蓬頭電極施加無線電頻率(Rp·)的電 位’造成氣嫌混合物的激發和離子化,並發生化學反應, 而在晶圓1 5上形成防護膜。 製程進行到此時,需要量測頂部驅動電極丨3的電漿電位 ’並需控制在約高於1 0伏特的樣定正直流偏壓或電位,以 產生圖2中均勾而受約束的白熱放電22。要進行這種量測 ’可以像圖1,在驅動電極1 3處加上一個電壓計2 1或類似 的裝置。有時爲了將直流偏壓或電位調至約大於1〇伏特, 需要調整壓力至約爲12至20托耳,或者有時也需要調整 R F頻率’直到直流偏壓移至正電位,最好能約大於i 〇伏 特。這種條件可以維持穩定的電漿電位,並使白熱放電22 受到約束。 上述製程所形成的模層同時具有以下的優點:粒子密度 低、紫外光穿透率高、晶圓内和晶圓之間厚度差異很低、 對圖案的敏感度低、能抵抗極高的濕度、無針孔、應力低 、步階覆蓋度低、鍵連的氫含量也很低。混合氣體來自氣 體複管容器’並流經蓮蓬頭電極丨3。各種氣體都由獨立的 氣體管線進入氣體複管容器,而各氣體管線則利用控制閥 ,使反應腔1 1内產生的粒子可以降到最低。 以上的敛述特別是關於應用儀器公司型號Αμε 5000的 PECVD系統和裝置,但是本發明的内容一樣適用於其他的 PEC VD裝置,只要能調整整力和能量,使電漿電位得 -10 · 本紙張尺度適用中國國家標率(CNS〉A4規格(2丨0X297公釐) (請先閲讀背面之注意事項再填寫本頁) •榮· b
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五、發明説明(8 ) 到控制,而使氣體電漿侷限在電極之間,遠離反應腔内壁 。致於所需調整的數量,則依照所用特定PEcvd裝置、其 反應腔大小、電極間陈、遠離腔壁之距離等條件來決定。 但不論PECVD裝置的種類和大小,本製程都一樣適用,其 效益也沒有差別。 應可瞭解以上的敘述只是爲了説明本發明,熟習本技藝 的人士應可在發明精神之内,設計出許多不同的變化和修 改。因此,本發明應視爲包含所有落於所附申請專利範 圍之内的替代、修改和變化。 1^1 n^— m I -»ι- ϋ— ^^1 ^ n H ^--1 ^^1 1-- 1^1、^TeJ • · (請先聞讀背面之注f項再填寫本頁)
經濟部中央橾準局貝工消费合作社印製 本紙張尺度適用中國國家橾準(CNS > A4规格(210X297公釐)
Claims (1)
- 經濟部中央標準局爲工消費合作社印製 307027 U C8 ----------------- *、申請糊細 i.—種於半導體主體表面上沈積絕緣層之電漿加強型化學 氣相沈積(PECVD)製程,可以降低電漿對半導體主趙的 損害並提高良率,其步驟係包含:將一半導體主體放置 在一承受電極上,該承受電極與一驅動電極相隔一個狹 窄的放電間隙’而該電極包含在一 PECVD裝置的反應 腔内’且遠離腔壁;將混合氣體導入該腔内,進行氣化 反應,並在該承受電極上之半導體主體的表面上沈積一 層絕緣層;將該反應腔加壓至約高於i 2托耳;對驃動 電極施加RF能量,在電極之間的間隙建立RF電漿電位 ’並在驅動電極上形成負直流偏壓,使該間隙内的氣體 形成化學氣相電漿的白熱放電,而在半導體的表面上開 始該絕緣層的反應與沈積;一面觀察驅動電極上的直流 偏壓,一面調整RF能量和/或壓力,直到該直流偏壓浮 動到正電位,使該電漿的白熱放電對稱而均勻,並且侷 限在該電極之間的間隙内,而不致與該腔壁發生反應。 2. 根據申請專利範園第【項之製程,其中該絕緣層是一平 坦化的膜層。 3. 根據申請專利範固第1項之製程,其中該半導艘主體係 一電晶體。 4_根據申請專利範園第1項之製程,其中該壓力是維持在 約1 4至2 0托耳之間。 5.根據中請專利範園第1項之製程,其步驟尚包含將直流 偏壓維持在大於10伏特的正電位。 _ -12- 本紙張尺度逋用中國國家橾準(CNS ) A4规格(210X297公釐) { -^-- * # (請先閲讀背面之注f項再填寫本頁) 、1T
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US08/574,748 US5926689A (en) | 1995-12-19 | 1995-12-19 | Process for reducing circuit damage during PECVD in single wafer PECVD system |
Publications (1)
Publication Number | Publication Date |
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TW307027B true TW307027B (en) | 1997-06-01 |
Family
ID=24297471
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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TW085106056A TW307027B (en) | 1995-12-19 | 1996-05-22 | Process for reducing circuit damage during pecvd in single wafer pecvd system |
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US (1) | US5926689A (zh) |
EP (1) | EP0780491B1 (zh) |
JP (1) | JP3084243B2 (zh) |
KR (1) | KR100256462B1 (zh) |
DE (1) | DE69603569T2 (zh) |
TW (1) | TW307027B (zh) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6207587B1 (en) * | 1997-06-24 | 2001-03-27 | Micron Technology, Inc. | Method for forming a dielectric |
US7091605B2 (en) | 2001-09-21 | 2006-08-15 | Eastman Kodak Company | Highly moisture-sensitive electronic device element and method for fabrication |
US20020129902A1 (en) * | 1999-05-14 | 2002-09-19 | Babayan Steven E. | Low-temperature compatible wide-pressure-range plasma flow device |
FR2797996B1 (fr) * | 1999-08-25 | 2003-10-03 | Gemplus Card Int | Procede de protection de puces de circuit integre par depot de couche mince isolante |
US6660646B1 (en) * | 2000-09-21 | 2003-12-09 | Northrop Grumman Corporation | Method for plasma hardening photoresist in etching of semiconductor and superconductor films |
US6500772B2 (en) | 2001-01-08 | 2002-12-31 | International Business Machines Corporation | Methods and materials for depositing films on semiconductor substrates |
KR100501185B1 (ko) * | 2002-12-10 | 2005-07-18 | 삼성전기주식회사 | Mems 정전용량형 센서의 출력 레벨 균일화 방법 및 장치 |
CN1313640C (zh) * | 2003-09-18 | 2007-05-02 | 中芯国际集成电路制造(上海)有限公司 | 等离子体增强式化学气相沉积处理方法 |
JP4523352B2 (ja) * | 2004-07-20 | 2010-08-11 | 株式会社日立ハイテクノロジーズ | プラズマ処理装置 |
US7259111B2 (en) * | 2005-01-19 | 2007-08-21 | Applied Materials, Inc. | Interface engineering to improve adhesion between low k stacks |
US7297376B1 (en) | 2006-07-07 | 2007-11-20 | Applied Materials, Inc. | Method to reduce gas-phase reactions in a PECVD process with silicon and organic precursors to deposit defect-free initial layers |
JP2009152265A (ja) | 2007-12-19 | 2009-07-09 | Tohoku Univ | 光電変換素子製造装置及び方法、並びに光電変換素子 |
Family Cites Families (18)
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US4426274A (en) * | 1981-06-02 | 1984-01-17 | International Business Machines Corporation | Reactive ion etching apparatus with interlaced perforated anode |
CH668145A5 (fr) * | 1986-09-26 | 1988-11-30 | Inst Microtechnique De L Unive | Procede et installation de depot de silicium amorphe hydrogene sur un substrat dans une enceinte a plasma. |
US5000113A (en) * | 1986-12-19 | 1991-03-19 | Applied Materials, Inc. | Thermal CVD/PECVD reactor and use for thermal chemical vapor deposition of silicon dioxide and in-situ multi-step planarized process |
US5158644A (en) * | 1986-12-19 | 1992-10-27 | Applied Materials, Inc. | Reactor chamber self-cleaning process |
US4826784A (en) * | 1987-11-13 | 1989-05-02 | Kopin Corporation | Selective OMCVD growth of compound semiconductor materials on silicon substrates |
US4851367A (en) * | 1988-08-17 | 1989-07-25 | Eastman Kodak Company | Method of making primary current detector using plasma enhanced chemical vapor deposition |
JPH02119125A (ja) * | 1988-10-28 | 1990-05-07 | Sumitomo Electric Ind Ltd | アモルファスシリコンゲルマニウム薄膜の製造方法 |
US5370912A (en) * | 1988-10-31 | 1994-12-06 | Norton Company | Diamond film deposition with a microwave plasma |
US4962049A (en) * | 1989-04-13 | 1990-10-09 | Applied Materials, Inc. | Process for the plasma treatment of the backside of a semiconductor wafer |
US5017403A (en) * | 1989-04-13 | 1991-05-21 | Massachusetts Institute Of Technology | Process for forming planarized films |
US5120680A (en) * | 1990-07-19 | 1992-06-09 | At&T Bell Laboratories | Method for depositing dielectric layers |
US5082542A (en) * | 1990-08-02 | 1992-01-21 | Texas Instruments Incorporated | Distributed-array magnetron-plasma processing module and method |
US5192849A (en) * | 1990-08-10 | 1993-03-09 | Texas Instruments Incorporated | Multipurpose low-thermal-mass chuck for semiconductor processing equipment |
US5260236A (en) * | 1991-06-07 | 1993-11-09 | Intel Corporation | UV transparent oxynitride deposition in single wafer PECVD system |
US5271972A (en) * | 1992-08-17 | 1993-12-21 | Applied Materials, Inc. | Method for depositing ozone/TEOS silicon oxide films of reduced surface sensitivity |
US5467013A (en) * | 1993-12-07 | 1995-11-14 | Sematech, Inc. | Radio frequency monitor for semiconductor process control |
EP0661732B1 (en) * | 1993-12-28 | 2004-06-09 | Applied Materials, Inc. | A method of forming silicon oxy-nitride films by plasma-enhanced chemical vapor deposition |
US5637190A (en) * | 1995-09-15 | 1997-06-10 | Vanguard International Semiconductor Corporation | Plasma purge method for plasma process particle control |
-
1995
- 1995-12-19 US US08/574,748 patent/US5926689A/en not_active Expired - Fee Related
-
1996
- 1996-05-22 TW TW085106056A patent/TW307027B/zh active
- 1996-10-15 KR KR1019960046023A patent/KR100256462B1/ko not_active IP Right Cessation
- 1996-11-11 JP JP08298637A patent/JP3084243B2/ja not_active Expired - Fee Related
- 1996-12-12 EP EP96309088A patent/EP0780491B1/en not_active Expired - Lifetime
- 1996-12-12 DE DE69603569T patent/DE69603569T2/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP0780491A1 (en) | 1997-06-25 |
JPH09181064A (ja) | 1997-07-11 |
US5926689A (en) | 1999-07-20 |
EP0780491B1 (en) | 1999-08-04 |
JP3084243B2 (ja) | 2000-09-04 |
KR100256462B1 (ko) | 2000-05-15 |
DE69603569D1 (de) | 1999-09-09 |
DE69603569T2 (de) | 2000-02-24 |
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