TW305956B - - Google Patents

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Publication number
TW305956B
TW305956B TW085111475A TW85111475A TW305956B TW 305956 B TW305956 B TW 305956B TW 085111475 A TW085111475 A TW 085111475A TW 85111475 A TW85111475 A TW 85111475A TW 305956 B TW305956 B TW 305956B
Authority
TW
Taiwan
Prior art keywords
channel transistor
channel
gate
drain
bus
Prior art date
Application number
TW085111475A
Other languages
English (en)
Chinese (zh)
Original Assignee
Toshiba Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Co Ltd filed Critical Toshiba Co Ltd
Application granted granted Critical
Publication of TW305956B publication Critical patent/TW305956B/zh

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356104—Bistable circuits using complementary field-effect transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Small-Scale Networks (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electronic Switches (AREA)
TW085111475A 1995-08-31 1996-09-19 TW305956B (enExample)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22421895A JP3192937B2 (ja) 1995-08-31 1995-08-31 バスホールド回路

Publications (1)

Publication Number Publication Date
TW305956B true TW305956B (enExample) 1997-05-21

Family

ID=16810372

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085111475A TW305956B (enExample) 1995-08-31 1996-09-19

Country Status (6)

Country Link
US (1) US5739702A (enExample)
EP (1) EP0762648B1 (enExample)
JP (1) JP3192937B2 (enExample)
KR (1) KR100241201B1 (enExample)
DE (1) DE69630427T2 (enExample)
TW (1) TW305956B (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11317657A (ja) 1998-05-06 1999-11-16 Toshiba Corp トランスミッション・ゲート回路
TW511335B (en) 1998-06-09 2002-11-21 Mitsubishi Electric Corp Integrated circuit
US6191607B1 (en) * 1998-09-16 2001-02-20 Cypress Semiconductor Corporation Programmable bus hold circuit and method of using the same
JP4119062B2 (ja) * 1999-10-25 2008-07-16 日本テキサス・インスツルメンツ株式会社 終端回路
US6512406B1 (en) * 1999-12-16 2003-01-28 Intel Corporation Backgate biased synchronizing latch
US6504401B1 (en) * 2001-11-30 2003-01-07 Xilinx, Inc. Configurable bus hold circuit with low leakage current
US7064593B2 (en) * 2004-09-20 2006-06-20 Texas Instruments Incorporated Bus-hold circuit
JP4768642B2 (ja) * 2007-01-17 2011-09-07 エヌイーシーコンピュータテクノ株式会社 トライステートバス回路
FR3062920B1 (fr) * 2017-02-16 2021-06-25 Spryngs Circuit de polarisation active et faible consommation d'une entree haute impedance

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5516539A (en) * 1978-07-20 1980-02-05 Nec Corp Level shifter circuit
US4484088A (en) * 1983-02-04 1984-11-20 General Electric Company CMOS Four-transistor reset/set latch
US4558237A (en) * 1984-03-30 1985-12-10 Honeywell Inc. Logic families interface circuit and having a CMOS latch for controlling hysteresis
US5498976A (en) * 1990-10-26 1996-03-12 Acer Incorporated Parallel buffer/driver configuration between data sending terminal and data receiving terminal
JPH073958B2 (ja) * 1992-01-31 1995-01-18 インターナショナル・ビジネス・マシーンズ・コーポレイション 終端回路
JPH0685653A (ja) * 1992-05-06 1994-03-25 Sgs Thomson Microelectron Inc バスキーパ特徴を有するレシーバ回路
US5227677A (en) * 1992-06-10 1993-07-13 International Business Machines Corporation Zero power transmission line terminator
US5347177A (en) * 1993-01-14 1994-09-13 Lipp Robert J System for interconnecting VLSI circuits with transmission line characteristics
US5469473A (en) * 1994-04-15 1995-11-21 Texas Instruments Incorporated Transceiver circuit with transition detection
JP3625881B2 (ja) * 1994-12-20 2005-03-02 株式会社ルネサステクノロジ バスシステム及びバスセンスアンプ

Also Published As

Publication number Publication date
DE69630427T2 (de) 2004-07-29
JPH0969770A (ja) 1997-03-11
US5739702A (en) 1998-04-14
DE69630427D1 (de) 2003-11-27
JP3192937B2 (ja) 2001-07-30
KR100241201B1 (ko) 2000-02-01
EP0762648B1 (en) 2003-10-22
EP0762648A2 (en) 1997-03-12
KR970013701A (ko) 1997-03-29
EP0762648A3 (en) 1999-01-27

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees