TW201909265A - 用於印刷電路板的半加成方法 - Google Patents

用於印刷電路板的半加成方法 Download PDF

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Publication number
TW201909265A
TW201909265A TW107123516A TW107123516A TW201909265A TW 201909265 A TW201909265 A TW 201909265A TW 107123516 A TW107123516 A TW 107123516A TW 107123516 A TW107123516 A TW 107123516A TW 201909265 A TW201909265 A TW 201909265A
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Taiwan
Prior art keywords
foil
copper
catalytic
thin
exposed
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TW107123516A
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English (en)
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TWI766064B (zh
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肯尼斯Ｓ 巴爾
康斯坦丁 卡拉瓦基斯
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美商席拉電路公司
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601—Process or apparatus
    • C23C18/1633—Process of electroless plating
    • C23C18/1646—Characteristics of the product obtained
    • C23C18/165—Multilayered product
    • C23C18/1653—Two or more layers with at least one layer obtained by electroless plating and one layer obtained by electroplating
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601—Process or apparatus
    • C23C18/1633—Process of electroless plating
    • C23C18/1689—After-treatment
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/18—Pretreatment of the material to be coated
    • C23C18/1803—Pretreatment of the material to be coated of metallic material surfaces or of a non-specific material surfaces
    • C23C18/1813—Pretreatment of the material to be coated of metallic material surfaces or of a non-specific material surfaces by radiant energy
    • C23C18/182—Radiation, e.g. UV, laser
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/31—Coating with metals
    • C23C18/38—Coating with copper
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
    • C23C28/02—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D only coatings only including layers of metallic material
    • C23C28/023—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D only coatings only including layers of metallic material only coatings of metal elements only
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00—Electroplating: Baths therefor
    • C25D3/02—Electroplating: Baths therefor from solutions
    • C25D3/30—Electroplating: Baths therefor from solutions of tin
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00—Electroplating: Baths therefor
    • C25D3/02—Electroplating: Baths therefor from solutions
    • C25D3/38—Electroplating: Baths therefor from solutions of copper
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02—Electroplating of selected surface areas
    • C25D5/022—Electroplating of selected surface areas using masking means
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/10—Electroplating with more than one layer of the same or of different metals
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/34—Pretreatment of metallic surfaces to be electroplated
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/48—After-treatment of electroplated surfaces
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00—Electroplating characterised by the article coated
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • H05K3/0035—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material of blind holes, i.e. having a metal layer at the bottom
    • H—ELECTRICITY
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • H05K3/0038—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material combined with laser drilling through a metal layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0047—Drilling of holes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/007—Manufacture or processing of a substrate for a printed circuit board supported by a temporary or sacrificial carrier
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061—Etching masks
    • H05K3/064—Photoresists
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
    • H05K3/182—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method
    • H05K3/184—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method using masks
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/421—Blind plated via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/422—Plated through-holes or plated via connections characterised by electroless plating method; pretreatment therefor
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/427—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
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    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09509—Blind vias, i.e. vias having one side closed
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    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0147—Carriers and holders
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    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703—Plating
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    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703—Plating
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    • H05K2203/107—Using laser light
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    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Materials Engineering (AREA)
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Abstract

本發明提供一種電路板，其具有介電芯體、箔頂部表面以及薄箔底部表面，該薄箔底部表面具有用以吸收來自雷射鑽孔操作之熱量以防止該薄箔底部表面在雷射鑽孔期間穿透的足夠厚度的箔背襯。執行包括以下之步驟序列：雷射鑽孔步驟、移除該箔背襯步驟、無電極電鍍步驟、圖案化抗蝕劑步驟、電鍍步驟、抗蝕劑剝離步驟、鍍錫步驟及銅蝕刻步驟，該步驟序列提供精確線寬及解析度之點通孔。

Description

用於印刷電路板的半加成方法
本發明涉及一種電路板及相關製造方法。詳言之，本發明涉及一種電路板及用於形成精確間距通孔及相關精確間距跡線之方法。
先前技術印刷電路板(PCB)使用形成於介電基板上之導電金屬互連件(已知為「跡線」)而形成。導電孔隙在電路板上形成以橋接介電基板之相對側上的跡線，其中具有較大直徑且可用於安裝組件之導電孔隙已知為「穿通孔」，且用以互連相對側上之跡線的最小直徑導電孔隙已知為「點通孔」(在跡線形成之前)或僅為「通孔」(在跡線形成之後)。攜載跡線導體之每一表面已知為「層」，且具有形成於一個表面或兩個表面上之跡線的每一介電基板形成「替代物(sub)」，其為多層板之基本子總成。藉由堆疊若干個此類替代物，每一替代物包含介電芯體，該介電芯體具有跡線且互連散佈在裸介電層之間的通孔，並且在溫度及壓力下使其層壓在一起，多層印刷電路可得以形成。介電基板可包含嵌入於諸如編織至織物中之玻璃纖維的纖維基質中的環氧樹脂。
先前技術電路板製造之一個難題為深(高縱橫比)通孔及精確間距通孔之形成。因為電鍍操作消耗溶液中之金屬離子，故難以形成具有高縱橫比之通孔，此係由於相較於接近循環離子浴液且由循環離子浴液補給之區域 的通孔，來自金屬離子浴液的通孔之更遙遠區域對於沉積具有更低金屬離子濃度。類似地，細徑通孔直徑受限於通孔之縱橫比，該縱橫比由待形成之電路層的厚度決定。盲孔(其在僅一個末端上開放)將金屬離子在溶液中之循環限制在通孔之封閉末端處。
精確間距電路板製造之另一難題為，點通孔結構在第一步驟中形成，穿通孔在獨立步驟中形成，且跡線在後續步驟中形成。期望在單個電鍍步驟中形成點通孔、穿通孔電鍍及跡線。亦期望形成具有單層之縱橫比但連續穿透多層之通孔，從而形成堆疊通孔。亦期望提供一種方法，其提供經減小直徑之通孔及供用於製造精確間距PCB之精確間距的跡線。
本發明之第一目標為用於形成具有點通孔、堆疊通孔、穿通孔及跡線之電路層的方法，該方法利用具有施加至底部表面之薄導電箔層及施加至薄導電箔的相對較厚背襯箔層之介電質，電路層視情況亦具有背對底部表面施加之頂部表面導電箔，電路層隨後具有盲孔鑽孔步驟，由此，雷射將介電質燒蝕至底部薄箔層之層級，背襯層移除來自底部箔之熱量以防止薄箔在介電質之雷射燒蝕期間穿透或熔融，以及用於穿過板及箔層之所有層鑽孔的視情況選用穿通孔步驟，厚背襯箔移除步驟，在無電極沉積步驟中銅在薄箔及經暴露介電表面上的無電極沉積，應用於電路層之至少一個表面之圖案抗蝕劑步驟，使銅沉積於未遮罩銅區域上之電鍍步驟，使諸如錫之遮罩材料沉積於經暴露銅區域上之輔助鍍覆遮罩步驟，抗蝕劑剝離步驟，以及用以移除未經塗佈有諸如錫之輔助電鍍材料之諸如銅的無電極沉積材料的快速蝕刻步驟，以及用以移除諸如錫之輔助電鍍遮罩材料之快速蝕刻步驟。
本發明之第二目標為已藉由以下步驟製得的電路板：將薄箔施 加至介電質之底部表面，將厚背襯箔施加至底部表面錫箔，視情況將箔施加至介電質的與底部表面相對之頂部表面，穿過介電質自頂部表面對材料進行雷射鑽孔或燒蝕並下至底部薄箔而不穿透底部薄箔，底部薄箔之穿透藉由對作為散熱片之背襯箔的厚度選擇來防止，其後移除背襯箔，其後對電路板進行無電極電鍍，其後將圖案化抗蝕劑塗覆至至少一個表面，其後電鍍電路板，該電鍍操作於電路板之經暴露銅上，其後使用諸如錫之遮罩材料電鍍經暴露銅，其後對經暴露銅執行快速蝕刻以移除尚未使用諸如錫之遮罩材料電鍍的銅，其後視情況執行快速蝕刻以移除任何經暴露錫。
本發明之第三目標為藉由以下步驟形成之多層電路板：自於頂部及底部表面上具有薄導電層之介電質形成內部層，該導電層具有施加至每一表面之相對較厚的箔，該相對較厚的箔自頂部表面移除，諸如藉由雷射穿過頂部箔及介電質鑽孔以形成通孔孔隙，藉由底部表面相對較厚的箔之熱量吸收能力防止經雷射鑽孔通孔孔隙穿透頂部箔，移除底部表面相對較厚的箔，對經暴露介電表面及箔表面進行無電極電鍍，將抗蝕劑圖案施加至頂部表面及底部表面，對未由抗蝕劑覆蓋之經暴露銅表面進行電鍍直至插入至少一個通孔孔隙，對未由抗蝕劑覆蓋之經暴露銅表面進行鍍錫，剝離光阻，充分地快速蝕刻經暴露銅表面以移除預先由光阻覆蓋之銅，且視情況蝕刻鍍錫層；將一或多對外部層添加至內部層，每一外部層藉由將具有覆蓋有箔之一個表面的介電質之非箔面層壓至內部層而形成，其後在實質上在內部層填充通孔上方之至少一個外部層上鑽至少一個通孔孔隙，其後對通孔孔隙及經暴露箔表面進行無電極電鍍，其後施加圖案遮罩，其後對通孔孔隙及經暴露箔表面進行電鍍，其後對經暴露銅表面進行鍍錫，其後剝離圖案遮罩，其後快速蝕刻在圖案遮罩下之箔及無電極電鍍層直至箔及無電極電鍍層移除，其後視情況剝離錫，從而為後續外部層形成新的內部 層以待施加。
發明概要
在本發明之第一實施例中，至少一個通孔形成於電路板上，該電路板具有覆蓋有底部薄銅箔及置放在底部薄銅箔上之相對較厚的可移除銅背襯箔層之底部表面，電路板視情況具有施加至背對底部表面之頂部表面的頂部表面薄銅箔，其後電路板具有自頂部表面至底部薄銅箔形成但不穿透薄銅箔之經雷射鑽孔盲孔，銅背襯箔具有足夠厚度以藉由將熱能耦合至背襯箔及背襯箔之周圍區域來防止由雷射產生之熱量燒蝕第一薄銅箔。隨後在對孔或通孔孔隙鑽孔完成後即移除背襯箔。經燒蝕通孔孔隙及任何穿通孔具有催化性內部表面，諸如藉由使用催化性介電層壓物，或藉由在去污操作期間將催化劑施加至經暴露通孔孔隙表面。其後使電路板暴露於諸如銅之金屬離子之無電極電鍍浴液，該等金屬離子與存在於通孔孔隙中之催化性粒子結合且擴散，直至在通孔孔隙表面及穿通孔孔隙表面中以及在銅箔區域中獲得連續沉積，從而產生均勻導電表面以用於後續電鍍。接著塗覆經圖案化抗蝕劑，其防止來自後續電鍍操作之沉積形成於由抗蝕劑覆蓋之區域中。使用連續導電表面及不具有抗蝕劑之經暴露區域，電路板在電鍍步驟中用作電極，該電鍍步驟經執行直至無電極銅沉積達至抗蝕劑之深度，或典型地小於抗蝕劑厚度之期望深度。鍍錫步驟隨後使錫沉積在經暴露銅表面上，該錫充當用於後續銅蝕刻操作的蝕刻遮罩，其後剝離光阻，保留經錫遮罩之銅及經暴露銅。對經暴露銅之快速蝕刻移除包含薄底部銅箔及在經圖案化光阻區域中之視情況選用之頂部銅箔的經暴露銅。在於快速蝕刻步驟中移除經暴露銅(其使得經錫遮罩之銅未改變)之後，視情況對錫進行蝕刻。所得通孔以導電方式插入且以機械方式小於藉由先前技術方法產生之通孔。
圖1A、圖1B、圖1C、圖1D、圖1E、圖1F、圖1G、圖1H、圖1I、圖1J、圖1K、圖1L、圖1M及圖1N展示用於形成多層板或兩層電路板之內部層之跡線及點通孔的標準線寬方法之處理步驟的橫截面視圖。
圖2A、圖2B、圖2C、圖2D、圖2E、圖2F、圖2G、圖2H、圖2I及圖2J展示用於形成多層板或兩層電路板之內部層的跡線及點通孔之處理步驟的橫截面視圖。
圖3A、圖3B、圖3C、圖3D、圖3E、圖3F、圖3G及圖3H展示多層精確線寬方法之處理步驟的橫截面視圖。
圖4A、圖4B、圖4C、圖4D、圖4E、圖4F、圖4G及圖4H展示用於使用催化性層壓物在多層板或兩層板之內部層上形成跡線及通孔之處理步驟的橫截面視圖。
圖5A、圖5B及圖5C展示使用催化性層壓物的多層板精確線寬方法之處理步驟的橫截面視圖。
圖1A展示具有視情況選用之頂部表面箔104A及底部表面箔104B之介電質102的橫截面，其大約為0.3密耳(7.5u)厚。介電質102包含增強纖維與環氧樹脂之混合物。許多不同材料可用於預浸體纖維，包括編織玻璃纖維織物、碳纖維或其他纖維，且多種不同材料可用於樹脂，包括環氧樹脂、聚醯亞胺樹脂、氰酸酯樹脂、PTFE(鐵氟龍)摻混樹脂或其他樹脂。諸如銅之導體的沉積可使用兩種不同電鍍技術來執行。在第一種無電極電鍍技術中，藉由將樹脂與吸引銅離子之催化性粒子混合而形成介電層。無電極金屬銅沉積之速率比電鍍更慢，但沉積發生於具有經暴露催化性粒子之所有表面上以及具有經 暴露銅之表面上。電鍍提供較快銅沉積速率，此係因為其利用經置放於電解浴液中、具有正電壓之犧牲性銅陽極，其中待電鍍表面連接至負電壓。銅作為金屬離子經由電解質自陽極遷移至陰極表面。在本實例中，陰極表面為需銅電鍍之PCB。電鍍需要所有表面具有公共電勢，其典型地使用預存在銅箔或對具有經暴露催化性粒子之介電表面的前述無電極電鍍步驟來實現，直至整個板上之連續電導率允許板用作陰極，視需要用於陽極銅源極。無電極電鍍可在.06密耳(1.5u)至0.12密耳(3u)之範圍內以為電鍍提供充足表面導電性。
雖然本說明書關注使用催化劑形成銅通孔及跡線以用於無電極銅形成，但應理解，本發明之範圍可延伸至適用於無電極電鍍及電鍍之其他金屬。對於銅(Cu)之無電極沉積，雖然元素鈀(Pd)較佳作為催化劑，但仍選擇元素週期表過渡金屬元素，諸如第9至11族鉑(Pt)、銠(Rh)、銥(Ir)、鎳(Ni)、金(Au)、銀(Ag)、鈷(Co)或銅(Cu)或此等元素之其他化合物，包括諸如鐵(Fe)、錳(Mn)、鉻(Cr)、鉬(Mo)、鎢(W)、鈦(Ti)、錫(Sn)之其他金屬或以上之混合物或鹽，其中任一者可用作催化性粒子。本候選清單意欲為例示性而非全面性的，亦可使用本領域中已知用於吸引銅離子之其他催化劑。在本發明適用於催化性層壓物中之一個實例中，催化性粒子為均相催化性粒子。在形成催化性層壓物之本發明的另一實例中，催化性粒子為無機粒子或經塗佈有幾埃厚度之催化性金屬的抗高溫塑膠粒子，從而形成具有囊封非催化性內部粒子之薄催化性外部表面的非均相催化性粒子。此調配物可期望用於較大催化性粒子，諸如最長尺寸為約25u之彼等。此調配物之非均相催化性粒子可包含諸如二氧化矽(SiO2)之無機、有機或惰性填充劑，諸如高嶺土之無機黏土，或塗佈於具有諸如藉由氣相沉積或化學沉積而吸附於填充劑之表面上的催化劑(諸如鈀)之表面上的高溫塑膠填充劑。催化劑之僅幾個原子層要求催化性粒子具有有助於無電極電鍍之期望特性。
在形成非均相催化性粒子之一個實例中，填充劑(有機或無機)之浴液按大小分類包括大小小於25u之粒子，將此等經分類無機粒子混合至罐中之含水浴液中，攪動，且隨後將諸如PdCl之鈀鹽(或諸如其他催化劑之銀鹽之任何其他催化劑)與諸如HCl之酸及諸如水合肼之還原劑一起引入，由此，還原塗佈無機粒子之金屬Pd的混合物提供塗佈於填充劑上的幾埃厚度之Pd，從而與使用均相Pd金屬粒子相比，在極大地降低Pd之體積要求的情況下，產生具有均相Pd粒子之催化性特性之非均相催化性粒子。然而，對於約幾nm之極小催化性粒子，均相催化性粒子(諸如純Pd)可為較佳的。
實例無機填充劑包括黏土礦物，諸如含水頁矽酸鋁，其可含有可變量之鐵、鎂、鹼金屬、鹼土及其他陽離子。實例無機填充劑之此族包括二氧化矽、矽酸鋁、高嶺石(Al2Si2O5(OH)4)、聚矽酸鹽或屬於高嶺土或瓷土族之其他黏土礦物。實例有機填充劑包括PTFE(鐵氟龍)及具有高溫抗性之其他聚合物。
鈀鹽之實例為：BrPd、CL2Pd、Pd(CN)2、I2Pd、Pd(NO2)2*2H2O、Pd(NO3)2、PdSO4、Pd(NH2)4Br2、Pd(NH3)4Cl2H2O。本發明之催化性粉劑亦可含有非均相催化性粒子(例如塗佈在無機填充劑粒子上之催化性材料)、均相催化性粒子(諸如元素鈀)以及非催化性粒子(選自無機填充劑之族)之混合物。
在催化劑當中，鈀因其相對之經濟性、可用性及機械特性而為較佳催化劑，但仍可使用其他催化劑。
樹脂可為聚醯亞胺樹脂、環氧樹脂與氰化物酯之摻混物(其在高溫下提供固化)或在塗佈期間具有視情況選用之黏度且在冷卻後具有加熱固化特性之任何其他合適的樹脂調配物。可添加阻燃劑例如以符合可燃性標準，或與諸如FR-4或FR-10之標準FR預浸體系列中之一者相容。對於高速電路之額 外要求為介電常數s(電容率)，其通常為大約4且決定形成於介電質上之傳輸線的特徵阻抗，以及損耗角正切5，其為在一定距離上之頻率依賴型能量吸收之量測，由此損耗角正切為介電質如何與高頻電場相互作用以將信號幅值不當地減少每cm傳輸線長度的可計算量之dB的量測。將樹脂與已按大小分類之催化性粒子摻混。在調配物之一個實例中，催化性粒子包括以下各者中之至少一者：均相催化性粒子(金屬鈀)，或非均相催化性粒子(塗佈在無機粒子或高溫塑膠上之鈀)，且對於任一調配物，催化性粒子較佳地具有小於25u之最大尺寸且具有50%計數之大小在12u與25u之間，或範圍1至25u或小於25u的粒子。此等為並不意圖限制本發明之範圍的實例催化性粒度實施例。在一個實例實施例中，催化性粒子(均相或非均相)在1u至25u之大小範圍中。在本發明之另一實例中，均相催化性粒子藉由將金屬鈀研磨為粒子且使所得粒子穿過帶具有25u矩形開口之目的篩而形成，以使得選擇所有催化性粒子小於25u，且研磨操作判定粒子在最小尺寸方向上之縱橫比。縱橫比小於2：1為較佳的，但本實例實施例不限於彼範圍，且催化性粒子可為非均相或均相催化性粒子。在另一實例中，催化性樹脂混合物106藉由將均相或非均相催化性粒子以諸如實質上12重量%催化性粒子比樹脂之重量之比率的一定重量比率摻混至預浸體樹脂中而形成。按催化性粒子在樹脂混合物中之重量計的比率可替代地介於催化性粒子重量比樹脂之總重量的8%至16%的範圍內。應理解，亦可使用其他摻混比率，且其可較佳使用較小粒子。在本發明之一個實例中，催化性粒子密度經選擇以提供催化性粒子之間的約3u至5u的平均距離。
圖1A介電質102面向頂部箔104A及底部箔104B。圖1B展示雷射鑽孔方法，由此孔隙106藉由大功率光學能量之施加而形成，該大功率光學能量諸如來自雷射，其充分地升高箔104A及介電質102之溫度以燒蝕(汽化)銅102及介電質104直至達至底部表面104B。提供成功後續電鍍之雷射鑽孔的典型 縱橫比(通孔之深度除以直徑)在大約0.5至1.0之範圍內。圖1B中之雷射鑽孔106的目標為提供小尺寸通孔以供後續用於互連自第一箔104B至第二箔104A形成之跡線。箔104B之厚度涉及跡線寬度，箔104A、104B越厚，所得跡線將越寬，且跡線越寬，在後續跡線圖案步驟期間使用之乾膜越厚。隨著對薄銅箔104B之需要一起出現的係底部銅箔104B具有足夠厚度以耐受雷射鑽孔步驟106之熱耗散要求。相應地，第一銅表面104B之厚度由經受孔106之雷射鑽孔而不使下部箔104B斷裂所需之最小厚度決定，其亦限制所得跡線之線寬及間距可如何窄。
用於移除表面銅及底層介電質的對孔及通孔之鑽孔可藉由雷射剝蝕來進行，其中催化性預浸體之溫度立即升高直至催化性預浸體汽化。可能較佳使用具有帶正經燒蝕之預浸體材料之此光學波長的低反射性及高吸收性之波長的雷射，諸如紫外輻射(UV)波長。此類UV雷射之實例為UV準分子雷射或釔鋁石榴(YAG)雷射，由於用於形成精確機械深度之溝道且具有輪廊分明之側壁的窄光束直徑及高可用功率，故其亦為優良選擇。
對於非催化性層壓物，經鑽孔通孔可接受已知為「去污」之催化性表面處理以實現無電極電鍍。附圖之典型去污方法包括用以經由劇烈氧化而移除殘留物之高錳酸處理，中和高錳酸之中和劑處理，用於實現無電極銅電鍍之諸如鈀的表面催化劑的應用，其後有可能執行無電極電鍍步驟從而使用銅塗佈通孔及穿通孔表面以用於使頂部銅箔連接至底部銅箔。可替代地，可將催化性粒子添加至介電質之樹脂以形成催化性介電質，針對該催化性介電質，可僅使用清潔操作對經鑽孔之孔執行無電極電鍍。
圖1C展示後續無電極電鍍步驟完成。無電極電鍍厚度108為均勻塗佈經鑽孔通孔106所需之最小值且提供與箔層104A及104B之電連接以用於圖1E中所示之後續電鍍操作。
圖1D展示圖案化步驟，由此抗蝕劑110A塗覆於頂部表面104A上且毯式抗蝕劑塗覆110B至底部表面104B。圖1D之抗蝕劑(亦已知為藉由暴露於光學能量而形成之圖案的光阻)或遮罩(形成期望圖案之機械障壁)110A及110B或圖2F之抗蝕劑210A及210B可為液體光阻、乾膜光阻、金屬遮罩或與周圍經暴露銅之蝕刻速率相比具有低蝕刻速率之其他遮罩材料。光阻厚度典型地基於銅/光阻蝕刻選擇性來選擇，以使得經由蝕刻對銅的移除在蝕刻結束時保留充足抗蝕劑。典型乾膜厚度在0.8至2.5密耳(20至64u)之範圍內，且乾膜厚度經選擇以與已完成跡線之線(跡線寬度)/間距(跡線之間的間隙)解析度相稱。舉例而言，0.8密耳之乾膜厚度可用於1至1.5密耳跡線/間距要求，1.2密耳乾膜可用於1.1至2密耳跡線/間距，且1.5密耳乾膜可用於1.75至2.5密耳線/間距要求。當電鍍如步驟1E中所示而發生時，僅經暴露銅區域接受銅沉積112，其形成已知為「點通孔」之某物(其中隨後形成跡線)。
圖1F展示第一平滑化步驟之結果，由此自原始層114部分移除過量銅及光阻達至新平面水平，其中點通孔112-1之高度連同抗蝕劑110A-1一起減小。表面平滑化可以許多不同方式實現，例如在板與平坦表面之間經輕微壓力及直線或旋轉攪動使用塗覆於平坦表面上之420至1200磨粒研磨劑以提供研磨操作。可使用用於平坦化表面之其他方法，包括使用化學方法、機械方法或用於形成平坦表面之其他方法來研磨或切削。底部表面抗蝕劑110B並不平滑，因為此方法僅意圖用於形成點通孔。
圖1G展示抗蝕劑剝離步驟，其中使用溶劑或電漿灰化方法來移除圖1F之抗蝕劑110A-1及110B。
圖1H展示第二平滑化步驟，由此使圖1G之底座點通孔區域112-1經平坦化以降至箔表面104A。執行步驟1F之中間平坦化的原因為避免將金屬及光阻研磨至箔表面104A上。藉由在兩步法中執行此平坦化，第一平坦化1F在 圖1H之最終平坦化期間提供均勻表面及較少材料以便移除。
圖1I展示穿通孔116之鑽孔，其後為圖1J中使銅沉積於孔穴116之內部表面上之無電極電鍍，步驟1K中的圖案抗蝕劑118至一個或兩個面的應用，且步驟1L中的電鍍，該電鍍在經暴露銅表面(依靠在提供單電極之經暴露電鍍銅之頂部及底部毯式層)及經電鍍穿通孔120之內部表面上形成跡線。經暴露電鍍銅區域隨後因無任何經暴露銅上之蝕刻抗蝕劑由抗蝕劑覆蓋而接受錫薄層電鍍。
圖1M展示在剝離抗蝕劑118之後的板，該板亦可用於形成與通孔120之互連跡線(圖中未示)。此時，通孔120具有經鍍錫之表面區域(從而抵抗諸如氯化銨或硫酸銨之氨基銅蝕刻劑)及在表面104A及104B上之相對較薄的經暴露銅無電極沉積物(及底層箔)，其使用諸如氨基蝕刻劑之銅蝕刻劑來蝕刻，從而產生圖1N中所示之結果。亦使用諸如硝酸之蝕刻劑蝕刻掉錫之薄沉積物，保留銅跡線(圖中未示)，穿通孔，且作為圖1N中所示之通孔。
圖2A至圖2J展示用於形成約3.5密耳直徑(視情況在2至5密耳之範圍內)之通孔及約1密耳寬度及1密耳間距之跡線的替代方法，其極大地改良一系列圖1A至圖1N中所示出之步驟的大約3密耳線寬能力，且其中所需步驟之數目減少。圖2A展示與頂部薄箔204A及保護薄箔204A之背襯箔203一起層壓之介電質202。類似地，薄底部箔204B連同與薄背襯箔204B緊密接觸之可移除背襯箔205一起經層壓至介電質202上。薄頂部箔204A及薄底部箔204B大約為0.12至0.15密耳(3u至4u)厚且與背襯箔203及205分層，每一背襯箔具有大約.75密耳(18u)之厚度。雖然底部背襯箔205對於圖2C之雷射鑽孔步驟至關重要，但頂部背襯箔203可在步驟2E之無電極電鍍之前的任何時間處自薄箔204A移除。圖2B展示圖2A之詳細區域207，其展示介電質202、薄底部銅箔204B及相對較厚之背襯箔205。在本發明之一個實例中，薄底部箔204B及背襯箔205以薄片形 式提供，且在諸如350至400℉之高溫及諸如200至250PSI之壓力下連同頂部箔204A一起層壓至催化性層壓物202上，從而以機械方式使頂部箔204A及底部箔204B附接至催化性介電質202。用於將箔204A及204B接合至層壓物202之層壓步驟並不改變移除背襯銅箔205之容易程度，該背襯銅箔205在圖2C之雷射鑽孔操作期間充當薄箔204B之散熱片。
圖2C展示諸如藉由雷射燒蝕鑽出盲孔206，以及諸如藉由雷射燒蝕或機械鑽出穿通孔216之結果。如前所述，藉由雷射燒蝕或鑽孔操作之盲孔的縱橫比應在大約0.5至1之範圍內。圖2D展示在諸如藉由自底部薄箔204B剝離背襯箔205而移除圖2C之下部背襯箔205之後的電路板層。如在圖1B中，雷射燒蝕或鑽孔操作可後接用於非催化性層壓物之「去污」操作，或層壓物自身可為催化性的，如前文所描述。確保使用雷射、機械手段或化學手段鑽出盲孔或穿通孔的任一種方法產生具有提供如圖2E中所示之無電極電鍍的經暴露表面催化性材料之孔隙。
圖2E展示在無電極銅沉積之後的橫截面視圖，其中無電極銅217沉積於盲孔206、穿通孔216及銅箔204A及204B之表面上。
圖2F展示在應用經圖案化抗蝕劑210A及210B之後的橫截面視圖，其中不具有光阻之區域為將形成跡線之區域。
圖2G展示在銅電電鍍步驟之後的橫截面視圖，該步驟使銅沉積於未由抗蝕劑隱藏之所有經暴露銅區域上，包括通孔、鑽孔壁及未由經圖案化光阻覆蓋之任何其他銅跡線區域。
圖2H為鍍錫步驟，由此任何經暴露銅區域接受在後續銅蝕刻步驟期間充當蝕刻抗蝕劑之薄錫板。
圖2I展示在剝離抗蝕劑之後的橫截面視圖，且圖2J展示在蝕刻經暴露銅(在圖2H之步驟中未塗佈有錫之區域)以及蝕刻經暴露錫之後的已完 成之電路板層，其保留點通孔220、跡線及經電鍍穿通孔216。
產生圖2J之兩層板的方法可經擴展以形成具有已知為「經堆疊通孔」之結構的多層板，其中單層之通孔具有0.5至0.1的縱橫比，同時提供儘可能多的所需層之連接，其中每一連續層之通孔與每一前述層之通孔軸向同心。圖3A至3H描述用於自中心芯體304形成多層電路板之額外處理步驟。
圖3A展示與圖2J之芯體相對應之兩層芯體304，其中存在經填充通孔及跡線。添加包含具有頂部箔310之介電質308的新頂部層302以及具有介電質312及底部箔314之底部層306。此等層亦可包括具有已移除背襯箔之薄箔。圖3B展示新頂部層302及新底部層306經雷射鑽孔之通孔320、322、324、326，且圖3C展示通孔之內部表面328，其藉由去污操作(其將催化性粒子添加至經鑽孔通孔之內部表面)具有經暴露之催化粒子或具有在新頂部層302介電質及新底部層介電質306中的藉由步驟3B之鑽孔操作暴露的催化性粒子。
圖3D展示無電極電鍍沉積330，且圖3E展示將圖案抗蝕劑340添加至新頂部層及新底部層。圖3F展示形成經填充通孔及跡線之電鍍沉積342的結果，且圖3G展示經剝離抗蝕劑340。圖3H展示最終所得4層板，其中經堆疊通孔在彼此上方及下方互連，且通孔及跡線藉由分別展示於圖式中但充當單個均勻電性層之層342、330及310形成。圖3A至圖3H之方法步驟可迭代地重複以在每一迭代時添加兩個額外層，其中將圖3H之所得最後步驟視為用於以圖3A至3H開始的下一處理迭代之新芯體。出於理解結構之清楚起見而放大跡線與介電層厚度之相對比例。
圖4A至圖4J展示使用半加成方法形成之內部芯體電路層的橫截面視圖，其中使用具有富樹脂表面之特性的催化性層壓基板402來形成頂部層跡線，除非溝道形成至催化性層壓物之表面中，否則該富樹脂表面不包括催化性粒子。催化性粒子一般均勻地分佈於低於每一表面下方之排阻深度的催化性 層壓物中。在圖4A中，催化性層壓物之頂部表面係裸露的，且催化性層壓物之底部表面具有薄箔404B及自銅形成之厚背襯405，薄箔404B層壓至催化性層壓物404B，其中厚背襯箔405提供熱量吸收能力，如先前針對圖2所描述。圖4B之細節407展示催化性層壓物402、薄箔404B及厚背襯箔405，其具有如先前針對圖2B所描述之各別尺寸。步驟4C展示經雷射鑽孔之孔406及穿通孔416，其中經鑽孔之孔隙使催化性層壓物402中之催化性粒子暴露，且隨後將形成跡線之溝道407形成至頂部表面中，其中溝道407足夠深以暴露並不存在於催化性層壓物之原表面中之底層催化性粒子直至低於催化性粒子排阻深度。通孔孔隙406將隨後使用諸如可商購的乙二胺四乙酸(EDTA)方法的「快速無電極銅」沉積方法，或利用硫酸銅、甲醛及氫氧化鈉之方法而非圖2G中所描述之電鍍方法經銅填充。出於此原因，通孔孔隙406較小，如大約2.5至3密耳直徑，以准許使用快速無電極銅方法來填充通孔。如圖2C中所描述，背襯箔405在通孔雷射鑽孔期間充當散熱片以防止薄底部箔404B在通孔406之雷射鑽孔期間穿透。在通孔406形成之後，移除背襯箔405，如圖4D中所示。
圖4E展示諸如EDTA方法之快速無電極銅浴的結果，其中頂部表面溝道407、穿通孔416內部表面及內部體積以及銅箔404B接受銅沉積417。通孔孔隙406亦在此步驟期間填充。
圖4F展示經圖案化底面抗蝕劑410及毯式頂面抗蝕劑411之應用，其覆蓋期望有銅跡線及通孔之區域。經暴露銅表面隨後在圖4G中蝕刻，其中其他區域受諸如乾膜410及411之抗蝕劑保護。在步驟4H中剝離抗蝕劑之後，兩面芯體完成，其中箔導體404B及經無電極電鍍區域417及經填充通孔406形成均相銅跡線及經填充通孔，進而形成可如圖5A至圖5C，或圖3A至圖3H中所示進一步層壓之已完成芯體。
圖5A至圖5C展示使用催化性層壓物508及510作為層壓至芯體 504的外部層之相似多層處理步驟，該芯體可使用圖2A至圖2J或圖4A至圖4J之方法形成。
圖5B展示具有藉由移除期望有跡線的區域中之表面層而形成於催化性層壓物之頂部及底部表面上之溝道512的圖5A之層壓物。視情況，圍繞每一通孔520、522、524及526移除材料之孔環。可藉由雷射燒蝕來移除表面材料，其中催化性預浸體508及510之溫度立即升高直至催化性預浸體汽化，同時保留周邊預浸體在結構上不變，但暴露底層催化性粒子。可能較佳使用具有帶正經燒剝蝕之預浸體材料之此光學波長的低反射性及高吸收性之波長的雷射，諸如紫外輻射(UV)波長。此類UV雷射之實例為UV準分子雷射或釔鋁石榴(YAG)雷射，由於用於形成精確機械深度之溝道且具有輪廊分明之側壁的窄光束尺寸及高可用功率，故其亦為優良選擇。實例雷射可以0.9至1.1密耳(23u至28u)直徑寬度移除材料，其中深度由雷射功率及在表面上之移動速度決定。用於形成溝道512及相關孔環之另一表面移除技術為電漿蝕刻，其可局部地進行或藉由製備具有不包括來自表面層508或510之電漿的經圖案化遮罩的表面來進行，諸如乾膜光阻或相比於催化性預浸體之蝕刻速率具有更低蝕刻速率之其他遮罩材料。光阻厚度典型地基於環氧樹脂/光阻蝕刻選擇性來選擇(以使得用以移除期望深度的固化環氧樹脂之電漿蝕刻在蝕刻結束時保留充足光阻)，或在用作電鍍遮罩之光阻的情況下，根據期望沉積厚度來選擇厚度。典型乾膜厚度在0.8至2.5密耳(20至64u)之範圍內。適用於蝕刻富樹脂表面之電漿包括與諸如氮(N)之惰性氣體混合的氧(O)與CF4電漿之混合物，或可添加氬氣(Ar)作為用於反應氣體之載氣。遮罩圖案亦可使用乾膜遮罩、金屬遮罩或具有孔隙之任何其他類型的遮罩形成。在使用機械遮罩的情況下，蝕刻抗蝕劑可使用以下各者中之任一者塗覆：光微影、網板印刷、模板印刷、刮板或塗覆蝕刻抗蝕劑之任何方法。用於移除預浸體之表面層的另一方法為機械研 磨，諸如線性或旋轉切割工具。在此實例中，預浸體可緊固於真空電鍍夾盤中，且旋轉切割機(或具有可移動真空板之固定切割機)可行進限定跡線(諸如由Gerber格式相片檔案之x、y座標對限定)之圖案。在移除表面材料之另一實例中，可使用水切割工具，其中在流體中夾帶有磨料粒子之水刀可沖射於表面上，進而移除表面下方之材料以暴露底層催化性粒子。此等方法中之任一者可單獨或組合使用以移除表面材料且使溝道512形成至催化性介電質508及510中，較佳地其中溝道延伸低於使催化性粒子暴露於表面下方之排阻深度。相應地，最小溝道深度為暴露底層催化性粒子所需之深度，其為固化催化性預浸體之特性，諸如根據亦由本發明人申請之美國專利第9,706,650號形成的催化性預浸體。由於催化性材料經由固化預浸體均勻分散至低於排阻深度，故最大溝道深度受催化性層壓物508、510之編織纖維(諸如玻璃纖維)織物之深度限制，其趨向於複雜化溝道清潔，此係因為纖維可能折斷且再沉積於意圖用於無電極電鍍之溝道中，或以其他方式干擾後續方法步驟。典型溝道深度為1密耳(25u)至2密耳(70u)。在移除表面材料以形成溝道510之後的最終步驟為清潔掉經移除之材料的任何粒子，其可使用超音波清潔，與界面活性劑混合之水刀或並不導致移除溝道512周圍之表面材料的任何其他清潔手段來實現。
通孔520、522、524、526隨後經鑽孔(諸如藉由雷射鑽孔)，較佳地為諸如2.5至3密耳之細徑以允許快速無電極電鍍在隨後步驟中填充通孔孔隙，且諸如藉由雷射燒蝕、水切割、電漿蝕刻或用於將催化性層壓物之表面層移除至低於排阻深度的任何其他形式而形成溝道512。在步驟5C中執行無電極電鍍，其使銅530沉積於其中表面材料已自催化性層壓物508、510移除之區域上，進而在溝道512、通孔520、522、524及526之內部表面中形成導電跡線530，將通孔孔隙填充至經添加層502及506之外部表面。圖5A至圖5C之方法步驟可迭代地重複以在每一迭代時添加兩個額外層，其中將圖5C之所得最後步驟 視為用於以圖5A至5C開始的下一處理迭代之新芯體。
本發明可以若干不同方式實踐。應理解，圖3A至圖3H之芯體(中心)電路層304或圖5A至圖5C之504可由圖2J之催化性或非催化性層壓物202或圖4J之催化性層壓物產生。以圖2J或圖4J之芯體電路層開始，可使用圖3A至圖3H之無電極及電鍍法或圖5A至5C之無電極電鍍法互換地添加外部層。
在本說明書中，「密耳」應理解為0.001吋，「大約」應理解為意謂小於大於4或小於4之因子，「實質上」應理解為意謂小於大於2或小於2之因子。值的「數量級」包括自值的0.1倍至值的10倍之範圍。一「密耳」應理解為.001吋。
一般用於印刷電路板製造之某一後處理操作未經展示，且可在根據新穎方法產生之板上使用先前技術方法來執行。此類操作包括用於改良焊料流動之鍍錫，用於改良導電性及降低腐蝕之金質快閃、阻焊操作、關於板之網板印刷資訊(部件編號、參考指定符等)、對已完成板進行刻痕或提供斷裂凸耳等。

Claims (21)

  1. 一種用於在層壓物上形成精確間距點通孔之方法，該層壓物具有接合至該層壓物之底部薄箔、鄰近於該底部薄箔之相對較厚背襯箔及視情況選用之薄頂部箔，該方法包含：穿過層壓物頂部表面至該底部薄箔雷射鑽出盲孔，視情況亦穿透該層壓物、底部薄箔及背襯箔鑽出穿通孔；移除該背襯箔；使用催化劑處理該經雷射鑽孔之通孔及經鑽孔之孔的表面；對視情況選用之頂部箔表面及底部箔表面、該等通孔之內部表面及該等視情況選用之經鑽孔之穿通孔之內部表面進行無電極電鍍；將經圖案化抗蝕劑塗覆在頂部及底部表面上；對電路板進行電鍍直至銅沉積至低於經圖案化抗蝕劑之水平；對電路板之經暴露銅區域進行鍍錫；剝離經圖案化抗蝕劑；將經暴露銅區域快速蝕刻至底層層壓物；視情況蝕刻鍍錫層。
  2. 如請求項1所述之方法，其中該底部薄箔或該視情況選用之頂部薄箔為厚度大約0.12密耳至0.15密耳之銅箔。
  3. 如請求項1所述之方法，其中該經雷射鑽孔之通孔的直徑小於5密耳。
  4. 如請求項1所述之方法，其中該無電極電鍍及該電鍍沉積銅。
  5. 如請求項1所述之方法，其中該催化劑為以下各者中之至少一者：鈀(Pd)、鉑(Pt)、銠(Rh)、銥(Ir)、鎳(Ni)、金(Au)、銀(Ag)、鈷(Co)、銅(Cu)、鐵(Fe)、錳(Mn)、鉻(Cr)、鉬 (Mo)、鎢(W)、鈦(Ti)或錫(Sn)。
  6. 如請求項1所述之方法，其中使用催化劑處理該等經雷射鑽孔之通孔及經鑽孔之孔之表面包含具有在該雷射鑽孔步驟期間暴露的催化性粒子之介電質。
  7. 如請求項1所述之方法，其中該無電極電鍍步驟使大約0.06密耳至0.12密耳厚度之銅沉積在該底部薄箔或該視情況選用之頂部薄箔上。
  8. 如請求項1所述之方法，其中該經圖案化抗蝕劑為經光學暴露之乾膜。
  9. 如請求項1所述之方法，其中該快速蝕刻步驟使用包含氯化銨或硫酸銨中之至少一者的銨基蝕刻劑。
  10. 一種用於在包含催化性層壓物之電路板上形成通孔及跡線之方法，該催化性層壓物具有接合至該催化性層壓物之底部薄箔、施加至該底部薄箔之相對較厚的可移除背襯箔及視情況選用之頂部箔，該催化性層壓物具有在已經鑽孔之表面上實現無電極電鍍之催化劑的粒子，該方法包含：穿過該催化性層壓物頂部表面至該底部薄箔而不穿透該底部薄箔雷射鑽出盲孔，視情況亦穿透該層壓物、底部薄箔及底部背襯箔鑽出穿通孔；移除該底部背襯箔；對該底部薄箔、視情況選用之頂部箔、通孔表面及穿通孔表面進行無電極電鍍以形成電連續之導電層；將經圖案化抗蝕劑施加至頂部及底部表面；電鍍該電路板直至銅在經暴露銅區域上沉積至低於該經圖案化抗蝕劑之水平；對該電路板之該等經暴露銅區域進行鍍錫；剝離經圖案化抗蝕劑； 蝕刻該經暴露銅區域直至移除經電鍍之銅及底層薄箔；視情況蝕刻鍍錫層；視情況將額外介電層及箔層層壓至該電路板之頂部或底部表面。
  11. 如請求項10所述之方法，其中該底部薄箔或該視情況選用之頂部薄箔為大約0.12至0.15密耳厚。
  12. 如請求項10所述之方法，其中使用催化劑處理該等經雷射鑽孔之通孔及經鑽孔之孔的表面包含具有在該雷射鑽孔步驟期間暴露的催化性粒子之介電質。
  13. 如請求項10所述之方法，其中該等催化性粒子包括以下各者中之至少一者：鈀(Pd)、鉑(Pt)、銠(Rh)、銥(Ir)、鎳(Ni)、金(Au)、銀(Ag)、鈷(Co)、銅(Cu)、鐵(Fe)、錳(Mn)、鉻(Cr)、鉬(Mo)、鎢(W)、鈦(Ti)或錫(Sn)。
  14. 如請求項10所述之方法，其中該抗蝕劑為經光學暴露以形成該經圖案化抗蝕劑之乾膜。
  15. 一種用於形成具有內部芯體及一或多對外部層之多層板的方法，該內部芯體形成於具有施加至介電質之頂部表面之薄頂部箔的該介電質上，該薄頂部箔相對表面視情況具有可移除之相對較厚的背襯箔，該介電質底部表面施加有薄底部箔，該薄底部箔相對表面與相對較厚之可移除背襯箔接觸，該內部芯體藉由以下步驟形成：穿過該介電質至該薄底部箔之深度而不穿透該薄底部箔雷射鑽出至少一個通孔，視情況鑽出至少一個穿通孔，該等經雷射鑽孔之通孔及視情況選用之穿通孔具有帶經暴露催化性粒子之表面； 其後對經暴露催化性粒子及該頂部薄銅箔及該薄底部銅箔進行無電極電鍍；其後塗覆經圖案化抗蝕劑以產生經暴露銅區域及隱藏銅區域；其後對該等經暴露銅區域進行電鍍；其後對該等經暴露銅區域進行鍍錫；其後剝離該經圖案化抗蝕劑；其後快速蝕刻該內部芯體直至預先隱藏之銅區域經蝕刻不含銅；藉由將介電層施加至該內部芯體之每一側而形成該外部層對，每一介電層之相對表面具有薄箔，對於每一外部層對：穿過該介電層至底層銅層雷射鑽出至少一個通孔及視情況選用之穿通孔；該等經雷射鑽孔之孔具有經暴露催化性粒子；對該經暴露薄銅箔及經暴露催化性粒子進行無電極電鍍；將經圖案化抗蝕劑塗覆至至少一個表面；電鍍該等經暴露表面；將錫電鍍至該等經電鍍區域上；剝離該經圖案化抗蝕劑；快速蝕刻該經暴露銅。
  16. 如請求項15所述之方法，其中該等箔層中之至少一者為大約0.12至0.15密耳厚。
  17. 如請求項15所述之方法，其中該等外部層通孔中之至少一者經堆疊在對應內部層通孔上。
  18. 如請求項15所述之方法，其中該蝕刻使用氨基蝕刻劑執行。
  19. 如請求項18所述之方法，其中該氨基蝕刻劑包括氯化銨或硫酸銨中之至少一者。
  20. 一種用於形成電路板芯體之方法，該電路板芯體具有帶層壓於底部表面上之薄箔的催化性層壓物，該薄箔鄰近於厚背襯箔；在該催化性層壓物之頂部表面中形成達至該薄箔但並不穿透該薄箔之通孔，該厚背襯箔足夠厚以防止熔融該薄箔，亦在該催化性層壓物之頂部表面中形成跡線溝道，該等跡線溝道具有充足深度以暴露該催化性層壓物中之底層催化性粒子；移除該厚背襯箔；對經暴露銅表面及具有經暴露催化性粒子之區域中的催化性層壓物進行無電極電鍍；將毯式抗蝕劑遮罩施加至整個頂部表面且將經圖案化抗蝕劑遮罩施加至該底部表面；蝕刻該底部表面之未由抗蝕劑遮罩覆蓋之該等經暴露區域；剝離該抗蝕劑遮罩。
  21. 一種用於自具有經填充通孔及跡線之中心芯體形成多層電路板之方法，該方法包含：將催化性層壓物層壓至該中心芯體之每一表面；在該催化性層壓物之暴露底層催化性粒子之外表面中形成溝道，且亦形成與底層通孔之軸同心的通孔，該等通孔在暴露底層經填充通孔之該催化性層壓物中形成；對該催化性層壓物進行無電極電鍍，進而在該等溝道中形成跡線且填充該催化性層壓物中的該等通孔以使得其與該經芯體填充之通孔電連續。
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