TW201732867A - 絕緣層上覆矽基板及其製造方法 - Google Patents

絕緣層上覆矽基板及其製造方法 Download PDF

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TW201732867A
TW201732867A TW105118832A TW105118832A TW201732867A TW 201732867 A TW201732867 A TW 201732867A TW 105118832 A TW105118832 A TW 105118832A TW 105118832 A TW105118832 A TW 105118832A TW 201732867 A TW201732867 A TW 201732867A
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semiconductor substrate
insulating layer
substrate
semiconductor
germanium
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肖德元
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上海新昇半導體科技有限公司
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Abstract

一種絕緣層上覆矽基板之製造方法，包括：提供一第一半導體基底；於該第一半導體基底之頂面形成一第一絕緣層，以便製成一第一半導體基板；對該第一半導體基板照射離子束，以便在距離該第一絕緣層之頂面的預定深度之處形成一重氫與氫氣摻雜層；提供一第二半導體基底；於該第二半導體基底之頂面形成一第二絕緣層，以便製成一第二半導體基板；將該第一半導體基板面對面地接合於該第二導體體基板；對該第一半導體基板以及該第二半導體基板進行退火；以及將部分的第一半導體基板與該第二半導體基板分離，以便形成一摻雜有重氫與氫氣的半導體層於該第二半導體基板之上。

Description

絕緣層上覆矽基板及其製造方法
本發明有關於一種絕緣層上覆矽基板及其製造方法。
近年來，已經有業界利用絕緣材料表面形成單晶半導體層的絕緣層上覆矽(SOI)基板來代替使用大塊狀矽晶圓於半導體積體電路的製造之中。因為使用SOI基板的優點在於可以減少電晶體的汲極與基板之間的寄生電容，藉此提高半導體積體電路的效能。
關於半導體元件的製造方法，例如美國公告專利第5374564號係藉由離子值入法對矽晶圓進行氫離子植入，並在預定深度之處形成離子植入層。接下來，將植入有氫離子的矽晶圓與另一片矽晶圓接合，且於兩片矽晶圓之間插置有氧化矽膜。之後，經過熱處理，以離子植入層作為分裂面，且在植入有氫離子的矽晶圓以薄膜狀分離。藉此可在接合的矽晶圓之上形成單晶矽層。例如美國公告專利第5872387號係藉由在重氫環境下對於已經生長好閘極氧化物的基板進行退火，以便消除閘極氧化物與基板之間的懸浮鍵(dangling bond)。然而此方法必須在很高的重氫環境氣壓進行，因而導致製造成本的提高。
有鑑於此，目前有需要一種改良的絕緣層上覆矽基板的製造方法，至少可改善上述的缺失。
本發明提供一種絕緣層上覆矽基板及其製造方法，可以減少電晶體的汲極與基板之間的寄生電容，以及降低製造成本。
依據本發明一實施例，提供一種絕緣層上覆矽基板之製造方法，包括：提供一第一半導體基底；於該第一半導體基底之頂面形成一第一絕緣層，以便製成一第一半導體基板；對該第一半導體基板照射離子束， 以便在距離該第一絕緣層之頂面的預定深度之處形成一重氫與氫氣摻雜層；提供一第二半導體基底；於該第二半導體基底之頂面形成一第二絕緣層，以便製成一第二半導體基板；將該第一半導體基板面對面地接合於該第二導體體基板；對該第一半導體基板以及該第二半導體基板進行退火；以及將部分的第一半導體基板與該第二半導體基板分離，以便形成一摻雜有重氫與氫氣的半導體層於該第二半導體基板之上。
所述的絕緣層上覆矽基板之製造方法，其中該第一半導體基底包含IV族元素、SiGe、III-V族化合物、III族-氮化合物或II-VI族化合物。
所述的絕緣層上覆矽基板之製造方法，其中該預定深度介於0.01um至5um。
所述的絕緣層上覆矽基板之製造方法，其中該離子束的加速電壓介於1keV至200keV，而該離子束之摻雜劑量介於1016(離子個數/cm2)至2x1017(離子個數/cm2)。
所述的絕緣層上覆矽基板之製造方法，其中該第二半導體基底包含IV族元素、SiGe、III-V族化合物、III族-氮化合物或II-VI族化合物。
所述的絕緣層上覆矽基板之製造方法，其中該第一半導體基板以及該第二半導體於介於攝氏200度~400度進行接合。
所述的絕緣層上覆矽基板之製造方法，其中該第一半導體基板以及該第二半導體基板進行接合之步驟更包括：潤濕該第一絕緣層以及該第二絕緣層；將潤濕後的該第一絕緣層與該第二絕緣層相互接觸；以及施壓於相互接觸的該第一絕緣層以及該第二絕緣層，使得該第一絕緣層接合於該第二絕緣層之上。
所述的絕緣層上覆矽基板之製造方法，其中該退火步驟更包括：先加熱該第一半導體基板以及該第二半導體基板至攝氏600度~900度；接著冷卻該第一半導體基板以及該第二半導體基板至攝氏400度~600度。
所述的絕緣層上覆矽基板之製造方法，其中冷卻該第一半導體基板以及該第二半導體基板的時間介於30分鐘~120分鐘。
所述的絕緣層上覆矽基板之製造方法，其中該摻雜有重氫與氫氣的半導體層的厚度介於50埃~50000埃。
所述的絕緣層上覆矽基板之製造方法，更包括該第一半導體基板分離於該第二半導體基板之後，再度加熱該第二半導體基板至攝氏10000度。
所述的絕緣層上覆矽基板之製造方法，其中加熱該第二半導體基板之時間介於30分鐘~8小時。
依據本發明一實施例，提供一種絕緣層上覆矽基板，包括：一半導體基底；一絕緣層，該絕緣層接合於該半導體基板之頂面；以及一摻雜有重氫與氫氣的半導體層，該摻雜有重氫與氫氣的半導體層接合於該絕緣層之頂面。
所述的絕緣層上覆矽基板，其中該半導體基底包含有IV族元素、SiGe、III-V族化合物、III族-氮化合物或II-VI族化合物。
所述的絕緣層上覆矽基板，其中該摻雜有重氫與氫氣的半導體層的厚度介於50埃~50000埃。
100‧‧‧第一半導體基底
102‧‧‧頂面
104‧‧‧第一絕緣層
106‧‧‧第一半導體基板
108‧‧‧重氫與氫氣離子束
110‧‧‧頂面
112‧‧‧重氫與氫氣摻雜層
200‧‧‧第二半導體基底
202‧‧‧頂面
204‧‧‧第二絕緣層
206‧‧‧第二半導體基板
300‧‧‧重氫與氫氣摻雜氣泡區塊
400‧‧‧半導體層
第1圖為繪示本發明提供的絕緣層上覆矽基板的製造方法的流程圖。
第2A-2H為繪示製造絕緣層上覆矽基板的剖視圖。
下面結合說明書附圖和優選實施例對本發明作進一步的描述，但本發明的實施方式不限於此。
參閱第1圖，為提供一實施例的絕緣層上覆矽基板的製造方法，包括下列步驟：
S101：提供一第一半導體基底
S102：形成一第一絕緣層於第一半導體基底之頂面，以便製成一第一半導體基板；
S103：以重氫與氫氣為來源氣體，對第一半導體基板照射重氫與氫氣離子束，以便在距離第一絕緣層之頂面的預定深度之處形成一重氫與氫氣摻雜層；
S104：提供一第二半導體基底；
S105：形成一第二絕緣層於第二半導體基底之頂面，以便製成一第二半導體基板；
S106：將第一半導體基板面對面地接合於該第二半導體基板；
S107：對相互接合的第一半導體基板與第二半導體基板進行退火；
S108：將部分的第一半導體基板與該第二半導體基板分離；以及
S109：形成一摻雜有重氫與氫氣的半導體層於第二半導體基板之上。
S110：回收利用分離後的第一半導體基板。
為了更具體地闡述第1圖的絕緣層上覆矽基板的製造方法，請參照第2A-2G圖，為提供本發明一實施例所提供的製造絕緣層上覆矽基板的剖視圖。
首先，參照第2A圖，製備一第一半導體基底100，其中第一半導體基底100的材料可包含IV族元素、SiGe、III-V族元素、III族-氮化合物或II-VI族化合物。在本實施例中，第一半導體基底100使用單晶矽。在其他實施例中，當第一半導體基底100的材料為SiGe時，Ge的重量百分比介於5%~90%。
接下來，參照第2B圖，於該第一半導體基底100之頂面102形成一第一絕緣層104，以便製成一第一半導體基板106，其中第一絕緣層104的材料可包含SiO2、SiN或AlN。在本實施例中，第一絕緣層104使用SiO2，且其厚度大約介於0.1nm~500nm。
接著，參照第2C圖，以重氫與氫氣作為來源氣體，透過電場作用而產生來源氣體的電漿，並從電漿中取出包含在電漿中的離子來予以生成來源氣體的離子束，對第一半導體基板106照射重氫與氫氣離子束108，以便於距離第一絕緣層104之頂面110的預定深度H之處形成一重氫與氫氣摻雜層112，該預定深度H可藉由重氫與氫氣離子束108的加速能量以及入射角來控制，至於加速能量可藉由加速電壓以及摻雜劑量來控制。 在本實施例中，預定深度H介於0.1um~5um，加速電壓介於1keV~200keV，而氫離子束的摻雜劑量介於1016(離子個數/cm2)~2x1017(離子個數/cm2)。
下面，參照第2D圖，製備一第二半導體基底200，其中第二半導體基底200的材料可包含IV族元素、SiGe、III-V族化合物、III族-氮化合物或II-VI族化合物。在本實施例中，第二半導體基底200的材料為單晶矽。
接下來，參照第2E圖，於該第二半導體基底200之頂面202形成一第二絕緣層204，以便製成一第二半導體基板206，其中該第二絕緣層204可包含SiO2、SiN或AlN。在本實施例中，第二絕緣層204使用SiO2，且其厚度大約介於0.05nm至10nm。
接著，參照第2F圖，將第一半導體基板106面對面地接合(bonding)於第二半導體基板206。在本實施例中，採用親水性接合(hydrophilic bonding)之方式，接合時的溫度介於攝氏200度~400度，其中接合的詳細步驟更包括：首先濕潤第一絕緣層104與第二絕緣層204；接著將濕潤後的第一絕緣層104與第二絕緣層204相互接觸；以及最後施壓於第一絕緣層104與第二絕緣層204，使得第一絕緣層104與第二絕緣層204緊密地相互接合。
下面，參照第2G圖，對相互接合的第一半導體基板106以及該第二半導體基板206進行退火(annealing)，而退火的詳細步驟包括：首先加熱該第一半導體基板106與第二半導體基板206至攝氏600度~900度；接著，冷卻第一半導體基板106與第二半導體基板206至攝氏400度~600度，而冷卻時間大約30分鐘~120分鐘。經過退火後，原本相連的重氫與氫氣摻雜層112會分裂為複數個相互間隔的重氫與氫氣摻雜氣泡區塊300(Bubble formation)。
接著，參照第2H圖，將部分的第一半導體基板106與該第二半導體基板206分離，以便形成一包含有該些重氫與氫氣摻雜氣泡區塊300的半導體層400於相互接合的第一絕緣層104與第二絕緣層204之上。
值得一提的，分離後的第一半導體基板106，更可進一步進行化學機械研磨(CMP)與清洗(clean)，使得分離後的第一半導體基板106得以回收利用，達到節省成本之效果。至於接合有半導體層400的第二半導 體基板206可進行再度加熱至攝氏10000度，而再度加熱時間介於30分鐘~8小時。
由於懸浮鍵(dangling bond)含有極高的活性，容易形成陷阱中心(trap center)，造成電子電洞對的再度結合，因而降低半導體元件對於熱載子效應載子的恢復力。藉由本發明所提供的絕緣層上覆矽基板來製造半導體元件，除了可以減少電晶體的汲極與基板之間的寄生電容之外。將來於絕緣層上覆矽基板生長閘極氧化物時，摻雜於基板內的重氫原子會向外擴散至閘極氧化物與該基板之間的介面與半導體原子共價鍵結(covalently bound)，以便消除懸浮鍵而有效率地提升半導體元件對於熱載子效應(hot carrier effect)載子的恢復力(resilience)。再者，由於不需要很高的重氫氣壓，製造成本大大降低。
以上所揭露的僅為本發明的優選實施例而已，當然不能以此來限定本發明之權利範圍，因此依本發明申請專利範圍所作的等同變化，仍屬本發明所涵蓋的範圍。
流程圖無符號標示

Claims (15)

  1. 一種絕緣層上覆矽基板之製造方法，包括：提供一第一半導體基底；於該第一半導體基底之頂面形成一第一絕緣層，以便製成一第一半導體基板；對該第一半導體基板照射離子束，以便在距離該第一絕緣層之頂面的預定深度之處形成一重氫與氫氣摻雜層；提供一第二半導體基底；於該第二半導體基底之頂面形成一第二絕緣層，以便製成一第二半導體基板；將該第一半導體基板面對面地接合於該第二導體體基板；對該第一半導體基板以及該第二半導體基板進行退火；以及將部分的第一半導體基板與該第二半導體基板分離，以便形成一摻雜有重氫與氫氣的半導體層於該第二半導體基板之上。
  2. 如請求項1所述的絕緣層上覆矽基板之製造方法，其中該第一半導體基底包含IV族元素、SiGe、III-V族化合物、III族-氮化合物或II-VI族化合物。
  3. 如請求項1所述的絕緣層上覆矽基板之製造方法，其中該預定深度介於0.1um至5um。
  4. 如請求項1所述的絕緣層上覆矽基板之製造方法，其中該離子束的加速電壓介於1keV至200keV，而該離子束之摻雜劑量介於1016(離子個數/cm2)至2x1017(離子個數/cm2)。
  5. 如請求項1所述的絕緣層上覆矽基板之製造方法，其中該第二半導體基底包含IV族元素、SiGe、III-V族化合物、III族-氮化合物或II-VI族化合物。
  6. 如請求項1所述的絕緣層上覆矽基板之製造方法，其中該第一半導體基板 以及該第二半導體基板在介於攝氏200度~400度面對面地進行接合。
  7. 如請求項1所述的絕緣層上覆矽基板之製造方法，其中該第一半導體基板以及該第二半導體基板面對面地接合之步驟更包括：潤濕該第一絕緣層以及該第二絕緣層；將潤濕後的該第一絕緣層與該第二絕緣層相互接觸；以及施壓於相互接觸的該第一絕緣層以及該第二絕緣層，使得該第一絕緣層接合於該第二絕緣層之上。
  8. 如請求項1所述的絕緣層上覆矽基板之製造方法，其中該退火步驟更包括：先加熱該第一半導體基板以及該第二半導體基板至攝氏600度~900度；接著冷卻該第一半導體基板以及該第二半導體基板至攝氏400度~600度。
  9. 如請求項8所述的絕緣層上覆矽基板之製造方法，其中冷卻該第一半導體基板以及該第二半導體基板的時間介於30分鐘~120分鐘。
  10. 如請求項1所述的絕緣層上覆矽基板之製造方法，其中該摻雜有重氫的半導體層的厚度介於50埃~50000埃。
  11. 如請求項1所述的絕緣層上覆矽基板之製造方法，更包括該第一半導體基板分離於該第二半導體基板之後，再度加熱該第二半導體基板至攝氏10000度。
  12. 如請求項11所述的絕緣層上覆矽基板之製造方法，其中再度加熱該第二半導體基板之時間介於30分鐘~8小時。
  13. 一種絕緣層上覆矽基板，包括：一半導體基底；一絕緣層，該絕緣層接合於該半導體基板之頂面；以及一摻雜有重氫與氫氣的半導體層，該摻雜有重氫與氫氣的半導體層接合於該絕緣層之頂面。
  14. 如請求項13所述的絕緣層上覆矽基板，其中該半導體基底包含有IV族元素、SiGe、III-V族化合物、III族-氮化合物或II-VI族化合物。
  15. 如請求項13所述的絕緣層上覆矽基板，其中該摻雜有重氫與氫氣的半導體層的厚度介於50埃~50000埃。
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