TW201703194A - 形成淺溝槽隔離結構之方法 - Google Patents

形成淺溝槽隔離結構之方法 Download PDF

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Publication number
TW201703194A
TW201703194A TW105118197A TW105118197A TW201703194A TW 201703194 A TW201703194 A TW 201703194A TW 105118197 A TW105118197 A TW 105118197A TW 105118197 A TW105118197 A TW 105118197A TW 201703194 A TW201703194 A TW 201703194A
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TW
Taiwan
Prior art keywords
trench
oxide
layer
planarization
etch
Prior art date
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TW105118197A
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English (en)
Chinese (zh)
Inventor
賈斯丁 希羅奇 薩托
葛格利 艾倫 史棟
Original Assignee
微晶片科技公司
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Application filed by 微晶片科技公司 filed Critical 微晶片科技公司
Publication of TW201703194A publication Critical patent/TW201703194A/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/17—Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113—Isolations within a component, i.e. internal isolations
    • H10D62/115—Dielectric isolations, e.g. air gaps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0151—Manufacturing their isolation regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0188—Manufacturing their isolation regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/694—Inorganic materials composed of nitrides
    • H10P14/6943—Inorganic materials composed of nitrides containing silicon
    • H10P14/69433—Inorganic materials composed of nitrides containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/60—Wet etching
    • H10P50/64—Wet etching of semiconductor materials
    • H10P50/642—Chemical etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/06—Planarisation of inorganic insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/06—Planarisation of inorganic insulating materials
    • H10P95/062—Planarisation of inorganic insulating materials involving a dielectric removal step
    • H10P95/064—Planarisation of inorganic insulating materials involving a dielectric removal step the removal being chemical etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/06—Planarisation of inorganic insulating materials
    • H10P95/062—Planarisation of inorganic insulating materials involving a dielectric removal step
    • H10P95/064—Planarisation of inorganic insulating materials involving a dielectric removal step the removal being chemical etching
    • H10P95/066—Planarisation of inorganic insulating materials involving a dielectric removal step the removal being chemical etching the removal being a selective chemical etching step, e.g. selective dry etching through a mask
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H10W10/0143—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations comprising concurrently refilling multiple trenches having different shapes or dimensions

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  • Element Separation (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
TW105118197A 2015-06-10 2016-06-08 形成淺溝槽隔離結構之方法 TW201703194A (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US14/735,359 US9627246B2 (en) 2015-06-10 2015-06-10 Method of forming shallow trench isolation (STI) structures

Publications (1)

Publication Number Publication Date
TW201703194A true TW201703194A (zh) 2017-01-16

Family

ID=56131655

Family Applications (1)

Application Number Title Priority Date Filing Date
TW105118197A TW201703194A (zh) 2015-06-10 2016-06-08 形成淺溝槽隔離結構之方法

Country Status (7)

Country Link
US (2) US9627246B2 (https=)
EP (1) EP3308394B1 (https=)
JP (1) JP2018517300A (https=)
KR (1) KR20180015628A (https=)
CN (1) CN107690692B (https=)
TW (1) TW201703194A (https=)
WO (1) WO2016200693A1 (https=)

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CN107017161B (zh) * 2017-05-31 2020-01-24 上海华力微电子有限公司 一种减小sti-cmp过程中碟型凹陷的方法
JP2019169581A (ja) * 2018-03-23 2019-10-03 株式会社東芝 半導体装置の製造方法
CN110707045B (zh) * 2018-10-09 2023-05-12 联华电子股份有限公司 一种制作半导体元件的方法
CN110148579A (zh) * 2019-04-15 2019-08-20 上海华力集成电路制造有限公司 浅沟槽隔离层的制造方法
GB2583348A (en) * 2019-04-24 2020-10-28 Univ Southampton Photonic chip and method of manufacture
CN110660839B (zh) * 2019-11-13 2022-04-29 京东方科技集团股份有限公司 一种显示面板及其制备方法
US11227926B2 (en) * 2020-06-01 2022-01-18 Nanya Technology Corporation Semiconductor device and method for fabricating the same
CN114038744B (zh) * 2021-10-26 2024-12-13 上海华力集成电路制造有限公司 一种mos晶体管制作方法及mos晶体管
CN115346912B (zh) * 2022-10-19 2023-01-03 广州粤芯半导体技术有限公司 浅沟槽隔离结构的制备方法
CN115763358B (zh) * 2022-11-15 2026-02-13 上海华力微电子有限公司 半导体器件的制作方法
US20250113558A1 (en) * 2023-09-28 2025-04-03 Texas Instruments Incorporated Semiconductor device with self-aligned nitride for power isolation
WO2025212375A1 (en) * 2024-04-05 2025-10-09 Applied Materials, Inc. High-density plasma (hdp) topography improvement with partial gapfill carbon
CN121035051B (zh) * 2025-10-22 2026-04-10 荣芯半导体(宁波)有限公司 一种半导体器件及其制造方法

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US5741740A (en) * 1997-06-12 1998-04-21 Taiwan Semiconductor Manufacturing Company, Ltd. Shallow trench isolation (STI) method employing gap filling silicon oxide dielectric layer
US6020621A (en) * 1998-01-28 2000-02-01 Texas Instruments - Acer Incorporated Stress-free shallow trench isolation
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US6664190B2 (en) 2001-09-14 2003-12-16 Chartered Semiconductor Manufacturing Ltd. Pre STI-CMP planarization scheme
KR100406179B1 (ko) * 2001-12-22 2003-11-17 주식회사 하이닉스반도체 플래쉬 메모리 셀의 자기 정렬 플로팅 게이트 형성 방법
KR20030053958A (ko) * 2001-12-24 2003-07-02 동부전자 주식회사 반도체 소자의 트랜지스터 제조방법
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Also Published As

Publication number Publication date
US20160365272A1 (en) 2016-12-15
KR20180015628A (ko) 2018-02-13
JP2018517300A (ja) 2018-06-28
US9627246B2 (en) 2017-04-18
EP3308394A1 (en) 2018-04-18
CN107690692B (zh) 2022-01-25
WO2016200693A1 (en) 2016-12-15
US20170229340A1 (en) 2017-08-10
CN107690692A (zh) 2018-02-13
EP3308394B1 (en) 2022-07-27

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