TW201616936A - Circuit board and method for manufacturing same - Google Patents
Circuit board and method for manufacturing same Download PDFInfo
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- TW201616936A TW201616936A TW103137509A TW103137509A TW201616936A TW 201616936 A TW201616936 A TW 201616936A TW 103137509 A TW103137509 A TW 103137509A TW 103137509 A TW103137509 A TW 103137509A TW 201616936 A TW201616936 A TW 201616936A
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本發明涉及一種電路板及其制法。The invention relates to a circuit board and a method of manufacturing the same.
為防止電路板工作時向外發出電磁輻射,干擾其他電子元件的正常工作,通常會在電路板上選擇性地設置遮罩接地結構。In order to prevent the electromagnetic radiation from being emitted when the circuit board is working and interfere with the normal operation of other electronic components, a mask grounding structure is usually selectively disposed on the circuit board.
目前,在電路板上設置遮罩接地結構可藉由如下方式實現:首先,將具有異方性導電膠的遮罩導電布及具有金屬導電顆粒的接地導電布裁切成需要的形狀;接著,在電路板上需要遮罩接地的區域先貼合一層所述遮罩導電布,所述異方性導電膠與所述電路板電連接;然後,在所述遮罩導電布上先對位然後熱貼合並熱壓合一層所述接地導電布,所述金屬導電顆粒在熱壓合的過程中刺破所述遮罩導電布,與所述異方性導電膠電連接,形成遮罩接地結構,以此來達到遮罩接地的目的。由於所述接地導電布在熱貼合並熱壓合至所述遮罩導電布時,需進行對位,且機器或人工的貼合對位精度有限,為使得對位準確並保證良好的貼合精度,對所述遮罩導電布及接地導電布的尺寸大小有一定要求,即,所述遮罩導電布及接地導電布的貼合尺寸大小受限於貼合精度。此將致使遮罩接地結構的設置受到限制。另外,所述接地導電布藉由異方性導電膠與電路板電連接,使得接地阻值較大,影響遮罩效果。At present, the mask grounding structure is disposed on the circuit board by: firstly, cutting a conductive conductive cloth having an anisotropic conductive paste and a ground conductive cloth having metal conductive particles into a desired shape; The masked conductive cloth is first attached to the area on the circuit board where the mask is grounded, and the anisotropic conductive paste is electrically connected to the circuit board; then, the conductive cloth on the mask is first aligned and then Thermally bonding and heat-bonding a layer of the grounding conductive cloth, the metal conductive particles piercing the mask conductive cloth during thermal compression, and electrically connecting with the anisotropic conductive glue to form a mask grounding structure In order to achieve the purpose of the grounding of the mask. Since the grounding conductive cloth is heat-bonded and heat-bonded to the mask conductive cloth, alignment is required, and the machine or manual bonding alignment accuracy is limited, so that the alignment is accurate and a good fit is ensured. Accuracy, the size of the mask conductive cloth and the ground conductive cloth is required, that is, the bonding size of the mask conductive cloth and the ground conductive cloth is limited by the fitting precision. This will result in a limited setting of the mask ground structure. In addition, the ground conductive cloth is electrically connected to the circuit board by the anisotropic conductive adhesive, so that the grounding resistance is large, which affects the mask effect.
有鑑於此,有必要提供一種克服上述問題的電路板及電路板的製作方法。In view of the above, it is necessary to provide a circuit board and a circuit board manufacturing method that overcome the above problems.
一種電路板的製作方法,包括步驟:提供一個軟性線路板,包括介電層及形成於介電層相背兩側的第一導電線路層及第二導電線路層,所述第一導電線路層與第二導電線路層藉由導電孔相互電性連接,所述第一導電線路層表面形成有第一絕緣覆蓋層,所述第一絕緣覆蓋層開設有第一開口,露出部分第一導電線路層形成第一接地墊;在所述第一絕緣覆蓋層表面形成一層銅層,所述銅層完全覆蓋所述第一絕緣覆蓋層的表面及從所述第一絕緣覆蓋層露出的第一接地墊表面並填滿所述第一開口;在所述銅層表面形成防焊層,所述防焊層開設有複數第二開口,露出部分所述銅層形成第二接地墊;以及在所述第二接地墊的表面形成一層金層。A method of manufacturing a circuit board, comprising the steps of: providing a flexible circuit board comprising a dielectric layer and a first conductive circuit layer and a second conductive circuit layer formed on opposite sides of the dielectric layer, the first conductive circuit layer The first conductive circuit layer is formed with a first insulating cover layer, and the first insulating cover layer is opened with a first opening to expose a portion of the first conductive line. Forming a first ground pad; forming a copper layer on a surface of the first insulating cover layer, the copper layer completely covering a surface of the first insulating cover layer and a first ground exposed from the first insulating cover layer Forming a surface of the pad and filling the first opening; forming a solder resist layer on the surface of the copper layer, the solder resist layer is provided with a plurality of second openings, exposing a portion of the copper layer to form a second ground pad; The surface of the second ground pad forms a gold layer.
一種電路板包括軟性線路板及形成於所述軟性線路板表面的遮罩接地結構。所述軟性線路板包括介電層及形成於所述介電層相背兩側的第一導電線路層及第二導電線路層。所述第一導電線路層與第二導電線路層藉由導電孔相互電性連接。所述第一導電線路層表面形成有第一絕緣覆蓋層。所述第一絕緣覆蓋層開設有第一開口,露出部分第一導電線路層形成第一接地墊。所述遮罩接地結構包括銅層,防焊層及金層。所述銅層覆蓋所述第一絕緣覆蓋層及第一接地墊表面,並填滿所述第一開口。所述防焊層覆蓋所述銅層表面。所述防焊層形成有第二開口,露出部分銅層形成第二接地墊。所述金層覆蓋所述第二接地墊表面。A circuit board includes a flexible circuit board and a mask ground structure formed on a surface of the flexible circuit board. The flexible circuit board includes a dielectric layer and a first conductive circuit layer and a second conductive circuit layer formed on opposite sides of the dielectric layer. The first conductive circuit layer and the second conductive circuit layer are electrically connected to each other through the conductive holes. A surface of the first conductive circuit layer is formed with a first insulating cover layer. The first insulating cover layer is provided with a first opening, and the exposed portion of the first conductive circuit layer forms a first ground pad. The mask ground structure includes a copper layer, a solder resist layer and a gold layer. The copper layer covers the first insulating cover layer and the first ground pad surface, and fills the first opening. The solder resist layer covers the surface of the copper layer. The solder resist layer is formed with a second opening, and a portion of the copper layer is exposed to form a second ground pad. The gold layer covers the surface of the second ground pad.
相較於先前技術,本發明提供的電路板僅需將第二導電線路層與金層作接地處理即可實現遮罩接地,因此,本發明提供的電路板及電路板的製作方法具有如下優點:一是由於只需在防焊層開設第二開口,露出部分銅層形成第二接地墊,並在所述第二接地墊表面形成金層,以形成遮罩接地結構,此過程中無需進行對位貼合及壓合,因此,所述遮罩接地結構的設置不受貼合精度影響,其設置相對較靈活;二是由於在第二接地墊上形成金層,金層與銅層電連接,藉由金層直接接地,具有較低的接地阻值,遮罩效果受接地阻值的影響較小。Compared with the prior art, the circuit board provided by the present invention only needs to ground the second conductive circuit layer and the gold layer to realize the grounding of the mask. Therefore, the circuit board and the circuit board provided by the invention have the following advantages. First, since only a second opening is formed in the solder resist layer, a portion of the copper layer is exposed to form a second ground pad, and a gold layer is formed on the surface of the second ground pad to form a mask ground structure, which is not required in the process. Alignment and press-fit, therefore, the setting of the mask grounding structure is not affected by the fitting precision, and the setting is relatively flexible; the second is that the gold layer is electrically connected to the copper layer by forming a gold layer on the second ground pad With the gold layer directly grounded, it has a lower ground resistance, and the mask effect is less affected by the ground resistance.
圖1係本發明實施方式所提供的軟性線路板的剖面示意圖。1 is a schematic cross-sectional view of a flexible circuit board according to an embodiment of the present invention.
圖2係本發明實施方式所提供的基板的剖面示意圖。2 is a schematic cross-sectional view of a substrate provided by an embodiment of the present invention.
圖3係在圖2的基板形成通孔後的剖面示意圖。3 is a schematic cross-sectional view showing the through hole formed in the substrate of FIG. 2.
圖4係將圖3的通孔電鍍填滿形成導電孔後的剖面示意圖。FIG. 4 is a schematic cross-sectional view showing the via hole plating of FIG. 3 filled with a conductive hole.
圖5係將圖4中的第一銅層及第二銅層製作形成第一導電線路層及第二導電線路層後的剖面示意圖。FIG. 5 is a cross-sectional view showing the first copper layer and the second copper layer in FIG. 4 formed into a first conductive wiring layer and a second conductive wiring layer.
圖6係在圖1的第一導電線路層側的絕緣覆蓋層上形成一層催化油墨層後的剖面示意圖。Fig. 6 is a schematic cross-sectional view showing a layer of a catalytic ink layer formed on the insulating coating layer on the side of the first conductive wiring layer of Fig. 1.
圖7係在圖6中的催化油墨層側化學沉積一層銅層後的剖面示意圖。Figure 7 is a schematic cross-sectional view showing the chemical deposition of a copper layer on the side of the catalytic ink layer of Figure 6.
圖8係在圖7中的銅層表面形成圖案化的防焊層後的剖面示意圖,部分所述銅層暴露於所述防焊層中形成第二接地墊。8 is a schematic cross-sectional view showing the formation of a patterned solder mask on the surface of the copper layer of FIG. 7, and a portion of the copper layer is exposed to the solder resist layer to form a second ground pad.
圖9係在圖8中的第二接地墊表面形成一層過渡金屬層後的剖面示意圖。FIG. 9 is a schematic cross-sectional view showing a transition metal layer formed on the surface of the second ground pad in FIG.
圖10係在圖9中的過渡金屬層表面形成一層金層後的剖面示意圖。Figure 10 is a schematic cross-sectional view showing the formation of a gold layer on the surface of the transition metal layer of Figure 9.
下面將結合附圖及實施方式對本發明提供的電路板及電路板的製作方法作進一步的詳細說明。The circuit board and the circuit board manufacturing method provided by the present invention will be further described in detail below with reference to the accompanying drawings and embodiments.
本發明實施方式提供的電路板100的製作方法,包括步驟:The manufacturing method of the circuit board 100 provided by the embodiment of the present invention includes the following steps:
第一步,請參閱圖1,提供一個軟性線路板10。In the first step, referring to FIG. 1, a flexible circuit board 10 is provided.
所述軟性線路板10包括第一導電線路層11、介電層12、第二導電線路層13、第一絕緣覆蓋層14及第二絕緣覆蓋層15。所述第一導電線路層11及所述第二導電線路層13位於所述介電層12的相背兩側。所述介電層12開設有貫穿所述介電層12的導電孔121。所述第一導電線路層11藉由所述導電孔121與所述第二導電線路層13電性連接。所述第一絕緣覆蓋層14覆蓋在所述第一導電線路層11及從所述第一導電線路層11露出的介電層12的表面。所述第一絕緣覆蓋層14開設有複數第一開口141,露出部分第一導電線路層11形成第一接地墊142。所述第二絕緣覆蓋層15覆蓋在所述第二導電線路層13的表面。The flexible circuit board 10 includes a first conductive wiring layer 11, a dielectric layer 12, a second conductive wiring layer 13, a first insulating cover layer 14, and a second insulating cover layer 15. The first conductive circuit layer 11 and the second conductive circuit layer 13 are located on opposite sides of the dielectric layer 12. The dielectric layer 12 is provided with a conductive hole 121 penetrating the dielectric layer 12 . The first conductive circuit layer 11 is electrically connected to the second conductive circuit layer 13 via the conductive holes 121. The first insulating cover layer 14 covers the surface of the first conductive wiring layer 11 and the dielectric layer 12 exposed from the first conductive wiring layer 11. The first insulating cover layer 14 is provided with a plurality of first openings 141, and the exposed portion of the first conductive circuit layer 11 forms a first ground pad 142. The second insulating cover layer 15 covers the surface of the second conductive wiring layer 13.
所述軟性線路板10可藉由如下方式獲得:The flexible circuit board 10 can be obtained by:
首先,請參閱圖2,提供一個基板110。所述基板110可為單面板或雙面板。本實施方式中,所述基板110為雙面板。所述基板110包括第一銅層111,介電層12及第二銅層113。所述介電層12可為聚醯亞胺或聚酯等具有良好撓折性的材料。所述第一銅層111及第二銅層113分別位於所述介電層12的相背兩側。First, referring to FIG. 2, a substrate 110 is provided. The substrate 110 can be a single panel or a double panel. In this embodiment, the substrate 110 is a double panel. The substrate 110 includes a first copper layer 111, a dielectric layer 12 and a second copper layer 113. The dielectric layer 12 may be a material having good flexibility such as polyimide or polyester. The first copper layer 111 and the second copper layer 113 are respectively located on opposite sides of the dielectric layer 12 .
接著,請參閱圖3,在所述基板110上形成貫穿所述基板110的通孔1210。所述通孔1210可藉由雷射燒蝕或機械鑽孔的方式形成。Next, referring to FIG. 3, a through hole 1210 penetrating the substrate 110 is formed on the substrate 110. The through hole 1210 can be formed by laser ablation or mechanical drilling.
接著,請參閱圖4,電鍍填滿所述通孔1210形成導電孔121。本實施方式中,電鍍材料為銅。Next, referring to FIG. 4, the through holes 1210 are filled and formed to form the conductive holes 121. In the present embodiment, the plating material is copper.
接著,請參閱圖5,選擇性移除部分所述第一銅層111形成第一導電線路層11及選擇性移除部分第二銅層113形成第二導電線路層13。部分介電層12從所述第一導電線路層11的空隙之間露出。部分介電層12從所述第二導電線路層13的空隙之間露出(圖未示)。本實施方式中,可採用影像轉移及蝕刻的方式形成所述第一導電線路層11及第二導電線路層13。Next, referring to FIG. 5, the first copper layer 111 is selectively removed to form the first conductive wiring layer 11 and the second copper layer 113 is selectively removed to form the second conductive wiring layer 13. A portion of the dielectric layer 12 is exposed from between the voids of the first conductive wiring layer 11. A portion of the dielectric layer 12 is exposed between the spaces of the second conductive wiring layer 13 (not shown). In the present embodiment, the first conductive wiring layer 11 and the second conductive wiring layer 13 may be formed by image transfer and etching.
最後,請再次參閱圖1,在所述第一導電線路層11上形成第一絕緣覆蓋層14及在所述第二導電線路層13表面形成第二絕緣覆蓋層15。所述第一絕緣覆蓋層14覆蓋在所述第一導電線路層11及從所述第一導電線路層11露出的介電層12的表面,所述第一絕緣覆蓋層14開設有複數第一開口141,露出部分第一導電線路層11形成第一接地墊142。所述第二絕緣覆蓋層15覆蓋整個所述第二導電線路層13表面。Finally, referring again to FIG. 1, a first insulating cover layer 14 is formed on the first conductive wiring layer 11, and a second insulating cover layer 15 is formed on the surface of the second conductive wiring layer 13. The first insulating cover layer 14 covers the surface of the first conductive circuit layer 11 and the dielectric layer 12 exposed from the first conductive circuit layer 11, and the first insulating cover layer 14 is provided with a plurality of first The opening 141 exposes a portion of the first conductive wiring layer 11 to form a first ground pad 142. The second insulating cover layer 15 covers the entire surface of the second conductive wiring layer 13.
第二步,請參閱圖6,在所述第一絕緣覆蓋層14表面形成一層催化油墨層21。本實施方式中,所述催化油墨層21藉由印刷的方式形成。In the second step, referring to FIG. 6, a catalytic ink layer 21 is formed on the surface of the first insulating cover layer 14. In the present embodiment, the catalytic ink layer 21 is formed by printing.
所述催化油墨層21可為後續化學沉銅起到催化作用及具有增加化銅層與第一絕緣覆蓋層14之間的黏結強度的作用。本實施方式中,所述催化油墨層21的厚度範圍為2.5~17.5微米。所述催化油墨層21覆蓋所述第一絕緣覆蓋層14遠離所述介電層12的表面,及複數所述第一開口141的側壁,即所述催化油墨層21覆蓋所述第一絕緣層14遠離所述介電層12的表面以及所述第一絕緣覆蓋層14從所述第一開口141露出的表面,從而所述催化油墨層21部分填充每個所述第一開口141,並使得每個所述第一接地墊142的部分區域從所述催化油墨層21露出。The catalytic ink layer 21 can catalyze the subsequent chemical precipitation of copper and have the effect of increasing the bonding strength between the copper layer and the first insulating coating layer 14. In this embodiment, the thickness of the catalytic ink layer 21 ranges from 2.5 to 17.5 micrometers. The catalytic ink layer 21 covers the surface of the first insulating cover layer 14 away from the dielectric layer 12, and a plurality of sidewalls of the first opening 141, that is, the catalytic ink layer 21 covers the first insulating layer a surface away from the surface of the dielectric layer 12 and the first insulating cover layer 14 exposed from the first opening 141, such that the catalytic ink layer 21 partially fills each of the first openings 141 and A partial region of each of the first ground pads 142 is exposed from the catalytic ink layer 21.
可以理解的是,在所述第一絕緣覆蓋層14表面形成一層催化油墨層21之前,還包括對所述第一接地墊142進行粗化處理的步驟。It can be understood that, before forming a layer of the catalytic ink layer 21 on the surface of the first insulating cover layer 14, the step of roughening the first ground pad 142 is further included.
第三步,請參閱圖7,在所述催化油墨層21及所述第一接地墊142從所述催化油墨層21露出的表面化學沉積一層銅層22。In a third step, referring to FIG. 7, a copper layer 22 is chemically deposited on the surface of the catalytic ink layer 21 and the first ground pad 142 exposed from the catalytic ink layer 21.
所述銅層22填滿所述第一開口141,且所述銅層22遠離所述第一導電線路層11的表面位於同一水平面內。本實施方式中,所述催化油墨層21表面的所述銅層22的厚度範圍為0.5~1.5微米。The copper layer 22 fills the first opening 141, and the copper layer 22 is located in the same horizontal plane away from the surface of the first conductive circuit layer 11. In this embodiment, the thickness of the copper layer 22 on the surface of the catalytic ink layer 21 ranges from 0.5 to 1.5 micrometers.
第四步,請參閱圖8,在所述銅層22表面形成防焊層23。In the fourth step, referring to FIG. 8, a solder resist layer 23 is formed on the surface of the copper layer 22.
所述防焊層23開設有複數第二開口231,露出部分銅層22形成第二接地墊232。本實施方式中,所述防焊層23為感光油墨。本實施方式中,所述防焊層23的厚度範圍為10~30微米。The solder resist layer 23 is provided with a plurality of second openings 231, and a portion of the copper layer 22 is exposed to form a second ground pad 232. In the present embodiment, the solder resist layer 23 is a photosensitive ink. In the embodiment, the solder resist layer 23 has a thickness ranging from 10 to 30 micrometers.
第五步,請參閱圖9,在所述第二接地墊232表面形成一層過渡金屬層24。所述過渡金屬層24可為鎳、鎳鈀等材料。所述過渡金屬層24可藉由化學沉積的方式形成。所述過渡金屬層24的厚度小於所述防焊層23的厚度,本實施方式中,所述過渡金屬層24的厚度範圍為2~8微米。In the fifth step, referring to FIG. 9, a transition metal layer 24 is formed on the surface of the second ground pad 232. The transition metal layer 24 may be a material such as nickel, nickel palladium or the like. The transition metal layer 24 can be formed by chemical deposition. The thickness of the transition metal layer 24 is smaller than the thickness of the solder resist layer 23. In the embodiment, the transition metal layer 24 has a thickness ranging from 2 to 8 micrometers.
第六步,請參閱圖10,在所述過渡金屬層24表面形成一層金層25,並將所述金層25與第二導電線路層13作接地處理,以實現所述軟性線路板10的遮罩接地。Referring to FIG. 10, a gold layer 25 is formed on the surface of the transition metal layer 24, and the gold layer 25 and the second conductive circuit layer 13 are grounded to realize the flexible circuit board 10. The mask is grounded.
所述金層25可藉由化學沉積或電鍍的方式形成。本實施方式中,所述金層的厚度範圍為0.0075~0.025微米。The gold layer 25 can be formed by chemical deposition or electroplating. In this embodiment, the thickness of the gold layer ranges from 0.0075 to 0.025 micrometers.
可以理解的是,可直接在所述第二接地墊232表面藉由電鍍的方式形成所述金層25。此時,無需進行在所述第二接地墊232與金層25之間形成過渡金屬層24的步驟。It can be understood that the gold layer 25 can be formed by electroplating directly on the surface of the second ground pad 232. At this time, the step of forming the transition metal layer 24 between the second ground pad 232 and the gold layer 25 is not required.
請再次參閱圖10,本發明實施方式還提供一種電路板100,包括軟性線路板10及遮罩接地結構20。Referring to FIG. 10 again, an embodiment of the present invention further provides a circuit board 100 including a flexible circuit board 10 and a mask ground structure 20.
所述軟性線路板10包括第一導電線路層11、介電層12、第二導電線路層13、第一絕緣覆蓋層14及第二絕緣覆蓋層15。所述第一導電線路層11及所述第二導電線路層13位於所述介電層12的相背兩側。所述介電層12開設有貫穿所述介電層12的導電孔121。所述第一導電線路層11藉由所述導電孔121與所述第二導電線路層13電性連接。所述第一絕緣覆蓋層14覆蓋在所述第一導電線路層11及從所述第一導電線路層11露出的介電層12的表面。所述第一絕緣覆蓋層14開設有複數第一開口141,露出部分第一導電線路層11形成第一接地墊142。所述第二絕緣覆蓋層15覆蓋在所述第二導電線路層13的表面。The flexible circuit board 10 includes a first conductive wiring layer 11, a dielectric layer 12, a second conductive wiring layer 13, a first insulating cover layer 14, and a second insulating cover layer 15. The first conductive circuit layer 11 and the second conductive circuit layer 13 are located on opposite sides of the dielectric layer 12. The dielectric layer 12 is provided with a conductive hole 121 penetrating the dielectric layer 12 . The first conductive circuit layer 11 is electrically connected to the second conductive circuit layer 13 via the conductive holes 121. The first insulating cover layer 14 covers the surface of the first conductive wiring layer 11 and the dielectric layer 12 exposed from the first conductive wiring layer 11. The first insulating cover layer 14 is provided with a plurality of first openings 141, and the exposed portion of the first conductive circuit layer 11 forms a first ground pad 142. The second insulating cover layer 15 covers the surface of the second conductive wiring layer 13.
所述遮罩接地結構20形成於所述軟性線路板10的第一絕緣覆蓋層14上。The mask ground structure 20 is formed on the first insulating cover layer 14 of the flexible circuit board 10.
所述遮罩接地結構20包括催化油墨層21、銅層22、防焊層23、過渡金屬層24及金層25。所述催化油墨層21覆蓋所述第一絕緣覆蓋層14遠離所述介電層12的表面及及複數所述第一開口141的側壁,即所述催化油墨層21覆蓋所述第一絕緣覆蓋層14遠離所述介電層12的表面以及所述第一絕緣覆蓋層14從所述第一開口141露出的表面,從而所述催化油墨層21部分填充每個所述第一開口141。所述第一接地墊142的部分區域從所述催化油墨層21露出。所述銅層22覆蓋所述催化油墨層21及所述第一接地墊142從所述催化油墨層21露出的部分表面。所述銅層22填滿所述第一開口141,且所述銅層22遠離所述介電層12的表面位於同一水平面內。所述防焊層23覆蓋所述銅層22。所述防焊層23開設有複數第二開口231,露出部分所述銅層22形成第二接地墊232。所述過渡金屬層24覆蓋所述第二接地墊232。所述金層25覆蓋所述過渡金屬層24。本實施方式中,所述催化油墨層21的厚度範圍為2.5~17.5微米。所述銅層22的厚度範圍為0.5~1.5微米。所述防焊層23的厚度範圍為10~30微米。所述過渡金屬層24的厚度小於所述防焊層23的厚度。本實施方式中,所述過渡金屬層24的厚度範圍為2~8微米。所述金層的厚度範圍為0.0075~0.025微米。The mask ground structure 20 includes a catalytic ink layer 21, a copper layer 22, a solder resist layer 23, a transition metal layer 24, and a gold layer 25. The catalytic ink layer 21 covers the surface of the first insulating cover layer 14 away from the dielectric layer 12 and the sidewalls of the plurality of first openings 141, that is, the catalytic ink layer 21 covers the first insulating cover The layer 14 is away from the surface of the dielectric layer 12 and the surface of the first insulating cover layer 14 exposed from the first opening 141 such that the catalytic ink layer 21 partially fills each of the first openings 141. A partial region of the first ground pad 142 is exposed from the catalytic ink layer 21. The copper layer 22 covers a portion of the surface of the catalytic ink layer 21 and the first ground pad 142 exposed from the catalytic ink layer 21. The copper layer 22 fills the first opening 141, and the copper layer 22 is located in the same horizontal plane away from the surface of the dielectric layer 12. The solder resist layer 23 covers the copper layer 22. The solder resist layer 23 is provided with a plurality of second openings 231, and a portion of the copper layer 22 is exposed to form a second ground pad 232. The transition metal layer 24 covers the second ground pad 232. The gold layer 25 covers the transition metal layer 24. In this embodiment, the thickness of the catalytic ink layer 21 ranges from 2.5 to 17.5 micrometers. The copper layer 22 has a thickness ranging from 0.5 to 1.5 microns. The solder resist layer 23 has a thickness ranging from 10 to 30 micrometers. The thickness of the transition metal layer 24 is smaller than the thickness of the solder resist layer 23. In this embodiment, the transition metal layer 24 has a thickness ranging from 2 to 8 micrometers. The thickness of the gold layer ranges from 0.0075 to 0.025 microns.
相較於先前技術,本發明提供的電路板僅需將第二導電線路層與金層作接地處理即可實現遮罩接地的作用,因此,本發明提供的電路板及電路板的製作方法具有如下優點:一是由於只需在防焊層開設第二開口,露出部分銅層形成第二接地墊,並在所述第二接地墊表面形成金層,以形成遮罩接地結構,此過程中無需進行對位貼合及壓合,因此,所述遮罩接地結構的設置不受貼合精度影響,其設置相對較靈活;二是由於在第二接地墊上形成金層,金層與銅層電連接,藉由金層直接接地,具有較低的接地阻值,遮罩效果受接地阻值的影響較小;另外,金層具有較好的抗氧化功能。Compared with the prior art, the circuit board provided by the present invention only needs to ground the second conductive circuit layer and the gold layer to achieve the grounding of the mask. Therefore, the circuit board and the circuit board provided by the present invention have the manufacturing method. The advantages are as follows: firstly, only a second opening is opened in the solder resist layer, a part of the copper layer is exposed to form a second ground pad, and a gold layer is formed on the surface of the second ground pad to form a mask ground structure, in the process There is no need for alignment and pressing. Therefore, the setting of the mask grounding structure is not affected by the fitting accuracy, and the setting is relatively flexible. Second, the gold layer and the copper layer are formed on the second grounding pad. The electrical connection is directly grounded by the gold layer and has a low grounding resistance value. The shielding effect is less affected by the grounding resistance value; in addition, the gold layer has a better anti-oxidation function.
綜上,本發明確已符合發明專利之要件,遂依法提出專利申請。惟,以上該者僅為本發明之較佳實施方式,自不能以此限制本案之申請專利範圍。舉凡熟悉本案技藝之人士爰依本發明之精神所作之等效修飾或變化,皆應涵蓋於以下申請專利範圍內。In summary, the present invention has indeed met the requirements of the invention patent, and has filed a patent application according to law. However, the above is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application in this case. Equivalent modifications or variations made by persons skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims.
100‧‧‧電路板100‧‧‧ boards
10‧‧‧軟性線路板10‧‧‧Soft circuit board
11‧‧‧第一導電線路層11‧‧‧First conductive circuit layer
12‧‧‧介電層12‧‧‧Dielectric layer
13‧‧‧第二導電線路層13‧‧‧Second conductive circuit layer
14‧‧‧第一絕緣覆蓋層14‧‧‧First insulating cover
15‧‧‧第二絕緣覆蓋層15‧‧‧Second insulation cover
121‧‧‧導電孔121‧‧‧Electrical hole
141‧‧‧第一開口141‧‧‧ first opening
142‧‧‧第一接地墊142‧‧‧First grounding pad
110‧‧‧基板110‧‧‧Substrate
111‧‧‧第一銅層111‧‧‧First copper layer
113‧‧‧第二銅層113‧‧‧Second copper layer
1210‧‧‧通孔1210‧‧‧through hole
20‧‧‧遮罩接地結構20‧‧‧Mask grounding structure
21‧‧‧催化油墨層21‧‧‧ Catalytic ink layer
22‧‧‧銅層22‧‧‧ copper layer
23‧‧‧防焊層23‧‧‧ solder mask
231‧‧‧第二開口231‧‧‧ second opening
232‧‧‧第二接地墊232‧‧‧Second grounding pad
24‧‧‧過渡金屬層24‧‧‧Transition metal layer
25‧‧‧金層25‧‧‧ gold layer
無no
100‧‧‧電路板 100‧‧‧ boards
10‧‧‧軟性線路板 10‧‧‧Soft circuit board
11‧‧‧第一導電線路層 11‧‧‧First conductive circuit layer
12‧‧‧介電層 12‧‧‧Dielectric layer
13‧‧‧第二導電線路層 13‧‧‧Second conductive circuit layer
14‧‧‧第一絕緣覆蓋層 14‧‧‧First insulating cover
15‧‧‧第二絕緣覆蓋層 15‧‧‧Second insulation cover
141‧‧‧第一開口 141‧‧‧ first opening
142‧‧‧第一接地墊 142‧‧‧First grounding pad
20‧‧‧遮罩接地結構 20‧‧‧Mask grounding structure
21‧‧‧催化油墨層 21‧‧‧ Catalytic ink layer
22‧‧‧銅層 22‧‧‧ copper layer
23‧‧‧防焊層 23‧‧‧ solder mask
231‧‧‧第二開口 231‧‧‧ second opening
232‧‧‧第二接地墊 232‧‧‧Second grounding pad
24‧‧‧過渡金屬層 24‧‧‧Transition metal layer
25‧‧‧金層 25‧‧‧ gold layer
Claims (9)
提供一個軟性線路板,包括介電層及形成於介電層相背兩側的第一導電線路層及第二導電線路層,所述第一導電線路層與所述第二導電線路層藉由導電孔相互電性連接,所述第一導電線路層表面形成有第一絕緣覆蓋層,所述第一絕緣覆蓋層開設有第一開口,露出部分第一導電線路層形成第一接地墊;
在所述第一絕緣覆蓋層表面形成一層銅層,所述銅層完全覆蓋所述第一絕緣覆蓋層的表面及從所述第一絕緣覆蓋層露出的第一接地墊表面並填滿所述第一開口;
在所述銅層表面形成防焊層,所述防焊層開設有複數第二開口,露出部分所述銅層形成第二接地墊;以及
在所述第二接地墊的表面形成一層金層。A method of manufacturing a circuit board, comprising the steps of:
Providing a flexible circuit board comprising a dielectric layer and a first conductive circuit layer and a second conductive circuit layer formed on opposite sides of the dielectric layer, wherein the first conductive circuit layer and the second conductive circuit layer are The first conductive layer is formed with a first insulating cover layer, the first insulating cover layer is provided with a first opening, and the exposed portion of the first conductive circuit layer forms a first ground pad;
Forming a copper layer on a surface of the first insulating cover layer, the copper layer completely covering a surface of the first insulating cover layer and a first ground pad surface exposed from the first insulating cover layer and filling the surface First opening;
Forming a solder resist layer on a surface of the copper layer, the solder resist layer is provided with a plurality of second openings, exposing a portion of the copper layer to form a second ground pad; and forming a gold layer on a surface of the second ground pad.
提供一個基板,所述基板包括第一銅層,介電層及第二銅層,所述第一銅層與第二銅層分別位於所述介電層的相背兩側;
形成貫穿所述基板的通孔;
電鍍填滿所述通孔形成導電孔;
選擇性移除部分所述第一銅層形成第一導電線路層,選擇性移除部分第二銅層形成第二導電線路;
在所述第一導電線路層表面及從所述第一導電線路層露出的介電層表面形成第一絕緣覆蓋層,所述第一絕緣覆蓋層開設有複數第一開口,露出部分第一導電線路層以形成第一接地墊。The method of manufacturing the circuit board of claim 1, wherein the flexible circuit board is obtained by:
Providing a substrate, the substrate includes a first copper layer, a dielectric layer and a second copper layer, wherein the first copper layer and the second copper layer are respectively located on opposite sides of the dielectric layer;
Forming a through hole penetrating the substrate;
Electroplating fills the through holes to form conductive holes;
Selectively removing a portion of the first copper layer to form a first conductive circuit layer, and selectively removing a portion of the second copper layer to form a second conductive line;
Forming a first insulating cover layer on a surface of the first conductive circuit layer and a surface of the dielectric layer exposed from the first conductive circuit layer, wherein the first insulating cover layer is provided with a plurality of first openings to expose a portion of the first conductive The circuit layer forms a first ground pad.
The circuit board of claim 6, wherein the mask ground structure further comprises a transition metal layer between the gold layer and the second ground pad.
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TWI613943B (en) * | 2016-07-12 | 2018-02-01 | Method for manufacturing wafer fixed structure |
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CN114365584A (en) * | 2020-06-29 | 2022-04-15 | 庆鼎精密电子(淮安)有限公司 | Circuit board and manufacturing method thereof |
CN115696772A (en) * | 2021-07-23 | 2023-02-03 | 礼鼎半导体科技(深圳)有限公司 | Circuit board and manufacturing method thereof |
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CN102316665A (en) * | 2010-07-09 | 2012-01-11 | 富葵精密组件(深圳)有限公司 | Flexible circuit board and manufacture method thereof |
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