TWI691243B - Manufacturing method for printed circuit board - Google Patents
Manufacturing method for printed circuit board Download PDFInfo
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- TWI691243B TWI691243B TW104100469A TW104100469A TWI691243B TW I691243 B TWI691243 B TW I691243B TW 104100469 A TW104100469 A TW 104100469A TW 104100469 A TW104100469 A TW 104100469A TW I691243 B TWI691243 B TW I691243B
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- metal plate
- circuit pattern
- insulating layer
- circuit board
- printed circuit
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/061—Etching masks
- H05K3/064—Photoresists
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4697—Manufacturing multilayer circuits having cavities, e.g. for mounting components
Abstract
Description
本申請案主張2014年5月28日經韓國智慧財產局申請的韓國專利申請案第10-2014-0064632號之優先權及權益,所述申請案之揭露內容以引用之方式併入本文中。 This application claims the priority and rights of Korean Patent Application No. 10-2014-0064632 filed by the Korean Intellectual Property Office on May 28, 2014, and the disclosure content of the application is incorporated herein by reference.
本發明是關於一種印刷電路板的製造方法。 The invention relates to a method for manufacturing a printed circuit board.
印刷電路板包含由導電材料諸如沉積於絕緣材料上之銅形成的電路圖案。近來,根據電子組件之小型化及薄化的趨勢,已使用具有其中電路圖案嵌入絕緣材料中的嵌入式圖案結構的印刷電路板。 The printed circuit board contains a circuit pattern formed of a conductive material such as copper deposited on an insulating material. Recently, according to the trend of miniaturization and thinning of electronic components, a printed circuit board having an embedded pattern structure in which a circuit pattern is embedded in an insulating material has been used.
(專利文獻1)韓國特許專利公開案第2013-0057186號 (Patent Document 1) Korean Patent Publication No. 2013-0057186
本發明之一態樣可提供一種印刷電路板的製造方法,所述製造方法具有改良安裝於所述印刷電路板上之部件或其他類似者的連接性,同時具有嵌入電路圖案的嵌入式圖案結構。 One aspect of the present invention can provide a method for manufacturing a printed circuit board having improved connectivity of components or other similar mounted on the printed circuit board, and having an embedded pattern structure with embedded circuit patterns .
根據本發明之一態樣,一種印刷電路板的製造方法可包含:在金屬板的一個表面上形成第一電路圖案;在金屬板的一個表面上形成絕緣層,所述絕緣層覆蓋第一電路圖案;及選擇性地蝕刻金屬板以在第一電路圖案的一部分上形成導體襯墊。 According to one aspect of the present invention, a method of manufacturing a printed circuit board may include: forming a first circuit pattern on one surface of a metal plate; forming an insulating layer on one surface of the metal plate, the insulating layer covering the first circuit Pattern; and selectively etching the metal plate to form a conductor pad on a portion of the first circuit pattern.
第一電路圖案的表面可相對於所述絕緣層的表面共面,或可定位於低於絕緣層的表面,且導體襯墊可突出於絕緣層的表面。 The surface of the first circuit pattern may be coplanar with respect to the surface of the insulating layer, or may be positioned below the surface of the insulating layer, and the conductor pad may protrude from the surface of the insulating layer.
10:載體基板 10: carrier substrate
11:外部金屬板 11: External metal plate
12:內部金屬板 12: Internal metal plate
13:核心部分 13: The core part
20:第一抗電鍍劑 20: The first anti-plating agent
21、23:開口部分 21, 23: opening part
22:第二抗電鍍劑 22: Second anti-plating agent
25:抗蝕刻劑 25: Anti-etching agent
30:晶種層 30: Seed layer
50:導體襯墊 50: Conductor pad
110:第一電路圖案 110: first circuit pattern
120:第二電路圖案 120: Second circuit pattern
150:導通孔 150: Via
151:通孔 151: through hole
200:絕緣層 200: insulating layer
300:阻焊劑 300: solder resist
500:堆積層 500: accumulation layer
A:印刷電路板 A: Printed circuit board
以下將結合所附圖式進行之詳細描述以更清楚地理解本發明的上述內容以及其他態樣、特徵及其他優點,其中:圖1為繪示根據本發明的例示性實施例所製造的印刷電路板的結構的橫截面圖;圖2為繪示根據本發明的另一例示性實施例所製造的印刷電路板的結構的橫截面圖;以及圖3至圖15依序繪示出根據本發明的例示性實施例的印刷電路板的製造方法的示意圖。 The following detailed description will be made in conjunction with the accompanying drawings to more clearly understand the above content of the present invention, as well as other aspects, features, and other advantages, among which: FIG. 1 is a drawing showing a printing made according to an exemplary embodiment of the present invention. A cross-sectional view of the structure of the circuit board; FIG. 2 is a cross-sectional view showing the structure of the printed circuit board manufactured according to another exemplary embodiment of the present invention; and FIGS. A schematic diagram of a method of manufacturing a printed circuit board of an exemplary embodiment of the invention.
現在將參考所附圖式詳細描述本發明的例示性實施例。 Exemplary embodiments of the present invention will now be described in detail with reference to the attached drawings.
圖1為繪示根據本發明的例示性實施例所製造的印刷電 路板的結構的橫截面圖。 FIG. 1 is a diagram showing a printed circuit manufactured according to an exemplary embodiment of the present invention. Cross-sectional view of the structure of the road board.
參看圖1,根據本發明的例示性實施例的印刷電路板可包含絕緣層200、嵌入於絕緣層200中使得其表面暴露至絕緣層200的一個表面的第一電路圖案110,以及用於連接外部端子的選擇性地設置於第一電路圖案110的一部分上的導體襯墊50。
Referring to FIG. 1, a printed circuit board according to an exemplary embodiment of the present invention may include an
第一電路圖案110可嵌入於絕緣層200中,使得其暴露至絕緣層200的一個表面的表面與絕緣層200的一個表面共面,或定位於低於絕緣層200的一個表面。
The
當安裝諸如積體電路(integrated circuit,IC)或其他類似者的電子組件時,連接缺陷可能發生於如上文描述所嵌入的第一電路圖案110中。特定而言,在第一電路圖案110定位於低於絕緣層200使得電路圖案110與絕緣層200之間產生一台階的情況下,連接缺陷的可能性可能會變大。
When an electronic component such as an integrated circuit (IC) or the like is installed, connection defects may occur in the
因此,在本發明的例示性實施例的印刷電路板中,導體襯墊50可選擇性地設置於嵌入於絕緣層200中的第一電路圖案110的一部分上。
Therefore, in the printed circuit board of the exemplary embodiment of the present invention, the
導體襯墊50可設置為突出於絕緣層200的一個表面。因此,可改良安裝於其上的部件或其他類似者的連接性。
The
絕緣層200可具有設置於與其一個表面對應的另一表面上的第二電路圖案120,且可具有設置於其中的導通孔150,以便從中穿透而將第一電路圖案110及第二電路圖案120彼此連接。
The
印刷電路板可具有設置於其表面上的阻焊劑300,以便在第一電路圖案110及第二電路圖案120間暴露用於連接襯墊的電路圖案。
The printed circuit board may have a solder resist 300 provided on the surface thereof, so that the circuit pattern for connecting the pad is exposed between the
圖2為繪示根據本發明的例示性實施例所製造的印刷電路板的結構的橫截面圖。 2 is a cross-sectional view illustrating a structure of a printed circuit board manufactured according to an exemplary embodiment of the present invention.
參看圖2,根據本發明的另一例示性實施例的印刷電路板可更包含堆疊於絕緣層200的另一表面上的堆積層500。
Referring to FIG. 2, a printed circuit board according to another exemplary embodiment of the present invention may further include a build-up
此處,儘管一個堆積層500堆疊於絕緣層200的另一表面上的情況已繪示於圖2中,但本發明不限於此,而是可恰當地藉由熟習此項技術者做出修改。舉例而言,可形成兩個或兩個以上的堆積層。
Here, although a stacked
圖3至圖15依序繪示出根據本發明的例示性實施例的印刷電路板的製造方法的示意圖。 3 to 15 sequentially illustrate schematic diagrams of a method of manufacturing a printed circuit board according to an exemplary embodiment of the present invention.
參看圖3,可首先準備載體基板10。
Referring to FIG. 3, the
載體基板10可包含核心部分13、設置於核心部分13的兩個表面上的內部金屬板12,及設置於內部金屬板12上的外部金屬板11。
The
內部金屬板12及外部金屬板11中的每一者可由銅箔所形成,但並不特別受限於此。
Each of the
內部金屬板12與外部金屬板11之間的接合表面中的至少一者可經表面處置,使得內部金屬板12與外部金屬板11彼此可易於分離。
At least one of the joining surfaces between the
參看圖4,具有用於形成第一電路圖案110的開口部分21的第一抗電鍍劑20可形成於外部金屬板11上。
Referring to FIG. 4, the first plating resist 20 having the
為一般感光抗蝕劑膜的第一抗電鍍劑20可為乾燥膜抗蝕劑或其他類似者,但並不特別受限於此。 The first plating resist 20 which is a general photoresist film may be a dry film resist or the like, but it is not particularly limited thereto.
具有開口部分21的第一抗電鍍劑20可藉由施加感光抗
蝕劑膜、形成圖案化遮罩且接著執行暴露及顯影製程來形成。
The first plating resist 20 having the
參看圖5,導電金屬可填充於開口部分21中以形成第一電路圖案110。
Referring to FIG. 5, conductive metal may be filled in the
導電金屬可藉由執行諸如電鍍製程或其他類似的製程來填充。此處,導電金屬可為具有極好電導率的任何金屬,例如銅(Cu)。 The conductive metal can be filled by performing processes such as electroplating or other similar processes. Here, the conductive metal may be any metal having excellent electrical conductivity, such as copper (Cu).
參看圖6,可移除第一抗電鍍劑20。 Referring to FIG. 6, the first plating resist 20 may be removed.
參看圖7,覆蓋第一電路圖案110的絕緣層200可形成於其上形成有第一電路圖案110的外部金屬板11上。
Referring to FIG. 7, an
可使用樹脂絕緣層作為絕緣層200。
As the
作為樹脂絕緣層的材料,可使用如環氧樹脂的熱固性樹脂、如聚亞醯胺樹脂的熱塑性樹脂、具有如玻璃纖維的加強材料的樹脂,或是例如預浸體的浸漬於熱固性樹脂及熱塑性樹脂中的無機填充劑。此外,可使用熱固性樹脂、光固化樹脂及其他類似者。然而,樹脂絕緣層的材料不特定受限於此。 As the material of the resin insulating layer, a thermosetting resin such as epoxy resin, a thermoplastic resin such as polyimide resin, a resin having a reinforcing material such as glass fiber, or a prepreg impregnated with thermosetting resin and thermoplastic Inorganic filler in resin. In addition, thermosetting resins, photocurable resins, and the like can be used. However, the material of the resin insulating layer is not particularly limited to this.
參看圖8,通孔151可形成於絕緣層200中,以暴露部分的第一電路圖案110。
Referring to FIG. 8, the
此處,通孔151可使用機械鑽孔或雷射鑽孔形成,但並不特別受限於此。
Here, the through
此處,雷射鑽孔可為CO2雷射鑽孔或YAG雷射鑽孔,但不限於此。 Here, the laser drilling may be a CO 2 laser drilling or a YAG laser drilling, but it is not limited thereto.
儘管圖8所示的通孔151具有其直徑朝向下方變小的錐形形狀的狀況,但通孔151亦可具有相關技術中已知的所有形狀,如直徑朝向下方變大的錐形形狀、圓筒形狀及其他類似者。
Although the through
參看圖9,晶種層30可形成於其中形成有通孔151的絕緣層200上。
Referring to FIG. 9, the
晶種層30可藉由執行無電極電鍍來形成,但並不特別地受限於此。
The
參看圖10,具有用於形成第二電路圖案120的開口部分23的第二抗電鍍劑22可形成於其上形成有晶種層30的絕緣層200上。
Referring to FIG. 10, the second plating resist 22 having the opening
參看圖11,通孔151可經填充以形成導通孔150,且開口部分23可經填充以形成第二電路圖案120。
Referring to FIG. 11, the via
導通孔150及第二電路圖案120可藉由利用諸如電鍍製程或類似者的製程填充導電金屬來形成。此處,導電金屬可為具有極好電導率的任何金屬,例如銅(Cu)。
The via
第一電路圖案110及第二電路圖案120可經由導通孔150而彼此電連接。
The
在形成第二電路圖案120之後,可移除第二抗電鍍劑22。
After the
可重複形成導通孔150及第二電路圖案120的製程,以形成堆積層500於絕緣層200(未繪示)上。此處,堆疊的堆積層可形成為兩層、三層、四層或可在熟習此項技術者所運用的範圍內的數層。
The process of forming the via
參看圖12,內部金屬板12及外部金屬板11可彼此分離。
Referring to FIG. 12, the
此處,內部金屬板12及外部金屬板11可使用刀片彼此分離,但不限於此。即,可使用此項技術中已知的所有方法。
Here, the
接著,印刷電路板A的分離的外部金屬板11可經選擇性地蝕刻以在第一電路圖案110的一部分上選擇性地形成導體襯墊
50。
Next, the separated
參看圖13,在本發明的例示性實施例中,抗蝕刻劑25可形成在與外部金屬板11的上方形成有第一電路圖案110的一個表面所對應的外部金屬板11的另一表面上,以便選擇性地形成導體襯墊50。
Referring to FIG. 13, in an exemplary embodiment of the present invention, the
抗蝕刻劑25可僅形成於局部區域中,其中第一電路圖案110定位於其中導體襯墊50形成在第一電路圖案110間之上的所述局部區域中。
The
此處,抗蝕刻劑25的寬度可寬於第一電路圖案110的寬度。
Here, the width of the
為一般感光抗蝕劑膜的抗蝕刻劑25可為乾燥膜抗蝕劑或其他類似者,但並不特別受限於此。
The
抗蝕刻劑25可藉由施加感光抗蝕劑膜、形成圖案化遮罩且接著執行暴露及顯影製程來選擇性地僅形成於局部區域中,其中在所述局部區域中定位有其上形成有導體襯墊50的第一電路圖案110。
The
參看圖14,並未形成抗蝕刻劑25的區域中的外部金屬板11可經蝕刻並移除以形成導體襯墊50。
Referring to FIG. 14, the
並未形成抗蝕刻劑25的區域中的外部金屬板11被移除,且形成有抗蝕刻劑25的區域中的外部金屬板11保持不被移除,以使導體襯墊50可形成。
The
在移除外部金屬板11的區域中,嵌入於絕緣層200中的第一電路圖案110的表面可暴露至絕緣層200的一個表面。此處,第一電路圖案110的表面可與絕緣層200的表面共面,或定位於
低於絕緣層200的表面。在蝕刻外部金屬板11的製程中,第一電路圖案110可經由過度蝕刻,而可產生第一電路圖案110與絕緣層200之間的台階。
In the area where the
選擇性形成的導體襯墊50可由外部金屬板11中保持未被移除的金屬板所形成。
The selectively formed
由保持未被蝕刻的金屬板所形成的導體襯墊50可突出於絕緣層200的表面,藉此改良安裝於其上的部件或類似者的連接性。
The
導體襯墊50的寬度可相同或寬於第一電路圖案110的寬度。導體襯墊50的寬度可藉由調整抗蝕刻劑25的寬度來控制。
The width of the
參看圖15,阻焊劑300可形成於印刷電路板A的表面上,使得用於第一電路圖案110及第二電路圖案120間的連接襯墊的電路圖案被暴露。
Referring to FIG. 15, the solder resist 300 may be formed on the surface of the printed circuit board A so that the circuit pattern for the connection pad between the
如上文所闡述,根據本發明的例示性實施例,具有其中嵌入電路圖案的嵌入式圖案結構時,選擇性地形成突出的導體襯墊,而可改良與安裝於其上的部件或其他類似者的連接性。 As explained above, according to an exemplary embodiment of the present invention, when having an embedded pattern structure in which a circuit pattern is embedded, a protruding conductor pad is selectively formed, and the components mounted on it or other similar ones can be improved Connectivity.
雖然上文已繪示並描述了例示性實施例,但對於熟習此項技術者將顯而易見的是,可在不脫離如由所附申請專利範圍所定義的本發明的範疇的情況下作出修改以及變化。 Although exemplary embodiments have been illustrated and described above, it will be apparent to those skilled in the art that modifications and modifications can be made without departing from the scope of the invention as defined by the scope of the appended patent application and Variety.
50:導體襯墊 50: Conductor pad
110:第一電路圖案 110: first circuit pattern
120:第二電路圖案 120: Second circuit pattern
150:導通孔 150: Via
200:絕緣層 200: insulating layer
300:阻焊劑 300: solder resist
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KR1020140064632A KR20150136914A (en) | 2014-05-28 | 2014-05-28 | Manufacturing method of printed circuit board |
KR10-2014-0064632 | 2014-05-28 |
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KR102173615B1 (en) * | 2018-07-19 | 2020-11-03 | 스템코 주식회사 | Multilayer circuit board and manufacturing method thereof |
KR20200144358A (en) | 2019-06-18 | 2020-12-29 | 삼성전기주식회사 | Printed circuit board |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW201027681A (en) * | 2009-01-05 | 2010-07-16 | Phoenix Prec Technology Corp | Package substrate and fabrication method thereof |
TW201030911A (en) * | 2009-02-05 | 2010-08-16 | Phoenix Prec Technology Corp | Package substrate and fabrication method thereof |
TW201225828A (en) * | 2010-12-14 | 2012-06-16 | Unimicron Technology Corp | Wiring board and method for fabricating the same |
US20120175153A1 (en) * | 2011-01-11 | 2012-07-12 | Shinko Electric Industries Co., Ltd. | Wiring substrate and manufacturing method thereof |
-
2014
- 2014-05-28 KR KR1020140064632A patent/KR20150136914A/en not_active Application Discontinuation
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2015
- 2015-01-08 TW TW104100469A patent/TWI691243B/en active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW201027681A (en) * | 2009-01-05 | 2010-07-16 | Phoenix Prec Technology Corp | Package substrate and fabrication method thereof |
TW201030911A (en) * | 2009-02-05 | 2010-08-16 | Phoenix Prec Technology Corp | Package substrate and fabrication method thereof |
TW201225828A (en) * | 2010-12-14 | 2012-06-16 | Unimicron Technology Corp | Wiring board and method for fabricating the same |
US20120175153A1 (en) * | 2011-01-11 | 2012-07-12 | Shinko Electric Industries Co., Ltd. | Wiring substrate and manufacturing method thereof |
Also Published As
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KR20150136914A (en) | 2015-12-08 |
TW201545621A (en) | 2015-12-01 |
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