JP4863076B2 - Wiring board and manufacturing method thereof - Google Patents

Description

  The present invention relates to a wiring board for various electronic devices and a method for manufacturing the same, and more particularly, in a wiring board on which electronic components such as semiconductor elements are mounted, and a wiring board that enables mounting of electronic components with a narrow pitch between electrodes. It relates to the manufacturing method.

In recent years, with the demand for higher performance and smaller size of electronic devices, higher density and higher functionality of electronic circuits have been demanded. For this reason, development of wiring boards incorporating electronic circuit components such as active elements and passive elements has been actively conducted (see Patent Document 1).
Further, in electronic devices, particularly portable devices, cost reduction is strongly demanded in response to demands for higher functionality and higher performance. As a countermeasure, a cheap resin material such as a copper-clad glass cloth substrate or a copper-clad glass nonwoven substrate is used, and a series of processes are executed with a large substrate size. A method of performing the batch exposure development and performing by a subtractive method (wet etching method) is used.

A conventional wiring board and a manufacturing method thereof will be described with reference to FIG. 6A to 6F are cross-sectional views showing the manufacturing process of the component built-in wiring board.
First, as shown in FIG. 6A, metal films 41 such as copper are formed on both surfaces of an insulating layer 11 made of an insulating material such as glass epoxy or polyamide. Next, as shown in FIG. 6B, a through-hole 13 that penetrates the insulating layer 11 including the metal film 41 in the thickness direction is formed by a drill or the like. Thereafter, by applying electroless copper plating or electrolytic plating to the inner wall surface of the hole 13, as shown in FIG. 6C, a conductive layer (for example, between the wirings described later formed on both surfaces of the insulating layer 11). ) Through holes 19 are formed for electrical connection therebetween.
The insulating layer 11 is not limited to the so-called copper-clad glass cloth double-sided plate in which one or several epoxy-impregnated glass is laminated and copper foil is formed on both sides thereof, and copper foil is formed on both sides of the epoxy-impregnated glass nonwoven fabric. You may use what is called a copper-clad glass nonwoven fabric double-sided board. In this case, the through hole may be formed by a carbon dioxide laser, a YAG laser, or the like, and electroless copper plating and electrolytic plating are applied to the inner wall surface of the hole.

Next, a wiring photoresist (photosensitive resin) (not shown) is formed on the surface of the metal film 41 on both surfaces of the insulating layer 11 shown in FIG. 6B, and a desired wiring pattern is baked on the photoresist. Then, a wiring mask pattern (not shown) is formed. Thereafter, the metal film 41 is etched using the wiring mask pattern as a mask, and the unnecessary wiring photoresist is removed. Thereby, wirings 10 as shown in FIG. 6D are formed on both surfaces of the insulating layer 11.
Next, a photoresist for electrode formation (not shown) is formed on the upper surface of the wiring 10 on both surfaces of the insulating layer 11 shown in FIG. 6D, and an electrode for forming an electrode for mounting an electronic component on the photoresist. The pattern for printing is printed and developed to form an electrode mask (not shown). Thereafter, as shown in FIG. 6E, the electrode 3 is formed by applying electroless nickel plating and electroless gold plating to the wiring 10 at the electronic component mounting location using the electrode mask. Thereafter, the electrode photoresist that is no longer needed is removed.

Next, as shown in FIG. 6 (f), the flip chip 2 is attached to the electronic component mounting portion of the insulating layer 11 with a non-conductive adhesive 18 such as NCF (Non. Conductive Film). The chip 2 is bonded to the electrode 3 through a bump 1 provided on the chip 2 in a face-down manner. As a result, the flip chip 2 is mounted on the wiring board.
JP-A-6-45763

Generally, the diameter of the bump 1 of the flip chip 2 built in the wiring board is about 60 μm and the bump pitch is about 120 μm. However, the diameter and pitch of the bump 1 will become smaller and smaller in the future. A flip chip 2 having a thickness of 30 μm or less and a bump pitch of 60 μm or less is also being developed and put to practical use.
However, in the case of the former (copper-coated glass cloth double-sided board) in which the bump diameter is about 60 μm and the bump pitch is about 120 μm in the conventional wiring board as described above, the thickness of the insulating layer 11 is at least 0.1 mm. The minimum line width / space interval for wiring formation is 40 μm / 40 μm, the through hole diameter is 100 μm, and the land diameter is 200 μm. In the case of the latter (copper-clad glass cloth woven double-sided board), the hole diameter is good and the land diameter can be reduced, so the via or through hole diameter is 100 μm and the land diameter is 160 μm.
In such a design rule, if the bump diameter is 60 μm, the bump pitch is 120 μm, and the flip chip mounting accuracy is ± 5 μm, the size of the electrode 3 on the wiring board needs to be 70 μm, and the amount of side etching during the etching process is reduced. If the thickness is 10 μm, the electrode pattern size of the photoresist for forming the electrode 3 on the wiring board is 90 μm, so the space between the electrode patterns of the photoresist is 30 μm, and moreover, from the design rule (etching processability, etc.) Since the minimum space width of the photoresist is 20 μm, the desired electrode 3 can be formed on the wiring board.

However, in order to conduct both sides of the wiring board, a land having a diameter of 200 μm is required in the former case, and a land having a diameter of 160 μm is required in the latter case. For this reason, all of the conventional wiring boards need to form long wirings 10 radially from the mounting surface and establish conduction with the opposite surface. As a result, there is a problem that the wiring board becomes large. degrees of freedom there is a problem that is small, further, electric properties for wire length other component connection may turn long is poor.
Further, since the space between the electrodes on the wiring board is as narrow as about 50 μm, it is impossible to form the wiring 10 between the electrodes according to the design rule, and the bumps are not on the periphery of the semiconductor element (for example, at the center side). In the case of existing flip chips, there is a problem that mounting is difficult. Furthermore, when the diameter of the bump 1 of the flip chip 2 is 50 μm and the bump pitch is less than 100 μm, it is impossible to form the electrode 3 on the wiring board from the design rule.

  The present invention was made in order to solve the above-described conventional problems, increasing the degree of freedom of wiring design to the substrate, and even if the bump pitch of electronic components such as flip chips is narrow, It is an object of the present invention to provide a wiring board capable of forming electrodes corresponding to the bumps on the substrate and a method for manufacturing the wiring board.

In order to achieve the above object, the invention of claim 1 is a wiring board on which an electronic component is mounted as shown in FIG. 1, and includes an insulating layer and both sides of the insulating layer in the thickness direction. and a wiring formed, the electronic component mounting region provided on at least one surface of the insulating layer, the electronic component mounting region, electrically bonding the electronic component of the peripheral type electrode by flip chip mounting The electrode has a bonding surface connected to the electronic component of the electrode, and the bonding surface is a metal film resistant to a processing liquid used for forming the wiring. It is covered and exposed on the same plane as the surface of the insulating layer, and the remaining portion of the electrode excluding the bonding surface is embedded in the insulating layer.

The invention of claim 5 is a method of manufacturing a wiring board, as shown in FIG. 2, on one insulating layer adhered to the surface of the metal layer, and the peripheral type electrode of the electronic component by flip chip mounting An electrode pattern forming step for forming a plurality of holes for forming an electrode for electrical bonding, and a metal that is resistant to at least a processing solution used when forming a wiring on the surface of the metal layer located in the plurality of holes After forming the film, an electrode forming step of forming a plurality of electrodes for bonding the electronic component by forming a conductor layer on the metal film in the hole, and facing the predetermined position of the metal layer A via hole forming step for forming a via hole penetrating the insulating layer in a thickness direction at a position of the insulating layer; and a conductive material that is electrically connected to the electrode in the hole, and the via hole in the via hole Providing a conductive material conducting to the metal layer, and further forming a conductor layer on the surface of the insulating layer including the hole and the via hole opposite to the metal layer; and patterning the conductor layer to form a wiring. And patterning the metal layer to form a wiring and partially removing the metal layer in a region where an electronic component is mounted to expose the metal film of the electrode on the surface of the insulating layer. It is characterized by providing.

The invention of claim 6 is a method of manufacturing a wiring board, as shown in FIG. 3, on one insulating layer adhered to the surface of the metal layer, and the peripheral type electrode of the electronic component by flip chip mounting An electrode pattern forming step for forming a plurality of holes for forming an electrode for electrical bonding, and a metal that is resistant to at least a processing solution used when forming a wiring on the surface of the metal layer located in the plurality of holes After forming the film, an electrode forming step of forming a plurality of electrodes for bonding the electronic component by forming a conductor layer on the metal film in the hole, and facing the predetermined position of the metal layer A via hole forming step for forming a via hole penetrating the insulating layer in a thickness direction at a position of the insulating layer; and a conductive material that is electrically connected to the electrode in the hole, and the via hole in the via hole Providing a conductive material conducting to the metal layer, and further forming a conductor layer on the surface of the insulating layer including the hole and the via hole opposite to the metal layer; and patterning the conductor layer to form a wiring. And patterning the metal layer to form a wiring and partially removing the metal layer in a region where an electronic component is mounted to expose the metal film of the electrode on the surface of the insulating layer. It is characterized by providing.

The invention of claim 7 is a method of manufacturing a wiring board, as shown in FIG. 4, on one surface of the metal layer, for electrical bonding of the peripheral type electrode of the electronic component by flip chip mounting After forming an electrode pattern forming step of forming a plurality of holes for forming an electrode, and a metal film that is resistant to at least a processing liquid used at the time of wiring formation on the surface of the metal layer located in the plurality of holes, An electrode forming step of forming a plurality of electrodes for electronic component bonding by forming a conductor layer on the metal film in the hole, and the insulating layer facing the predetermined position of the metal layer A via hole forming step of forming a via hole penetrating the insulating layer in the thickness direction; a conductive material that is electrically connected to the electrode in the hole; and a conductive material that is electrically connected to the metal layer in the via hole. Forming a conductor layer on a surface opposite to the metal layer of the insulating layer including the hole and the via hole; patterning the conductor layer to form a wiring; and Forming a wiring by patterning and partially removing the metal layer in a region where an electronic component is mounted to expose the metal film of the electrode on the surface of the insulating layer. .

According to the wiring board according to the first aspect of the invention, in the electronic component mounting region, a plurality of electrodes are peripheral type electrode of the electronic component are electrically bonded by flip-chip mounting, bonding of the electronic component bonding face of the electrode is covered with a metal film resistant to the processing solution used for formation of the wiring, and the metal film is exposed are located on the same surface as the surface of the insulating layer, further electrodes except a bonding surface Since the remaining part of the structure is embedded in the insulating layer, the degree of freedom in designing the wiring to the substrate is increased, and even if the bump pitch of electronic parts such as flip chips becomes narrow, it corresponds to the bump. An electrode can be formed on the substrate.

Further, according to the manufacturing method of the wiring substrate according to the invention of claim 5, 6, 7, wherein the bonding surface of the metal film of the electronic component bonding electrode is exposed from the surface of the insulating layer of the electronic component mounting region, the metal The remaining part of the bonding electrode, excluding the bonding surface of the film, is buried in the insulating layer in the electronic component mounting area, which increases the degree of freedom in designing the wiring on the substrate, and bumps for electronic components such as flip chips Even when the pitch is narrow, electrodes corresponding to the bumps can be formed on the substrate.

  Embodiments of a wiring board and a manufacturing method thereof according to the present invention will be described below with reference to the drawings. The wiring board and the manufacturing method thereof according to the present invention are not limited to the embodiments described below.

(Embodiment 1)
Hereinafter, the wiring board and the wiring board incorporating the flip chip according to the first embodiment will be described with reference to FIG. 1A is a cross-sectional view of a wiring board, FIG. 1B is a cross-sectional view of a wiring board in which a flip chip is incorporated, and FIG. 1C is a side view of a flip chip mounted on the wiring board. is there.
As shown in FIG. 1A, the wiring board 20 includes an insulating layer 11, wirings 10 a and 10 b formed on both front and back surfaces in the thickness direction of the insulating layer 11, and one surface of the insulating layer 11. A plurality of electrodes 3 to which electronic components are electrically bonded are provided, and an electronic component mounting area A is formed on the surface of the insulating layer 11 on which the electrodes 3 are formed. The electrode 3 has a bonding surface 3a with the electronic component, the bonding surface 3a is exposed on the surface of the insulating layer 11, and the remaining part of the electrode 3 excluding the bonding surface 3a is embedded in the insulating layer 11. Has been. That is, the bonding surface 3 a of the electrode 3 is located on the same plane as the exposed surface 11 a of the insulating layer 11. Further, the bonding surface 3a of the electrode 3 is covered with a metal film 7 such as gold that is resistant to a processing solution used when forming the wirings 10a and 10b. Further, some of the plurality of electrodes 3 are configured such that a portion 3b of the plurality of electrodes overlaps with and is in contact with a portion of the plurality of wires 10b. 10b is electrically connected. In addition, another part of the electrodes 3 among the plurality of electrodes is electrically connected to a part of the plurality of wirings 10a through the conductive material 9 provided in the via hole penetrating the insulating layer 11 in the thickness direction. In addition, a part of the plurality of wirings 10a and 10b is electrically connected by a conductive material 9 provided in a via hole penetrating the insulating layer 11 in the thickness direction. Yes.

As shown in FIG. 1B, the flip chip 2 is mounted on the electronic component mounting area A of the wiring board 20 configured as described above by a non-conductive adhesive 18, and the flip chip 2 is Then, it is mounted on the wiring substrate 20 by bonding to the electrode 3 through the bumps 1 provided thereon in a face-down manner. In addition, an insulating layer 11A is laminated and bonded to the surface of the wiring board 20 on the electronic component mounting side, so that the flip chip 2 is built in the wiring board 20. Then, between the part of the wiring 10A formed on the outer surface of the insulating layer 11A and the part of the wiring 10b of the wiring substrate 20, a conductive material 9A provided in a via hole penetrating the insulating layer 11A in the thickness direction. Electrically connected. Further, an insulating layer 11B is laminated and bonded to the surface of the wiring board 20 opposite to the electronic component mounting side, and a part of the wiring 10B and a part of the wiring board 20 formed on the outer surface of the insulating layer 11B. The wiring 10a is electrically connected by a conductive material 9B provided in a via hole that penetrates the insulating layer 11A in the thickness direction.
In addition, as shown in FIG. 1C, the flip chip 2 mounted on the wiring board is a semiconductor chip used for a hybrid IC or the like, and a plurality of flip chips 2 are provided on the surface via a metal film 1a such as an aluminum pad. The bump 1 is formed.

  According to the wiring board 20 according to the present embodiment, the bonding surface 3a of the bonding electrode 3 of the electronic component is exposed on the surface of the insulating layer 11, and the remaining part of the electrode 3 excluding the bonding surface 3a is formed. Since the structure is embedded in the insulating layer 11 and can be connected to the wiring 10a on the side opposite to the mounting surface at the shortest distance from the bump 1 of the flip chip 2, the degree of freedom in designing the wiring on the wiring board 20 is increased. Even when the bump pitch is narrow, the electrodes 3 corresponding to the bumps can be formed on the wiring board 20. As a result, the wiring rule of the electrodes can be at least 20 μm pitch (wiring 10 μm, wiring 10 μm), and the thickness of the insulating layer in the portion where the via hole of the portion that conducts with the opposite surface of the insulating layer is also thin. Therefore, the via hole has a small diameter, and the size of the land can be reduced. For this reason, since the wiring length is shortened, the wiring board 20 can be made small, the degree of freedom in wiring design is large, and the wiring length for connecting other components is shortened, so that the electrical characteristics are improved. Further, it becomes possible to mount a flip chip having a bump diameter of 50 μm and a bump pitch of less than 100 μm, which was impossible in the past, on a wiring board.

Next, a method for manufacturing a wiring board in the embodiment of the present invention will be described with reference to FIGS. 2A to 2F are cross-sectional views showing the manufacturing process of the wiring board in the present embodiment.
In this embodiment, for example, the pitch of the peripheral (electrodes arranged around) type electrode 3 is 80 μm (50 μm square electrode / 30 μm between electrodes), and the diameter of the bump 1, which could not be mounted with a conventional wiring board. In a wiring board on which a flip chip 2 (see FIG. 1 (c)) having a thickness of 40 [mu] m and a bump 1 of 35 [mu] m is mounted, as shown in FIG. A pen film with an adhesive material formed on one side of the film (for example, from a polyethylene naphthalate film, which serves to protect one side of the metal layer by plating or the like, and serves as a support for the metal layer in the process) Or a resist 5 (which may be a photoresist), and a photoresist 6 is formed on the other surface of the metal layer 4. Then, an electrode mask 61 having a plurality of holes 6a for forming an electrode for electronic component bonding is formed on the photoresist 6 by patterning an electrode pattern for electronic component bonding.

  Next, as shown in FIG. 2B, a metal film 7 that is resistant to at least a processing solution used when forming wiring on the exposed surface of the metal layer 4 located in the plurality of holes 6a of the electrode mask 61, for example, chloride Gold having resistance to the second copper solution is formed to a thickness of about 0.1 μm by the electrolytic plating method, and then a conductor layer is formed on the upper surface of the metal film 7 by the electrolytic plating method. The plurality of electrodes 3 are formed. For example, after forming nickel to a thickness of about 3 μm by electrolytic plating, the electrode 3 has a thickness of about 20 μm on the upper surface by electrolytic plating (preferably 10 μm or more in terms of laser resistance). It is comprised by forming in.

Next, after removing the electrode mask 61 and the resist 5 shown in FIG. 2 (b), as shown in FIG. 2 (c), a prepreg (such as an epoxy-based glass nonwoven fabric) is formed on the surface of the electrode 3 and the surface of the metal layer 4. The insulating layer 11 made of is bonded with a hot press. In this case, a Teflon (registered trademark) sheet (not shown) may be bonded to the surface of the insulating layer 11 opposite to the metal layer 4.
Next, after peeling off the Teflon (registered trademark) sheet (not shown), as shown in FIG. 2 (d), the portion of the insulating layer 11 facing the part of the electrodes 3 of the plurality of electrodes and the metal layer 4 Via holes 12 penetrating the insulating layer 11 in the thickness direction are formed at locations of the insulating layer 11 facing a predetermined position by a carbon dioxide gas laser or the like.

  Next, as shown in FIG. 2E, one of a plurality of electrodes is formed in each via hole 12 by electroless plating or electrolytic plating while the surface of the metal layer 4 is protected by a resist or the like (not shown). The conductive material 9 that is electrically connected to a predetermined position of the electrode 3 or the metal layer 4 is deposited, and the conductor layer 8 is formed on the surface of the insulating layer 11 including the upper surface of the conductive material 9 opposite to the metal layer 4. To do. Thereafter, the conductor layer 8 is patterned for wiring and etched using a cupric chloride solution or the like to form the wiring 10a. Further, the metal layer 4 is patterned for wiring, and the second chloride is added. Etching using a copper solution or the like forms the wiring 10b and partially removes the metal layer 4 to form an electronic component mounting area A where the surface of the insulating layer 11 is exposed. The metal film 7 of the electrode 3 located on the surface serves as a bonding surface of the electrical component, and this bonding surface is exposed on the exposed surface 11 a of the insulating layer 11. In this case, the remaining part of the electrode 3 excluding the bonding surface is buried in the insulating layer 11, and the surface of the metal film 7 is located on the same plane as the exposed surface 11 a of the insulating layer 11. Furthermore, a part of the plurality of electrodes 3 is configured such that a part 3b thereof overlaps with a part of the plurality of wirings 10b and is in contact with the surface. Are electrically connected to a part of the wiring 10b. A wiring board can be obtained through such a manufacturing process.

  Here, as a method for connecting between the layers, the conductive material 9 for the via hole may be directly formed on the electrode 3, and a wiring extending radially or inward from the electrode 3 is provided, and the via hole is formed at the tip of the wiring. A land on which the conductive material 9 is formed may be provided. At this time, the wiring formed in the subsequent process and a part of the plurality of electrodes are overlapped and connected. Further, when the bump 1 is present at the center side of the plip chip 2, for example, a wiring 10 having a width of 10 μm may be formed between the electrodes 3 of 30 μm, and the design can be freely made. Further, when the surface of the electrode 3 is made lower than the exposed surface 11a of the insulating layer 11 by the connection method of the flip chip 2, for example, before the metal film 7 is formed by the gold plating described above, a process used at the time of wiring formation Conductive layers not resistant to the liquid, for example, electrolytic copper plating of about several μm are performed.

  According to the wiring board manufactured by the manufacturing method shown in this embodiment, the bonding surface of the metal film 7 of the electronic component bonding electrode 3 is exposed from the exposed surface 11a of the insulating layer 11 in the electronic component mounting region A. In addition, since the remaining part of the electrode 3 except for the bonding surface of the metal film 7 is provided in a buried state in the insulating layer 11 in the electronic component mounting area A, the degree of freedom in designing the wiring on the wiring board is increased. Even when the bump pitch of an electronic component such as a flip chip is narrow, electrodes corresponding to the bump can be formed on the wiring board. As a result, the wiring rule of the electrodes can be at least 20 μm pitch (wiring 10 μm, wiring 10 μm), and the thickness of the insulating layer in the portion where the via hole of the portion that conducts with the opposite surface of the insulating layer is also thin. Therefore, the via hole has a small diameter, and the size of the land can be reduced. For this reason, since the wiring length is shortened, the wiring board can be made smaller, the degree of freedom in wiring design is large, and the wiring length for connecting other components is shortened, so that the electrical characteristics are improved. Further, it becomes possible to mount a flip chip having a bump diameter of 50 μm and a bump pitch of less than 100 μm, which was impossible in the past, on a wiring board.

Next, a method for manufacturing a wiring board in another embodiment of the present invention will be described with reference to FIGS. FIGS. 3A to 3E are cross-sectional views showing a manufacturing process of a wiring board in another embodiment.
First, as shown in FIG. 3A, an insulating layer 11 made of prepreg (epoxy glass nonwoven fabric or the like) is bonded to one surface of a metal layer 4 made of, for example, a 35 μm thick copper foil by a hot press. In this case, a Teflon (registered trademark) sheet (not shown) may be laminated on the surface of the insulating layer 11 opposite to the metal layer 4.

Next, after peeling off the Teflon (registered trademark) sheet (not shown), as shown in FIG. 3B, an electrode for bonding electronic parts that reaches the metal layer 4 through the insulating layer 11 in the thickness direction is formed. A plurality of holes 13 for forming are formed by a carbon dioxide laser or the like (corresponding to the electrode pattern forming step described in the claims).
Next, a metal film 7 that is resistant to at least a processing solution used when forming the wiring on the exposed surface of the metal layer 4 located in the plurality of holes 13, for example, gold that is resistant to cupric chloride solution is formed by electrolytic plating. Then, a conductive layer is formed on the upper surface of the metal film 7 by electrolytic plating to form an electrode 3 for electronic component bonding. The electrode 3 is formed, for example, by forming nickel to a thickness of about 3 μm by electrolytic plating and then forming copper on the upper surface thereof to a thickness of about 20 μm by electrolytic plating. Thereafter, a via hole 12 that penetrates the insulating layer 11 in the thickness direction is formed at a location of the insulating layer 11 facing a predetermined position of the metal layer 4 by a carbon dioxide laser or the like.

  Next, in a state where the surface of the metal layer 4 is protected with a resist or the like (not shown), a conductive material 81 that is electrically connected to the electrode 3 is deposited in each hole 13 by electroless plating and electrolytic plating. A conductive material 82 that is electrically connected to a predetermined position of the metal layer 4 is deposited therein, and a conductor layer 8 is formed on the surface of the insulating layer 11 that includes the upper surfaces of the conductive materials 81 and 82 and is opposite to the metal layer 4. . Thereafter, the conductor layer 8 is subjected to patterning for wiring and etched using a cupric chloride solution or the like to form the wiring 10a. Further, the metal layer 4 is patterned for wiring and etched using a cupric chloride solution or the like to form the wiring 10b, and the metal layer 4 is partially removed so that the surface of the insulating layer 11 is An exposed electronic component mounting region A is formed, and the metal film 7 of the electrode 3 located in the electronic component mounting region A becomes a bonding surface of the electric component, and this bonding surface is exposed to the exposed surface 11a of the insulating layer 11. . In this case, the remaining part of the electrode 3 excluding the bonding surface is buried in the insulating layer 11, and the surface of the metal film 7 is located on the same plane as the exposed surface 11 a of the insulating layer 11. Furthermore, a part of the plurality of electrodes 3 is configured such that a part 3b thereof overlaps with a part of the plurality of wirings 10b and is in contact with the surface. Are electrically connected to a part of the wiring 10b. A wiring board can be obtained through such a manufacturing process.

  According to the wiring board manufactured by the manufacturing method shown in the other embodiment, the bonding surface of the metal film 7 of the electronic component bonding electrode 3 is the electronic component as in the embodiment shown in FIG. Since it is exposed from the exposed surface 11a of the insulating layer 11 in the mounting area A, and the remaining portion of the electrode 3 excluding the bonding surface of the metal film 7 is provided in a buried state in the insulating layer 11 in the electronic component mounting area A. The degree of freedom in designing the wiring on the wiring board can be increased, and even when the bump pitch of electronic components such as flip chips becomes narrow, electrodes corresponding to the bumps can be formed on the wiring board.

Next, a method for manufacturing a wiring board in still another embodiment of the present invention will be described with reference to FIGS. FIGS. 4A to 4D are cross-sectional views showing a manufacturing process of a wiring board in still another embodiment.
First, as shown in FIGS. 2 (a) and 2 (b), a pen film (for example, a polyethylene naphthalate film) in which an adhesive material is formed on one surface of a metal layer 4 made of a copper foil having a thickness of 35 μm, for example. Or a resist 5 (which may be a photoresist), and a photoresist 6 is formed on the other surface of the metal layer 4. Then, an electrode mask 61 having a plurality of holes 6a for forming an electrode for electronic component bonding is formed on the photoresist 6 by patterning an electrode pattern for electronic component bonding. Then, a metal film 7 that is resistant to at least a processing solution used when forming the wiring on the exposed surface of the metal layer 4 located in the hole 6a of the electrode mask 61, for example, gold that is resistant to a cupric chloride solution is electroplated. Then, a conductive layer is formed on the upper surface of the metal film 7 by electrolytic plating to form a plurality of electrodes 3 for electronic component bonding.

Next, a pair of metal layers 4 after the electrodes 3 are formed through the steps shown in FIGS. 2A and 2B are prepared, and a pair of metals after the electrode mask is removed from the metal layers 4. As shown in FIG. 4A, the layer 4 is laminated via an insulating layer 111 made of a prepreg (epoxy glass nonwoven fabric or the like) so that the electrode forming surfaces of the metal layer 4 face each other. It heat-presses from both upper and lower surfaces, and it adhere | attaches as shown in FIG.4 (b). As a result, the electrode 3 is embedded in the insulating layer 111.
Next, as shown in FIG. 4 (c), via holes 12 that penetrate the insulating layer 111 in a thickness direction from predetermined locations of the upper metal layer 4 bonded to each other and reach the lower metal layer 4; Via holes 12 that penetrate through the insulating layer 111 from predetermined locations of the upper metal layer 4 in the thickness direction and reach some of the plurality of electrodes 3 of the lower metal layer 4 respectively. The conductive material 15 is formed by filling the via holes 12 with copper paste or the like and curing the copper paste.

  Next, as shown in FIG. 4D, the upper metal layer 4 is patterned for wiring, and etched using a cupric chloride solution or the like to form the wiring 10a and partially The metal layer 4 is partially removed to form an electronic component mounting area A where the surface of the insulating layer 111 is exposed, and the metal film 7 of the electrode 3 located in the electronic component mounting area A is formed on the insulating layer 111. Exposed on the exposed surface 111a. Further, the metal layer 4 on the lower side is patterned for wiring and etched using a cupric chloride solution or the like to form the wiring 10b, and the metal layer 4 is partially removed to remove the insulating layer 111. The electronic component mounting region B where the surface of the insulating layer 111 is exposed is formed, and the metal film 7 of the electrode 3 located in the electronic component mounting region B is exposed to the exposed surface 111a of the insulating layer 111. In this case, the surface of the metal film 7 serving as the bonding surface of the electrode 3 is exposed from the exposed surface 111 a of the insulating layer 111 and is located on the same plane as the exposed surface 111 a of the insulating layer 111. Further, the remaining part of the electrode 3 excluding the bonding surface of the electrode 3 is embedded in the insulating layer 111. Furthermore, some of the electrodes 3 of the plurality of electrodes are configured such that a part 3b of the plurality of wires overlaps and contacts a part of the wires 10b of the plurality of wires. Are electrically connected to a part of the wiring 10b. Through such a manufacturing process, a wiring board on which electronic components can be mounted on both sides can be obtained.

  According to the wiring board manufactured by such a manufacturing method shown in another embodiment, the bonding surface of the metal film 7 of the electronic component bonding electrode 3 is an electron as in the embodiment shown in FIG. The remaining part of the electrode 3 excluding the bonding surface of the metal film 7 is exposed in the insulating layer 111 in the component mounting areas A and B, and is buried in the insulating layer 111 in the electronic component mounting areas A and B. The design of the wiring board has increased flexibility in wiring design, and even if the bump pitch of electronic components such as flip chips becomes narrow, electrodes corresponding to the bumps should be formed on the wiring board. Can do.

Example 1
Next, Example 1 of the present invention will be described with reference to FIGS. FIG. 5B is a cross-sectional view taken along the line AA ′ in FIG.
First, as shown in FIG. 5A, an adhesive material surface of a pen film 16 (polyethylene naphthalate film) resistant to wiring formation is bonded to one surface of a 35 μm-thick copper foil 411 to obtain a copper foil. On the other surface of 411, a plating solution resistant photoresist 6 having a resolution of 20 μm and a thickness of 25 μm is formed, and a desired exposure and development is carried out, as shown in FIGS. 5A and 5C. Electrode mask 61 having holes 6a for forming flip-chip mounting electrodes 3 (electrodes 50 μm square / 30 μm between electrodes) and wiring forming holes 6b extending radially inward from the electrodes 3 and extending inside the electrode 3 group. Is provided. Next, on the surface of the copper foil 411 located in the holes 6a and 6b, as shown in FIG. 5 (b), gold 71 which is resistant to the cupric chloride solution used for wiring formation is electroplated to 0. Further, the electrode 3 is formed by electroplating nickel on the surface of the gold 71 to a thickness of about 3 μm and electrolytically plating copper on the upper surface of the nickel to a thickness of about 20 μm. Formed.

  Next, after peeling the electrode mask 61 shown in FIG. 5 (b), a prepreg (epoxy glass nonwoven fabric) 111 having a thickness of 0.1 mm laminated with a Teflon (registered trademark) sheet (not shown) is formed in FIG. 5 (d). As shown in FIG. 4, the laminate was laminated on the electrode surface side of the copper foil 411 and heated and pressed at a maximum heating temperature of 175 ° C. for about 2 hours to adhere the prepreg 111 to the electrode 3 and the copper foil 411. Next, the Teflon (registered trademark) sheet was peeled off, and a desired via hole 12 was formed with a carbon dioxide gas laser as shown in FIG. Thereafter, as shown in FIG. 5 (e), a conductive material 9 made of copper is deposited in the via hole 12 by electroless plating and electrolytic plating, and about 35 μm is formed on the surface of the conductive material 9 and the surface of the prepreg 111. A conductive layer 8 was formed by depositing a thickness of copper. Next, after the pen film 16 is peeled off, a photoresist for wiring formation (not shown) is formed on the outer surface of the copper foil 411 and the outer surface of the conductive material 9, and exposure and development are performed to form a desired wiring pattern. (Not shown).

Next, the conductive material 9 and the copper foil 411 are etched using cupric chloride solution with the wiring pattern as a mask, and wirings 10a and 10b are formed on both the front and back surfaces of the substrate as shown in FIG. 5 (f). At the same time, the copper foil 411 is partially removed to form an electronic component mounting area A on which the flip chip 2 and the like are mounted, and the surface of the gold 71 positioned in the electronic component mounting area A is bonded to the component bonding surface. Expose as. Then, by peeling off the photoresist, a wiring substrate, which is an inner layer substrate on which the flip chip 2 or the like according to the present invention is mounted, was produced.
Next, a solder paste was printed on the desired electrode 3, and a chip such as a capacitor or a resistor was adhered, followed by reflow mounting. Next, as shown in FIG. 5 (g), the pitch of the peripheral type electrode is 80 μm (50 μm square electrode / 30 μm between electrodes), the diameter of the gold stud bump 1 is 40 μm, and the bump 1 height is high. The flip chip 2 having a thickness of 35 μm was mounted on a desired electrode 3 via a non-conductive adhesive 18 or the like. Subsequently, the manufacturing process of a series of remaining wiring boards, such as lamination, was performed to produce the component built-in wiring board of the present invention.

  The method for manufacturing a wiring board according to the present invention can be used for manufacturing a wiring board containing an active element or a passive element, such as miniaturization of a wiring board for a portable device or the like, and improvement of electrical characteristics. It is possible to mount the semiconductor element corresponding to the narrow pitch of the surface and to be embedded in the substrate.

(A) is a cross-sectional view of the wiring board in the first embodiment of the present invention, (b) is a cross-sectional view of the wiring board in which the flip chip is embedded in the first embodiment of the present invention, and (c) is an embodiment of the present invention. It is a side view of the flip chip mounted in the wiring board in the form 1. It is sectional drawing which shows the manufacturing process of the wiring board in embodiment of this invention. It is sectional drawing which shows the manufacturing process of the wiring board which shows the other example in embodiment of this invention. It is sectional drawing which shows the manufacturing process of the wiring board which shows the other example in embodiment of this invention. It is sectional drawing which shows the manufacturing process of the wiring board in the Example of this invention. It is sectional drawing which shows the manufacturing process of the wiring board in the past.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Bump, 2 ... Flip chip, 3 ... Electrode, 4 ... Metal layer, 41 ... Copper foil, 5 ... Resist, 6 ... Photoresist, 6a, 6b ... Hole, 61 ... Electrode Mask, 7 ... Metal film, 71 ... Gold, 8 ... Conductor layer, 81, 82 ... Conductive material, 9 ... Conductive material, 10a, 10b ... Wiring, 11 ... Insulating layer, 11a ... Exposed Surface 111, prepreg, 12 ... via hole, 13 ... hole, 15 ... conductive material, 16 ... pen film, 17 ... land, 18 ... non-conductive adhesive, A, B ... electronic components Mounting area.

Claims (7)

A wiring board on which electronic components are mounted,
An insulating layer;
Wiring formed respectively on both front and back surfaces in the thickness direction of the insulating layer,
An electronic component mounting region is provided on at least one surface of the insulating layer,
In the electronic component mounting area, a plurality of electrodes to which peripheral type electrodes of the electronic component are electrically bonded by flip chip mounting are provided,
The electrode has a bonding surface connected to the electronic component of the electrode,
The bonding surface is covered with a metal film that is resistant to a processing solution used for forming the wiring, and the bonding surface is exposed on the same surface as the surface of the insulating layer. The remaining part of the electrode except for is embedded in the insulating layer,
A wiring board characterized by that.   A part of the plurality of electrodes may be connected to the part of the wiring by configuring a part of the electrode to be in contact with a part of the plurality of wirings on the surface. The wiring board according to claim 1.   2. The wiring board according to claim 1, wherein the electrode is connected to the wiring via a conductive material provided in a via hole penetrating the insulating layer in the thickness direction.   The wiring board according to claim 1, wherein the plurality of electrodes to which the electronic component is bonded have different shapes. A mask forming step of forming an electrode mask having a plurality of holes for forming an electrode for electrical bonding with a peripheral type electrode of an electronic component by flip chip mounting on one surface of the metal layer;
After forming a metal film that is resistant to at least a treatment liquid used at the time of wiring formation on the surface of the metal layer located in the plurality of holes of the electrode mask, a conductor layer is formed on the metal film in the hole, and An electrode forming step of forming a plurality of electrodes for electronic component bonding in the hole;
An insulating layer forming step of forming an insulating layer on the surface of the plurality of electrodes and one surface of the metal layer after removing the electrode mask;
Via holes penetrating the insulating layer in the thickness direction are provided at a portion of the insulating layer facing a part of the plurality of electrodes and a portion of the insulating layer facing a predetermined position of the metal layer. Forming a conductive layer on the surface opposite to the metal layer of the insulating layer including the via hole and providing a conductive material that is electrically connected to the electrode or the metal layer in each via hole;
The conductor layer is patterned to form a wiring, and the metal layer is patterned to form a wiring, and the metal layer in an area where an electronic component is mounted is removed to insulate the metal film of the electrode Exposing to the surface of the layer;
A method for manufacturing a wiring board, comprising: An electrode pattern forming step of forming a plurality of holes for forming an electrode for electrical bonding with a peripheral type electrode of an electronic component by flip chip mounting in an insulating layer bonded to one surface of the metal layer;
After forming a metal film that is at least resistant to a processing solution used at the time of wiring formation on the surface of the metal layer located in the plurality of holes, a conductor layer is formed on the metal film in the hole to bond the electronic component An electrode forming step of forming a plurality of electrodes for use;
A via hole forming step of forming a via hole penetrating through the insulating layer in a thickness direction at a position of the insulating layer facing a predetermined position of the metal layer;
A conductive material that is electrically connected to the electrode is provided in the hole, and a conductive material that is electrically conductive to the metal layer is provided in the via hole, and a conductor is provided on a surface opposite to the metal layer of the insulating layer including the hole and the via hole. Forming a layer;
The conductor layer is patterned to form a wiring, and the metal layer is patterned to form a wiring, and the metal layer in a region where an electronic component is mounted is partially removed to form a metal film of the electrode Exposing the surface of the insulating layer;
A method for manufacturing a wiring board, comprising: A mask forming step of forming an electrode mask having a plurality of holes for forming an electrode for electrical bonding with a peripheral type electrode of an electronic component by flip chip mounting on one surface of the metal layer;
After forming a metal film that is at least resistant to a processing solution used at the time of wiring formation on the surface of the metal layer located in the plurality of holes, a conductor layer is formed on the metal film in the hole to bond the electronic component An electrode forming step of forming a plurality of electrodes for use;
A pair of metal layers on which electrodes are formed through the mask formation step and the electrode formation step are prepared, and the pair of metal layers after the electrode mask is removed from these metal layers so that the electrode sides of the metal layers face each other. An adhesion process of laminating and bonding to each other via an insulating layer;
A thickness of the insulating layer from a predetermined portion of the one metal layer and a via hole reaching the other metal layer through the insulating layer from a predetermined portion of the bonded one metal layer in the thickness direction Forming via holes penetrating in a direction and reaching some of the plurality of electrodes of the other metal layer, and providing a conductive material in conduction with the electrodes or the metal layer in these via holes;
The pair of metal layers after removing the electrode mask from the metal layer is patterned to form wiring, and the metal layer in the region where the electronic component is mounted is partially removed to remove the metal of the electrode Exposing a film to the surface of the insulating layer;
A method for manufacturing a wiring board, comprising:

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