TWI484875B - Circuit board and method for manufacturing same - Google Patents

Circuit board and method for manufacturing same Download PDF

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Publication number
TWI484875B
TWI484875B TW102139509A TW102139509A TWI484875B TW I484875 B TWI484875 B TW I484875B TW 102139509 A TW102139509 A TW 102139509A TW 102139509 A TW102139509 A TW 102139509A TW I484875 B TWI484875 B TW I484875B
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layer
circuit board
metal
insulating layer
mask structure
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TW102139509A
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Chinese (zh)
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TW201517710A (en
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Ming Jaan Ho
xian-qin Hu
Fu-Yun Shen
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Zhen Ding Technology Co Ltd
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0224Patterned shielding planes, ground planes or power planes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/07Electric details
    • H05K2201/0707Shielding
    • H05K2201/0723Shielding provided by an inner layer of PCB

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  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Structure Of Printed Boards (AREA)

Description

電路板及電路板製作方法 Circuit board and circuit board manufacturing method

本發明涉及電路板製作技術,尤其涉及一種電路板及一種電路板製作方法。 The present invention relates to a circuit board manufacturing technology, and in particular, to a circuit board and a circuit board manufacturing method.

由於柔性電路板的輕薄化要求,當內部線路作為對外信號傳輸的信號線路時,通常需要使用導電銀箔(EMI shielding film)覆蓋於柔性電路板的外層,以防止外界電磁干擾干擾而造成的訊號損失。 Due to the thin and light requirements of the flexible circuit board, when the internal circuit is used as the signal line for external signal transmission, it is usually required to cover the outer layer of the flexible circuit board with an EMI shielding film to prevent signal loss caused by external electromagnetic interference. .

導電銀箔通常為四層結構,即依次為保護膜、金屬薄膜、異方性導電膠及離型膜。在進行貼合之前,需要將離型膜去除,從而將異方性導電膠與柔性電路板相互結合。然而,由於異方性導電膠的導電效果較金屬差,從異方性導電膠到金屬薄膜過渡時電阻會發生變化,故,在信號回傳時,回傳的效果也會較差。另外,異方性導電膠的厚度較厚,具有較厚的異方性導電膠的柔性電路板的厚度也較厚,難以滿足輕薄化的要求。 The conductive silver foil is usually a four-layer structure, that is, a protective film, a metal film, an anisotropic conductive paste, and a release film in this order. Before the bonding, the release film needs to be removed, thereby bonding the anisotropic conductive paste and the flexible circuit board. However, since the conductive effect of the anisotropic conductive paste is inferior to that of the metal, the resistance changes when the transition from the anisotropic conductive paste to the metal film, so that the effect of the return is poor when the signal is returned. In addition, the thickness of the anisotropic conductive paste is thick, and the thickness of the flexible circuit board having a thick anisotropic conductive paste is also thick, and it is difficult to meet the requirements of lightness and thinness.

有鑒於此,有必要提供一種電路板及一種電路板製作方法,無需使用異方性導電膠也能實現對信號線路的電磁遮罩作用。 In view of this, it is necessary to provide a circuit board and a circuit board manufacturing method, which can realize electromagnetic shielding effect on a signal line without using an anisotropic conductive adhesive.

一種電路板,其包括依次設置的電路基板、含金屬單質的油墨層及電磁遮罩結構。所述電路基板包括相接觸的外層導電線路層及 第一絕緣層。所述外層導電線路層形成於所述第一絕緣層的一側。所述外層導電線路層包括接地線路。所述第一絕緣層內形成有開孔,以露出所述接地線路。所述含金屬單質的油墨層形成於所述第一絕緣層遠離所述外層導電層的表面及從所述開孔露出的接地線路的表面。所述接地線路通過所述含金屬單質的油墨層中的金屬單質與所述電磁遮罩結構電導通。 A circuit board comprising a circuit substrate arranged in sequence, an ink layer containing a metal element, and an electromagnetic mask structure. The circuit substrate includes an outer conductive layer that is in contact with each other and The first insulating layer. The outer conductive layer is formed on one side of the first insulating layer. The outer conductive circuit layer includes a ground line. An opening is formed in the first insulating layer to expose the ground line. The metal element-containing ink layer is formed on a surface of the first insulating layer away from the outer conductive layer and a ground line exposed from the opening. The grounding line is electrically connected to the electromagnetic shielding structure through a metal element in the metal layer containing ink.

一種電路板製作方法,包括步驟:提供電路基板,所述電路基板包括相接觸的外層導電線路層及第一絕緣層,所述外層導電線路層包括信號線路及圍繞所述信號線路的接地線路,所述第一絕緣層內形成有多個開孔,所述接地線路從所述開孔露出;在所述第一絕緣層的表面及開孔內形成含金屬離子的油墨;還原所述含金屬離子的油墨中的金屬離子,以形成含金屬單質的油墨層;以及在所述含金屬單質的油墨層表面形成電磁遮罩結構,所述電磁遮罩結構的材料為銅,所述接地線路通過所述含金屬單質的油墨層中的金屬單質與電磁遮罩結構相互電導通。 A circuit board manufacturing method includes the steps of: providing a circuit substrate, wherein the circuit substrate comprises an outer conductive circuit layer and a first insulating layer that are in contact with each other, and the outer conductive circuit layer comprises a signal line and a grounding line surrounding the signal line, Forming a plurality of openings in the first insulating layer, the ground line is exposed from the opening; forming a metal ion-containing ink on a surface and an opening of the first insulating layer; and reducing the metal containing a metal ion in the ionic ink to form an ink layer containing a metal element; and an electromagnetic mask structure formed on a surface of the metal element-containing ink layer, the material of the electromagnetic mask structure being copper, the ground line passing The metal element in the metal element-containing ink layer and the electromagnetic mask structure are electrically connected to each other.

本技術方案提供的電路板及電路板製作方法,通過印刷對絕緣層的表面形成含金屬離子的油墨,並還原含金屬離子的油墨中的金屬離子,以形成含金屬單質的油墨層,然後通過化學鍍銅及電鍍銅的方式形成電磁遮罩結構。所述電磁遮罩結構可以對信號線路起到電磁遮罩的作用,從而可以防止外界對信號線路產生的電磁干擾。相比於現有技術中採用異方性導電膠形成電磁遮罩層,能夠有效地縮短電路板製作的流程,降低電路板製作成本,並且提高電路板製作的良率。 The circuit board and the circuit board manufacturing method provided by the technical solution form a metal ion-containing ink on the surface of the insulating layer by printing, and reduce metal ions in the metal ion-containing ink to form an ink layer containing a metal element, and then pass through Electroless copper plating and copper plating form an electromagnetic mask structure. The electromagnetic shielding structure can act as an electromagnetic shielding on the signal line, thereby preventing electromagnetic interference generated by the outside on the signal line. Compared with the prior art, the use of the anisotropic conductive adhesive to form the electromagnetic mask layer can effectively shorten the process of circuit board fabrication, reduce the manufacturing cost of the circuit board, and improve the yield of the circuit board.

110‧‧‧電路基板 110‧‧‧ circuit board

111‧‧‧第一絕緣層 111‧‧‧First insulation

112‧‧‧外層導電線路層 112‧‧‧Outer conductive circuit layer

113‧‧‧第二絕緣層 113‧‧‧Second insulation

114‧‧‧內層導電線路層 114‧‧‧Inner conductive circuit layer

115‧‧‧基底層 115‧‧‧ basal layer

110a‧‧‧電磁遮罩形成區 110a‧‧‧Electromagnetic mask forming zone

110b‧‧‧普通區 110b‧‧‧General area

1111‧‧‧開孔 Opening 1111‧‧

1121‧‧‧信號線路 1121‧‧‧Signal lines

1122‧‧‧接地線路 1122‧‧‧ Grounding circuit

1141‧‧‧第一線路 1141‧‧‧First line

1142‧‧‧第二線路 1142‧‧‧second line

120‧‧‧含金屬離子的油墨 120‧‧‧Ink containing metal ions

130‧‧‧含金屬單質的油墨層 130‧‧‧Ink layer containing metal element

140‧‧‧電磁遮罩結構 140‧‧‧Electromagnetic mask structure

141‧‧‧化學鍍銅層 141‧‧‧Electrochemical copper plating

142‧‧‧電鍍銅層 142‧‧‧Electroplated copper layer

150‧‧‧防焊層 150‧‧‧ solder mask

100‧‧‧電路板 100‧‧‧ boards

圖1係本技術方案實施例提供的電路基板的俯視圖。 1 is a top plan view of a circuit substrate provided by an embodiment of the present technical solution.

圖2係圖1的電路基板沿II-II線的剖視圖。 2 is a cross-sectional view of the circuit board of FIG. 1 taken along line II-II.

圖3係在圖2中的第一絕緣層上形成含金屬離子的油墨後的剖視圖。 Figure 3 is a cross-sectional view showing the formation of a metal ion-containing ink on the first insulating layer of Figure 2.

圖4係將圖3中的含金屬離子的油墨中的金屬粒子還原為金屬單質後獲得的含金屬單質的油墨層的剖視圖。 Fig. 4 is a cross-sectional view showing an ink layer containing a metal element obtained by reducing metal particles in the metal ion-containing ink of Fig. 3 into a simple substance of a metal.

圖5係在圖4中的含金屬單質的油墨層形成化學鍍銅層後的剖視圖。 Fig. 5 is a cross-sectional view showing the formation of an electroless copper plating layer of the metal-containing ink layer of Fig. 4.

圖6係在圖5中的化學鍍銅層上形成電鍍銅層後的剖視圖。 Figure 6 is a cross-sectional view showing the formation of an electroplated copper layer on the electroless copper plating layer of Figure 5.

圖7係在圖6中的電鍍銅層上形成防焊層後所獲得到的電路板的剖視圖。 Figure 7 is a cross-sectional view of the circuit board obtained after forming a solder resist layer on the electroplated copper layer of Figure 6.

圖8係在圖7的電路板的俯視圖。 Figure 8 is a top plan view of the circuit board of Figure 7.

下面將結合附圖及實施例對本技術方案提供的電路板及其製作方法作進一步的詳細說明。 The circuit board provided by the technical solution and the manufacturing method thereof will be further described in detail below with reference to the accompanying drawings and embodiments.

本技術方案實施例提供的電路板製作方法包括以下步驟: The circuit board manufacturing method provided by the embodiment of the technical solution includes the following steps:

第一步,請參閱圖1及2,提供電路基板110。 In the first step, referring to Figures 1 and 2, a circuit substrate 110 is provided.

本實施例中,電路基板110為製作形成有導電線路的電路板。電路基板110包括從上至下依次設置的第一絕緣層111、外層導電線路層112、第二絕緣層113、內層導電線路層114及基底層115。電路基板110具有至少一個電磁遮罩形成區110a及除該電磁遮罩形 成區110a外的普通區110b,該電磁遮罩形成區110a用於形成電磁電磁遮罩結構。為便於理解,本實施例中,以電路基板110具有一個電磁遮罩形成區110a為例進行說明。在其他實施例中,所述電磁遮罩形成區110a的個數可以為兩個、三個或者更多個。 In the present embodiment, the circuit substrate 110 is a circuit board on which a conductive line is formed. The circuit substrate 110 includes a first insulating layer 111, an outer conductive wiring layer 112, a second insulating layer 113, an inner conductive wiring layer 114, and a base layer 115 which are disposed in this order from top to bottom. The circuit substrate 110 has at least one electromagnetic mask forming region 110a and a shape other than the electromagnetic mask The normal area 110b outside the area 110a is used to form an electromagnetic electromagnetic mask structure. For the sake of understanding, in the present embodiment, the circuit substrate 110 has an electromagnetic mask forming region 110a as an example for description. In other embodiments, the number of the electromagnetic mask forming regions 110a may be two, three or more.

所述電磁遮罩形成區110a內的第一絕緣層111中形成有多個開孔1111,使得部分外層導電線路層112從所述多個開孔1111露出。 A plurality of openings 1111 are formed in the first insulating layer 111 in the electromagnetic mask forming region 110a such that a portion of the outer conductive layer 112 is exposed from the plurality of openings 1111.

外層導電線路層112位於第一絕緣層111的一側,且所述電磁遮罩形成區110a內的外層導電線路層112包括信號線路1121及接地線路1122。所述接地線路1122圍繞所述信號線路1121,且所述接地線路1122從所述多個開孔1111露出。 The outer conductive layer 112 is located on one side of the first insulating layer 111, and the outer conductive layer 112 in the electromagnetic mask forming region 110a includes a signal line 1121 and a ground line 1122. The ground line 1122 surrounds the signal line 1121, and the ground line 1122 is exposed from the plurality of openings 1111.

第二絕緣層113位於外層導電線路層112遠離所述第一絕緣層111的一側。 The second insulating layer 113 is located on a side of the outer conductive layer 112 away from the first insulating layer 111.

內層導電線路層114位於所述第二絕緣層113遠離所述外層導電線路層112的一側。也就是說,所述第二絕緣層113位於所述外層導電線路層112與內層導電線路層114之間。所述內層導電線路層114包括第一線路1141及第二線路1142。所述第一線路1141位於所述電磁遮罩形成區110a中,且可以為信號線路或者接地線路。所述第二線路1142位於所述普通區110b中。本實施例中,第一線路1141為信號線路,且通過所述第二絕緣層113中的導電孔(圖未示)與所述信號線路1121電性相連。 The inner conductive circuit layer 114 is located on a side of the second insulating layer 113 away from the outer conductive layer 112. That is, the second insulating layer 113 is located between the outer conductive layer 112 and the inner conductive layer 114. The inner conductive circuit layer 114 includes a first line 1141 and a second line 1142. The first line 1141 is located in the electromagnetic mask forming area 110a, and may be a signal line or a ground line. The second line 1142 is located in the normal area 110b. In this embodiment, the first line 1141 is a signal line, and is electrically connected to the signal line 1121 through a conductive hole (not shown) in the second insulating layer 113.

基底層115位於所述內層導電線路層114遠離所述第二絕緣層113一側,用於承載所述第一絕緣層111、外層導電線路層112、第二絕緣層113及內層導電線路層114。所述基底層115基底層115可以 為柔性樹脂層,如聚醯亞胺(Polyimide,PI)、聚對苯二甲酸乙二醇酯(Polyethylene Terephthalate,PET)或聚萘二甲酸乙二醇酯(Polythylene Naphthalate,PEN),也可以為多層基板,包括交替排列的多層樹脂層與多層導電線路層。即該電路基板110可以為導電線路層大於兩層的柔性線路板。 The base layer 115 is located on a side of the inner conductive layer 114 away from the second insulating layer 113 for carrying the first insulating layer 111, the outer conductive layer 112, the second insulating layer 113, and the inner conductive line. Layer 114. The base layer 115 base layer 115 can It may be a flexible resin layer such as Polyimide (PI), Polyethylene Terephthalate (PET) or Polythylene Naphthalate (PEN). A multilayer substrate comprising a plurality of alternating layers of resin layers and a plurality of layers of conductive wiring layers. That is, the circuit substrate 110 may be a flexible circuit board having a conductive circuit layer larger than two layers.

本步驟中,所述外層導電線路層112及內層導電線路層114可以採用現有技術中導電線路的製作方法製作形成。所述開孔1111可以採用雷射燒蝕的方式形成。 In this step, the outer conductive circuit layer 112 and the inner conductive circuit layer 114 can be formed by using a method for manufacturing conductive lines in the prior art. The opening 1111 can be formed by laser ablation.

在形成開孔1111的過程中,部分原來開孔部分的材料殘留在開孔1111內,或者吸附於開孔1111的內壁,形成膠渣。在形成開孔1111之後,還可以進一步包括對電路基板110進行除膠渣處理。即採用等離子體對電路基板110進行處理,使得開孔1111內的膠渣被去除。 In the process of forming the opening 1111, a portion of the material of the original opening portion remains in the opening 1111 or is adsorbed to the inner wall of the opening 1111 to form a slag. After forming the opening 1111, the method further includes performing desmear treatment on the circuit substrate 110. That is, the circuit substrate 110 is processed by plasma so that the slag in the opening 1111 is removed.

第二步,請參閱圖3,通過印刷的方法在電磁遮罩形成區110a內的所述第一絕緣層111的表面及開孔1111內形成含金屬離子的油墨120。所述含金屬離子的油墨120可以為含鈀粒子、銀粒子、金粒子等金屬離子的油墨。本實施例中,所述含金屬離子的油墨120為含鈀粒子的油墨。 In the second step, referring to FIG. 3, a metal ion-containing ink 120 is formed in the surface of the first insulating layer 111 and the opening 1111 in the electromagnetic mask forming region 110a by a printing method. The metal ion-containing ink 120 may be an ink containing metal ions such as palladium particles, silver particles, and gold particles. In this embodiment, the metal ion-containing ink 120 is an ink containing palladium particles.

第三步,請參閱圖4,還原所述含金屬離子的油墨120中的金屬離子,以將所述含金屬離子的油墨120變成含金屬單質的油墨層130。所述含金屬單質的油墨層130的厚度範圍為3微米至5微米。本實施例中,所述含金屬單質的油墨層130為厚度為4微米的含鈀單質的油墨層。 In the third step, referring to FIG. 4, the metal ions in the metal ion-containing ink 120 are reduced to change the metal ion-containing ink 120 into a metal-containing ink layer 130. The metal-containing elementary ink layer 130 has a thickness ranging from 3 micrometers to 5 micrometers. In this embodiment, the metal element-containing ink layer 130 is a palladium-containing ink layer having a thickness of 4 μm.

第四步,請參閱圖5及圖6,在所述含金屬單質的油墨層130表面形成一層電磁遮罩結構140。所述電磁遮罩結構140通過所述含金屬單質的油墨層130中的金屬單質與所述外層導電線路層112中的接地線路1122電性相連。本實施例中,所述電磁遮罩結構140的材料為銅,且所述電磁遮罩結構140可以通過以下步驟形成:首先,以化學鍍銅的方式在所述含金屬單質的油墨層130表面形成一層化學鍍銅層141。 In the fourth step, referring to FIG. 5 and FIG. 6, a layer of electromagnetic shielding structure 140 is formed on the surface of the metal-containing ink layer 130. The electromagnetic shielding structure 140 is electrically connected to the grounding line 1122 in the outer conductive layer 112 by the metal element in the metal-containing ink layer 130. In this embodiment, the material of the electromagnetic shielding structure 140 is copper, and the electromagnetic shielding structure 140 can be formed by the following steps: First, the surface of the metal-containing ink layer 130 is electrolessly plated by copper. A layer of electroless copper plating 141 is formed.

然後,通過電鍍的方式在所述化學鍍銅層141的表面形成一層電鍍銅層142。所述化學鍍銅層141與電鍍銅層142共同構成所述電磁遮罩結構140。 Then, a layer of electroplated copper 142 is formed on the surface of the electroless copper plating layer 141 by electroplating. The electroless copper plating layer 141 and the electroplated copper layer 142 together constitute the electromagnetic shielding structure 140.

第四步,請參閱圖7及圖8,在所述電磁遮罩結構140表面形成防焊層150,得到電路板100。 In the fourth step, referring to FIG. 7 and FIG. 8 , a solder resist layer 150 is formed on the surface of the electromagnetic mask structure 140 to obtain the circuit board 100 .

所述防焊層150可以通過印刷油墨的方式形成。所述防焊層150的厚度小於10微米。 The solder resist layer 150 can be formed by printing ink. The solder resist layer 150 has a thickness of less than 10 microns.

請參閱圖7,本技術方案還提供一種採用上述方法製作形成的電路板100,所述電路板100包括依次設置的電路基板110、含金屬單質的油墨層130、電磁遮罩結構140及防焊層150。 Referring to FIG. 7 , the technical solution further provides a circuit board 100 formed by the above method. The circuit board 100 includes a circuit board 110 , a metal element-containing ink layer 130 , an electromagnetic mask structure 140 , and solder resist . Layer 150.

電路基板110包括從上至下依次設置的第一絕緣層111、外層導電線路層112、第二絕緣層113、內層導電線路層114及基底層115。第一絕緣層111內形成有多個開孔1111,使得部分外層導電線路層112從所述多個開孔1111露出。外層導電線路層112位於第一絕緣層111的一側,其包括信號線路1121及接地線路1122。所述接地線路1122圍繞所述信號線路1121,且所述接地線路1122從所述 多個開孔1111露出。第二絕緣層113位於外層導電線路層112遠離所述第一絕緣層111的一側。 The circuit substrate 110 includes a first insulating layer 111, an outer conductive wiring layer 112, a second insulating layer 113, an inner conductive wiring layer 114, and a base layer 115 which are disposed in this order from top to bottom. A plurality of openings 1111 are formed in the first insulating layer 111 such that a portion of the outer conductive layer 112 is exposed from the plurality of openings 1111. The outer conductive circuit layer 112 is located at one side of the first insulating layer 111 and includes a signal line 1121 and a ground line 1122. The ground line 1122 surrounds the signal line 1121, and the ground line 1122 is from the A plurality of openings 1111 are exposed. The second insulating layer 113 is located on a side of the outer conductive layer 112 away from the first insulating layer 111.

所述含金屬單質的油墨層130形成於所述第一絕緣層111遠離所述外層導電線路層112的表面及從所述開孔1111露出的接地線路1122的表面,且其厚度範圍為3微米至5微米。所述接地線路1122通過所述含金屬單質的油墨層130中的金屬單質與所述電磁遮罩結構140電導通。所述電磁遮罩結構140的材料為銅,且所述電磁遮罩結構140的厚度小於或者等於15微米。所述防焊層150的厚度大於10微米。電磁遮罩結構140的面積大於信號線路1121分佈的區域,並且與接地線路1122相互電連接,從而可以起到對信號線路1121電磁遮罩作用。 The metal element-containing ink layer 130 is formed on a surface of the first insulating layer 111 away from the outer conductive layer 112 and a surface of the ground line 1122 exposed from the opening 1111, and has a thickness of 3 micrometers. Up to 5 microns. The grounding line 1122 is electrically conducted through the metal element in the metal-containing ink layer 130 and the electromagnetic shielding structure 140. The material of the electromagnetic shielding structure 140 is copper, and the thickness of the electromagnetic shielding structure 140 is less than or equal to 15 micrometers. The solder resist layer 150 has a thickness greater than 10 microns. The area of the electromagnetic shielding structure 140 is larger than the area where the signal line 1121 is distributed, and is electrically connected to the ground line 1122 so as to function as an electromagnetic shielding for the signal line 1121.

可以理解的是,也可以根據需要,所述內層導電線路層114的第一線路1141也可以為接地線路,且第一線路1141通過第二絕緣層113中的導電孔與外層導電線路層112的接地線路1122電性相連,此種情況下,信號線路1121位於電磁遮罩結構140與內層導電線路層114之間。電磁遮罩結構140與第一線路1141的面積均大於信號線路1121分佈的區域,並且均與接地線路1122相互電連接,從而可以起到對信號線路1121電磁遮罩作用。 It can be understood that the first line 1141 of the inner conductive layer 114 can also be a ground line, and the first line 1141 passes through the conductive hole and the outer conductive layer 112 in the second insulating layer 113. The grounding lines 1122 are electrically connected. In this case, the signal lines 1121 are located between the electromagnetic shielding structure 140 and the inner conductive wiring layer 114. The area of the electromagnetic shielding structure 140 and the first line 1141 is larger than the area where the signal line 1121 is distributed, and both are electrically connected to the ground line 1122, so that the electromagnetic shielding effect on the signal line 1121 can be performed.

本技術方案提供的電路板及其製作方法,通過印刷對絕緣層的表面形成含金屬離子的油墨,並還原含金屬離子的油墨中的金屬離子,以形成含金屬單質的油墨層,然後通過化學鍍銅及電鍍銅的方式形成電磁遮罩結構。所述電磁遮罩結構可以對信號線路起到電磁遮罩的作用,從而可以防止外界對信號線路產生的電磁干擾。相比於現有技術中採用異方性導電膠形成電磁遮罩層,能夠有 效地縮短電路板製作的流程,降低電路板製作成本,並且提高電路板製作的良率。此外,含金屬單質的油墨層的厚度範圍為3微米至5微米,其小於異方性導電膠的厚度,能夠降低電路板的厚度。 The circuit board provided by the technical solution and the manufacturing method thereof, the metal ion-containing ink is formed on the surface of the insulating layer by printing, and the metal ions in the metal ion-containing ink are reduced to form an ink layer containing the metal element, and then pass the chemistry The electromagnetic shielding structure is formed by copper plating and copper plating. The electromagnetic shielding structure can act as an electromagnetic shielding on the signal line, thereby preventing electromagnetic interference generated by the outside on the signal line. Compared with the prior art, the use of an anisotropic conductive adhesive to form an electromagnetic mask layer can have Effectively shorten the process of board fabrication, reduce board manufacturing costs, and increase board yield. Further, the metal layer-containing ink layer has a thickness ranging from 3 μm to 5 μm, which is smaller than the thickness of the anisotropic conductive paste, and can reduce the thickness of the circuit board.

本發明所屬技術領域中具有通常知識者可以理解,在形成含金屬單質的油墨層130後,還可以在含金屬單質的油墨層130中形成開孔,以露出接地線路1122,而後形成電磁遮罩結構時,電磁遮罩結構填充含金屬單質的油墨層130中的開孔,以使得電磁遮罩結構直接與接地線路1122電性相連。 It will be understood by those of ordinary skill in the art that after forming the ink layer 130 containing the metal element, an opening may be formed in the ink layer 130 containing the metal element to expose the ground line 1122 and then form an electromagnetic mask. In the structure, the electromagnetic mask structure fills the openings in the ink layer 130 containing the metal element, so that the electromagnetic shielding structure is directly electrically connected to the ground line 1122.

綜上所述,本發明確已符合發明專利之要件,遂依法提出專利申請。惟,以上所述者僅為本發明之較佳實施方式,自不能以此限制本案之申請專利範圍。舉凡熟悉本案技藝之人士爰依本發明之精神所作之等效修飾或變化,皆應涵蓋於以下申請專利範圍內。 In summary, the present invention has indeed met the requirements of the invention patent, and has filed a patent application according to law. However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by persons skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims.

110‧‧‧電路基板 110‧‧‧ circuit board

111‧‧‧第一絕緣層 111‧‧‧First insulation

112‧‧‧外層導電線路層 112‧‧‧Outer conductive circuit layer

113‧‧‧第二絕緣層 113‧‧‧Second insulation

114‧‧‧內層導電線路層 114‧‧‧Inner conductive circuit layer

115‧‧‧基底層 115‧‧‧ basal layer

1121‧‧‧信號線路 1121‧‧‧Signal lines

1122‧‧‧接地線路 1122‧‧‧ Grounding circuit

130‧‧‧含金屬單質的油墨層 130‧‧‧Ink layer containing metal element

140‧‧‧電磁遮罩結構 140‧‧‧Electromagnetic mask structure

150‧‧‧防焊層 150‧‧‧ solder mask

100‧‧‧電路板 100‧‧‧ boards

Claims (9)

一種電路板,其包括依次設置的電路基板、含金屬單質的油墨層及電磁遮罩結構,所述電路基板包括相接觸的外層導電線路層及第一絕緣層,所述外層導電線路層形成於所述第一絕緣層的一側,所述外層導電線路層包括接地線路,所述第一絕緣層內形成有開孔,以露出所述接地線路,所述含金屬單質的油墨層形成於所述第一絕緣層遠離所述外層導電層的表面及從所述開孔露出的接地線路的表面,所述接地線路通過所述含金屬單質的油墨層中的金屬單質與所述電磁遮罩結構電導通,其中,所述金屬單質為鈀。 A circuit board comprising a circuit substrate arranged in sequence, an ink layer containing a metal element, and an electromagnetic mask structure, the circuit substrate comprising an outer conductive layer and a first insulating layer in contact with each other, wherein the outer conductive layer is formed on One side of the first insulating layer, the outer conductive layer includes a grounding line, and an opening is formed in the first insulating layer to expose the grounding line, and the metal-containing ink layer is formed in the first insulating layer a first insulating layer away from a surface of the outer conductive layer and a surface of a ground line exposed from the opening, the ground line passing through the metal element in the metal layer-containing ink layer and the electromagnetic mask structure Electrically conductive, wherein the metal element is palladium. 如申請專利範圍第1項所述的電路板,其中,所述電路基板還包括第二絕緣層及內層導電線路層,所述外層導電線路層形成於所述第二絕緣層和第一絕緣層之間。 The circuit board of claim 1, wherein the circuit substrate further comprises a second insulating layer and an inner conductive circuit layer, the outer conductive layer is formed on the second insulating layer and the first insulating layer Between the layers. 如申請專利範圍第1項所述的電路板,其中,所述含金屬單質的油墨層厚度範圍為3微米至5微米,所述電磁遮罩結構的厚度小於或者等於15微米。 The circuit board of claim 1, wherein the metal-containing element has an ink layer thickness ranging from 3 micrometers to 5 micrometers, and the electromagnetic mask structure has a thickness of less than or equal to 15 micrometers. 如申請專利範圍第1項所述的電路板,其中,所述電路板還包括防焊層,所述防焊層形成於電磁遮罩結構的表面,所述防焊層的厚度小於10微米。 The circuit board of claim 1, wherein the circuit board further comprises a solder resist layer formed on a surface of the electromagnetic mask structure, the solder resist layer having a thickness of less than 10 micrometers. 一種電路板製作方法,包括步驟:提供電路基板,所述電路基板包括相接觸的外層導電線路層及第一絕緣層,所述外層導電線路層包括信號線路及圍繞所述信號線路的接地線路,所述第一絕緣層內形成有多個開孔,所述接地線路從所述開孔露出;在所述第一絕緣層的表面及開孔內形成含金屬離子的油墨; 還原所述含金屬離子的油墨中的金屬離子,以形成含金屬單質的油墨層;以及在所述含金屬單質的油墨層表面形成電磁遮罩結構,所述接地線路通過所述含金屬單質的油墨層中的金屬單質與電磁遮罩結構相互電導通。 A circuit board manufacturing method includes the steps of: providing a circuit substrate, wherein the circuit substrate comprises an outer conductive circuit layer and a first insulating layer that are in contact with each other, and the outer conductive circuit layer comprises a signal line and a grounding line surrounding the signal line, Forming a plurality of openings in the first insulating layer, the ground line is exposed from the opening; forming a metal ion-containing ink on a surface and an opening of the first insulating layer; Reducing metal ions in the metal ion-containing ink to form an ink layer containing a metal element; and forming an electromagnetic mask structure on the surface of the metal element-containing ink layer, the ground line passing through the metal-containing element The metal element in the ink layer and the electromagnetic mask structure are electrically connected to each other. 如申請專利範圍第5項所述的電路板製作方法,其中,所述電磁遮罩結構的形成方法包括以下步驟:通過化學鍍銅的方法在所述含金屬單質的油墨層表面形成化學鍍銅層;以及通過電鍍方法在所述化學鍍銅層的表面形成電鍍銅層,所述化學鍍銅層及電鍍銅層共同構成所述電磁遮罩結構。 The method for fabricating a circuit board according to claim 5, wherein the method for forming the electromagnetic mask structure comprises the steps of: forming an electroless copper plating on the surface of the metal element-containing ink layer by electroless copper plating. And forming an electroplated copper layer on the surface of the electroless copper plating layer by an electroplating method, the electroless copper plating layer and the electroplated copper layer collectively constituting the electromagnetic shielding structure. 如申請專利範圍第5項所述的電路板製作方法,其中,所述含金屬單質的油墨層厚度範圍為3微米至5微米,所述電磁遮罩結構的厚度小於或者等於15微米。 The method of fabricating a circuit board according to claim 5, wherein the metal layer-containing ink layer has a thickness ranging from 3 micrometers to 5 micrometers, and the electromagnetic mask structure has a thickness of less than or equal to 15 micrometers. 如申請專利範圍第5項所述的電路板製作方法,其中,所述電路板還包括防焊層,所述防焊層形成於電磁遮罩結構的表面,所述防焊層的厚度小於10微米。 The circuit board manufacturing method of claim 5, wherein the circuit board further comprises a solder resist layer formed on a surface of the electromagnetic mask structure, the solder resist layer having a thickness of less than 10 Micron. 如申請專利範圍第5項所述的電路板製作方法,其中,所述金屬單質為鈀。 The method for fabricating a circuit board according to claim 5, wherein the metal element is palladium.
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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201322836A (en) * 2011-11-24 2013-06-01 Tatsuta Densen Kk Shield film, shielded printed wiring board, and method for manufacturing shield film

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4914262B2 (en) * 2006-03-29 2012-04-11 タツタ電線株式会社 Shield film and shield printed wiring board

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201322836A (en) * 2011-11-24 2013-06-01 Tatsuta Densen Kk Shield film, shielded printed wiring board, and method for manufacturing shield film

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