JP2017152477A - Printed-wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve quality of a connection between a printed-wiring board and an electronic component.SOLUTION: A printed-wiring board 1 of an embodiment includes: a resin insulating layer 11 including a first surface 11a, a second surface 11b on the side opposite to the first surface 11a, and a plurality of recesses 11c formed on the first surface 11a side; a first conductor layer 12 formed in the recess 11c and including a pad 12a; a conductive pillar 17 for electronic component mounting formed on the pad 12a and protruding from the first surface 11a of the resin insulating layer 11; and a solder resist layer 16 formed on the first surface 11a of the resin insulating layer 11 and covering one surface of the first conductor layer 12 exposed to the first surface 11a. The solder resist layer 16 covers a side surface of the conductive pillar 17, and an end surface on the side opposite to the pad 12a side of the conductive pillar 17 is exposed from the solder resist layer 16.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a printed wiring board having a pad, a conductive pillar formed on the pad, and a solder resist layer.

  Patent Document 1 discloses a circuit board and a semiconductor package. The circuit board of Patent Document 1 includes an insulating film, a lower layer wiring formed on the lower surface of the insulating film, an upper layer wiring formed on the insulating film, and a via hole that connects the upper layer wiring and the lower layer wiring through the insulating film. have.

JP 2005-327780 A

  Patent Document 1 shows a semiconductor package in FIG. According to FIG. 5 of Patent Document 1, the semiconductor element is mounted on the lower layer wiring of the circuit board. As shown in FIG. 5 of Patent Document 1, the lower layer wiring is recessed from the insulating layer. Therefore, it is considered that the distance between the semiconductor element and the lower layer wiring becomes longer. It is expected that it is difficult to mount a semiconductor element on a circuit board. Further, in the semiconductor package of Patent Document 1, it is considered that the distance between the semiconductor element and the circuit board is shortened. The reliability of the connection between the circuit board and the semiconductor element is expected to be low.

  The printed wiring board of the present invention has a first surface and a second surface opposite to the first surface, the resin insulating layer having a plurality of recesses formed on the first surface side, and the recesses A first conductor layer including a pad, a conductive pillar formed on the pad and protruding from a first surface of the resin insulating layer, and the resin insulating layer. A solder resist layer that is formed on the first surface and covers one surface of the first conductor layer exposed on the first surface. The solder resist layer covers the side surface of the conductive pillar, and the end surface of the conductive pillar opposite to the pad side is exposed from the solder resist layer.

  According to the printed wiring board of the embodiment of the present invention, the yield of mounting electronic components such as semiconductor elements is increased. Even if the wiring pattern is made finer as the pitch of the connection part to the semiconductor element is reduced, there is little possibility of short circuit. The connection reliability between the electronic component and the printed wiring board is increased.

Sectional drawing for demonstrating the printed wiring board of one Embodiment of this invention. The figure which shows an example of an electrode. The figure which shows the other example of an electrode. The figure which shows the other example of an electrode. The figure which shows an example of an electroconductive pillar. The figure which shows another example of an electroconductive pillar. The figure which shows the manufacturing method of the printed wiring board shown by FIG. The figure which shows the manufacturing method of the printed wiring board shown by FIG. The figure which shows the manufacturing method of the printed wiring board shown by FIG. The figure which shows the manufacturing method of the printed wiring board shown by FIG. The figure which shows the manufacturing method of the printed wiring board shown by FIG. The figure which shows the manufacturing method of the printed wiring board shown by FIG. The figure which shows the manufacturing method of the printed wiring board shown by FIG. The figure which shows the manufacturing method of the printed wiring board shown by FIG. The figure which shows the manufacturing method of the printed wiring board shown by FIG. The figure which shows the manufacturing method of the printed wiring board shown by FIG. The figure which shows the manufacturing method of the printed wiring board shown by FIG. The figure which shows the other example of an electrode. The figure which shows another example of an electroconductive pillar. The figure which shows another example of an electroconductive pillar. The figure which shows the other example of the printed wiring board of FIG.

  An embodiment of a printed wiring board of the present invention will be described with reference to the drawings. Drawing 1 is a figure explaining the section of printed wiring board 1 of an embodiment. The printed wiring board 1 includes a resin insulating layer 11 having a first surface 11a and a second surface 11b opposite to the first surface 11a, and a pad 12a formed on the first surface 11a of the resin insulating layer 11. It includes a conductive pillar 17 for mounting an electronic component formed on the first conductor layer 12 and the pad 12a, and a solder resist layer 16 formed on the first surface 11a of the resin insulating layer 11. . The conductive pillar 17 protrudes from the first surface 11 a of the resin insulating layer 11. The solder resist layer 16 covers one surface of the first conductor layer 12 exposed at the first surface 11 a of the resin insulating layer 11. Further, the solder resist layer 16 covers the side surface of the conductive pillar 17. The conductive pillar 17 has an upper surface 17T which is an end surface opposite to the pad 12a, and the upper surface 17T is exposed from the solder resist layer 16. An electrode 21 for connecting to an electronic component is formed by the pad 12 a and the conductive pillar 17. An electronic component is mounted on the upper surface 17T of the conductive pillar 17.

  Examples of the electronic component include a semiconductor element, a passive element (such as a capacitor and a resistor), an interposer having a wiring layer, a semiconductor element having a rewiring layer, and a WLP (Wafer Level Package). For example, a plurality of conductive pillars 17 are formed according to the number of electrodes of the electronic component. Although three conductive pillars 17 are shown in FIG. 1, the conductive pillars 17 are not limited to this and may be provided in any number.

  As shown in FIG. 1, the resin insulating layer 11 has a recess 11c for the first conductor layer 12 on the first surface 11a side. The first conductor layer 12 is formed in the recess 11c. The first conductor layer 12 is buried in the recess 11c. The first conductor layer 12 has a top surface T and a back surface B opposite to the top surface T. The top surface T faces the first surface 11a of the resin insulating layer 11, and the back surface B faces the bottom of the recess 11c. The top surface T of the first conductor layer 12 of the printed wiring board 1 of the embodiment shown in FIG. 1 is recessed from the first surface 11a. However, the top surface T of the first conductor layer 12 may be flush with the first surface 11a. A second conductor layer 14 is formed on the second surface 11 b of the resin insulating layer 11. The second conductor layer 14 protrudes from the second surface 11 b of the resin insulating layer 11. A via conductor 15 that penetrates the resin insulating layer 11 and connects the first conductor layer 12 and the second conductor layer 14 is formed.

  As shown in FIG. 1, the solder resist layer 16 is formed on substantially the entire surface of the printed wiring board 1. The solder resist layer 16 includes a plurality of openings 16a. Each opening 16a exposes an upper surface 17T that is the outermost surface of the conductive pillar 17 for mounting the electronic component. In the printed wiring board 1 of the embodiment, the side surface of the conductive pillar 17 and the top surface T exposed from the conductive pillar 17 of the pad 12 a are covered with the solder resist layer 16. In the example of FIG. 1, the side surface of the conductive pillar 17 is covered with the solder resist layer 16 up to substantially the same height as the upper surface 17T. That is, only the upper surface 17T of the conductive pillar 17 is exposed from the solder resist layer 16. For example, solder bumps (not shown) are formed on the upper surface 17T, and the conductive pillars 17 and the electronic components are connected by the solder bumps. Since the portions other than the upper surface 17T of the conductive pillar 17 are covered with the solder resist layer 16, the solder cannot wet and spread on the side surfaces of the conductive pillar 17. Adjacent conductive pillars 17 are not easily short-circuited with solder. Even when the connection parts of the electronic components are narrow in pitch, short-circuiting between the connection parts hardly occurs. An electronic component having electrodes arranged at a narrow pitch can be appropriately mounted. Note that the side surface of the conductive pillar 17 may not be covered with the solder resist layer 16 up to the height of the upper surface 17T. An example is shown in FIG. It is considered that even if the side surfaces of the conductive pillars 17 are only partially covered, it is difficult for the conductive pillars 17 to be short-circuited.

  The first conductor layer 12 includes wiring 12b formed in a predetermined pattern in addition to the pad 12a. The exposed surface of the wiring 12 b from the first surface 11 a of the resin insulating layer 11 is also covered with the solder resist layer 16. Solder does not scatter from the upper surface 17T of the conductive pillar 17 and adhere to the wiring 12b. For example, as in the example of FIG. 1, even when a plurality of narrow wirings 12b1 are formed as a wiring 12b at a narrow pitch between the pads 12a, between the wirings 12b1 and between the wirings 12b1 and the conductive pillars 17. Insulating properties are ensured.

  As shown in FIG. 1, the solder resist layer 16 is recessed between the adjacent conductive pillars 17. The surface of the solder resist layer 16 opposite to the resin insulating layer 11, that is, the surface of the solder resist layer 16 has a convex shape toward the opposite side of the resin insulating layer 11 near the conductive pillar 17. Yes. The surface of the solder resist layer 16 has a curved surface portion. The solder resist layer 16 in the vicinity of the conductive pillar 17 is thick. The thickness of the solder resist layer 16 in contact with the side surface of the conductive pillar 17 (the distance from the top surface T of the pad 12a to the surface of the solder resist layer 16 in the portion in contact with the side surface of the conductive pillar 17) It is substantially equal to the length h of the pillar 17 (see FIG. 2A). As will be described later, the length h of the conductive pillar 17 is not less than 15 μm and not more than 35 μm. Therefore, the thickness of the portion of the solder resist layer 16 in contact with the side surface of the conductive pillar 17 may be 15 μm or more and 35 μm or less. The thickness of the solder resist layer 16 in the recessed portion between the conductive pillars 17 (for example, on the wiring 12b in FIG. 1) is 5 μm or more and 15 μm or less at the thinnest portion. Since the surface of the solder resist layer 16 is recessed between the conductive pillars 17, more space can be secured between the electronic components connected on the conductive pillars 17 and the surface of the solder resist layer 16. For example, it is easy to fill the underfill between the electronic component and the printed wiring board 1. Furthermore, for example, the excess solder supplied to the upper surface 17T of the conductive pillar 17 can spread in the length direction of the conductive pillar 17 in this space. It is considered that the solder is difficult to spread toward the adjacent conductive pillar 17. It is considered that the short circuit between the conductive pillars 17 due to the contact of the solder hardly occurs. However, the surface of the solder resist layer 16 may be flat.

  As shown in FIG. 1, the printed wiring board 1 is provided with a lower solder resist layer 160 having a plurality of openings 160 a on the second surface 11 b and the second conductor layer 14 of the resin insulating layer 11. . The lower solder resist layer 160 is formed on substantially the entire surface of the printed wiring board 1. Each opening 160a exposes each pad 160P for connection to the motherboard.

  An example of the electrode 21 formed by the pad 12a and the conductive pillar 17 on the pad 12a is shown in an enlarged view in FIG. 2A. The upper surface 17T of the conductive pillar 17 is exposed from the solder resist layer 16 that covers the first surface 11a side of the resin insulating layer 11. The side surface of the conductive pillar 17 and the top surface T of the first conductor layer 12 exposed from the conductive pillar 17 are covered with the solder resist layer 16.

  The conductive pillar 17 has an upper surface 17T and a lower surface 17U opposite to the upper surface 17T. The lower surface 17U is indicated by a dotted line in the figure. The upper surface 17T of the conductive pillar 17 protrudes from the first surface 11a of the resin insulating layer 11. An electronic component is mounted on the upper surface 17T of the conductive pillar 17. The conductive pillar 17 is connected to the pad 12a through the lower surface 17U. In the example of FIG. 2A, the lower surface 17U and the top surface T are located on the same plane. The conductive pillar 17 has a length h. The length h is 15 μm or more and 35 μm or less. Since the length h has a predetermined length, the mounting yield of electronic components is high. Further, the stress caused by the difference between the thermal expansion coefficient of the electronic component and the thermal expansion coefficient of the printed wiring board 1 is alleviated by the conductive pillar 17. Even if the printed wiring board on which the electronic component is mounted is subjected to a heat cycle, the connection between the electronic component and the printed wiring board 1 is stable for a long time.

  As shown in FIG. 2A, in the printed wiring board 1 of one embodiment, the top surface T of the pad 12a is recessed from the first surface 11a. A distance H2 between the first surface 11a of the resin insulating layer 11 and the top surface T is 5 μm or less. Since the printed wiring board 1 has the conductive pillar 17 protruding from the first surface 11a, even if the top surface T of the pad 12a is recessed from the first surface 11a, the electronic component is reliably mounted on the printed wiring board 1. Is done. The protruding height H1 is 18 μm or more and 30 μm or less. An electronic component is securely mounted on the conductive pillar 17.

  The shape of the pad 12a and the conductive pillar 17 in FIG. 2A is a cylinder. In FIG. 2A, the conductive pillar 17 and the pad 12a are cut along a plane that passes through the center of the upper surface 17T and is perpendicular to the upper surface 17T. A straight line passing through the center of the upper surface 17T and perpendicular to the upper surface 17T passes through the center of the top surface T of the pad 12a. That is, the conductive pillar 17 is formed in the approximate center of the pad 12a.

  The diameter W1 of the conductive pillar is smaller than the diameter W2 of the pad 12a. Accordingly, the top surface T of the outer peripheral portion 12a1 of the pad 12a is exposed. 2A, the pad 12a is formed by a central portion 12a2 formed below the conductive pillar 17 and an outer peripheral portion 12a1 exposed from the conductive pillar 17. As shown in FIG. The diameter W1 of the conductive pillar 17 is the diameter of the upper surface 17T of the conductive pillar 17. Alternatively, the maximum value among the distances between two points belonging to the outer periphery of the upper surface 17T corresponds to the diameter W1. The diameter W2 of the pad 12a is the diameter of the top surface T of the pad 12a. Alternatively, the maximum value among the distances between two points belonging to the outer periphery of the top surface T corresponds to the diameter W2. Alternatively, the maximum value among the distances between two points belonging to the outer periphery of the recess 11c corresponds to the diameter W2. The diameter W1 is 15 μm or more and 75 μm or less. The diameter W2 is 30 μm or more and 100 μm or less. The ratio of the diameter W2 to the diameter W1 (diameter W2 / diameter W1) is 1.5 or more and 2.5 or less. Since the ratio (diameter W2 / diameter W1) has a predetermined value, the stress is relieved by the conductive pillar 17. In addition, the conductive pillar 17 is unlikely to deteriorate during the heat cycle. In the example of FIG. 2A, the diameter W1 is 20 μm and the diameter W2 is 35 μm. The outer periphery of the recess 11c will be described below. The recess 11c is cut by a surface Z1 that passes through a position intermediate between the first surface 11a and the bottom surface and is parallel to the first surface 11a. The distance between the surface Z1 and the first surface 11a is equal to the distance between the surface Z1 and the bottom of the recess 11c. The outer periphery of the recessed part 11c is obtained by connecting the intersection of the surface Z1 and the side wall of the recessed part 11c. In addition, the side wall of the recessed part 11c and the side wall of the resin insulating layer which forms the recessed part 11c are substantially the same.

  In the example of FIG. 2A, the conductive pillar 17 includes a metal layer 17b formed on the pad 12a and a metal film 17c formed on the metal layer 17b. For example, the metal layer 17b is formed from the metal foil 13 (see FIG. 4B). The metal film 17c is formed by electroless plating or electrolytic plating. An example of the metal film 17c is an electrolytic copper plating film. The conductive pillar 17 of FIG. 2A further includes a conductor layer 17a located below the metal layer 17b. The conductor layer 17a is formed between the metal layer 17b and the pad 12a. The conductor layer 17a and the pad 12a are separated by the lower surface 17U. However, the pad 12a and the conductor layer 17a are integrally formed. That is, the conductor layer 17a is a part of the pad 12a. The conductive pillar 17 and the pad 12a share a part of the pad 12a (the protrusion of the pad 12a). In other words, the boundary between the conductive pillar 17 and the pad 12a is formed by the first conductor layer 12 constituting the pad 12a. The conductor layer 17a and the pad 12a are, for example, electrolytic copper plating films.

  The thickness of the conductor layer 17a is greater than 0 and 5 μm or less. When the thickness of the conductor layer 17a is 1 μm or more and 4 μm or less, peeling between the electrode 21 and the resin insulating layer 11 hardly occurs as described below. When a lateral force is applied to the tip of the conductive pillar 17, the conductive pillar 17 tends to bend. The force tends to concentrate on the interface between the conductive pillar 17 and the pad 12a. However, in the embodiment, the conductive pillar 17 and the pad 12a are integrally connected with the same material. Even if the conductive pillar 17 is subjected to stress, peeling between the conductive pillar 17 and the pad 12a hardly occurs. The distance H2 between the first surface 11a and the lower surface 17U is preferably 4 μm or less. When the distance H2 exceeds 4 μm, the distance between the lower surface 17U and the back surface B is shortened. When the conductive pillar 17 is stressed, the pad 12a is easily peeled off from the resin insulating layer 11.

  The conductive pillar 17 preferably has a metal layer 17b formed of the metal foil 13 between a metal film 17c made of a plating film and a conductor layer 17a made of a plating film. The thickness of the plating film may vary depending on the position in the plating tank. Therefore, when all of the conductive pillars 17 are formed by plating, there is a possibility that the variation in height of the conductive pillars 17 will increase. If the height of the conductive pillar 17 varies, the distance between the electrode of an electronic component such as a semiconductor element and the upper surface 17T of the conductive pillar 17 varies. If the variation is large, some of the plurality of conductive pillars 17 are not connected to the electrodes of the electronic component. Alternatively, some conductive pillars 17 are incompletely connected to the electrodes of the electronic component. Connection reliability is impaired. Since the conductive pillar 17 includes the metal layer 17b formed from the metal foil 13, the thickness of the film formed by plating in the conductive pillar 17 can be reduced. The effect of plating variation is reduced. Since the thickness of the metal foil is uniform, the thickness of the metal layer 17b formed from the metal foil 13 is uniform. Therefore, by having the metal layer 17b, the variation in the height of the conductive pillar 17 is reduced. Examples of the metal foil 13 are copper foil and nickel foil. The height of the conductive pillar 17 is controlled within a predetermined range. For example, the difference between the height of the highest conductive pillar 17 and the height of the lowest conductive pillar is 10 μm or less.

  The thickness of the metal layer 17b (distance between the first surface 17bF and the second surface 17bS) is 2 μm or more and 7 μm or less. The metal layer 17b is formed by etching the metal foil 13. However, details will be described later. When the thickness of the metal layer 17b is 2 μm or more, the variation in the length h of the conductive pillar 17 is reduced. A conductive pillar 17 having high connection reliability is provided. If the metal layer 17b is too thick, it takes time when unnecessary portions of the metal foil 13 are removed by etching. Production efficiency is low. Further, when unnecessary portions of the metal foil are removed by etching, the upper surface and side walls of the metal film 17c are also dissolved in the etching solution. It is difficult to dissolve uniformly. Therefore, if the etching time is long, variations in the height and thickness of the conductive pillar 17 tend to increase. When the variation becomes large, stress concentrates on the specific conductive pillar 17, which may reduce the connection reliability between the electronic component and the printed wiring board. From such a viewpoint, the thickness of the metal layer 17b is preferably 7 μm or less.

  The thickness of the metal film 17c is 13 μm or more and 25 μm or less. Even if the metal film 17c is formed by plating, the variation in the thickness of the metal film 17c is reduced. The stress can be relieved by the conductive pillar 17.

  The metal layer 17 b and the metal film 17 c forming the conductive pillar 17 protrude from the first surface 11 a of the resin insulating layer 11. The conductor layer 17a is formed in the recess 11c for the first conductor layer 12. The conductive pillar 17 is in the space and is not in contact with the resin insulating layer 11. Therefore, when the conductive pillar 17 receives stress, the conductive pillar 17 can be relatively freely deformed. Due to the deformation, the conductive pillar 17 can absorb the stress.

  The side wall of the conductive pillar 17 and the top surface T of the pad 12a intersect at an angle C shown in FIG. 2A. When stress acts on the conductive pillar 17, the stress tends to concentrate on the corner C. However, since the top surface T of the pad 12a is recessed from the first surface 11a of the resin insulating layer 11, it is difficult for stress to be applied to the corner C. Furthermore, in the electrode 21 of FIG. 2A, since the pad 12a and the conductor layer 17a are integrally formed, cracks are hardly generated from the corner C to the electrode. Even if stress is applied to the corner C, the electrode 21 is unlikely to deteriorate.

  In the example of FIG. 2A, the angle between the side wall of the conductive pillar 17 and the top surface T of the pad 12a is 90 degrees. Further, the conductive pillar 17 has a certain thickness from the upper surface 17T to the lower surface 17U of the conductive pillar 17. The diameter of the lower surface 17U and the diameter of the upper surface 17T are substantially equal. Such a shape can be obtained by a mechanical method such as dry etching.

  Another example electrode is shown in FIGS. 2B and 2C. Similar to the example of FIG. 2A, the conductive pillar 17 of FIGS. 2B and 2C is formed under the metal layer 17b formed on the pad 12a, the metal film 17c formed on the metal layer 17b, and the metal layer 17b. And a conductor layer 17a located on the surface. However, unlike the example of FIG. 2A, the diameter of the conductive pillar 17 is not constant in the examples of FIGS. 2B and 2C. The conductor layer 17a is thicker from the interface between the metal layer 17b and the conductor layer 17a toward the lower surface 17U of the conductive pillar 17. The side wall of the conductive pillar 17 and the top surface T of the pad 12a intersect at a corner C2 in FIG. 2B or an intersection C2 in FIG. 2C. Even if stress concentrates on the corner C2 or the intersection C2, the diameter W3 of the lower surface 17U is large, so that defects such as cracks are unlikely to occur in the electrode 21 from the intersection C2.

  According to the embodiment, a large electronic component can be mounted on the printed wiring board 1. A large electronic component has sides of 20 mm or more. As the size of electronic components increases, the magnitude of stress increases. In order to withstand stress, the strength of the conductive pillar 17 is preferably high. However, when the number of heat cycles increases, the joint (for example, solder bump) between the conductive pillar 17 and the electronic component may deteriorate. For example, the connection resistance between the electronic component and the printed wiring board increases in a heat cycle. This is because the rigidity of the conductive pillar 17 is high, and stress tends to concentrate on the joint.

  In order to prevent such a problem, the diameter W3 of the lower surface 17U is larger than the diameter W1 of the upper surface in the examples of FIGS. 2B and 2C. However, as the ratio (diameter W3 / diameter W1) increases, the difference between the strength of the conductive pillar 17 near the upper end and the strength near the lower end increases. Since the strength near the lower end is high, the portion near the lower end is difficult to deform. If the value of the ratio (diameter W3 / diameter W1) exceeds 1.2, the effect of stress relaxation due to deformation becomes small. There is a possibility that stress concentrates on the specific conductive pillar 17 in the heat cycle, and the specific conductive pillar 17 deteriorates. Therefore, in embodiment, the diameter W3 is 1.2 times or less of the diameter W1. If the conductor located below the lower surface 17U is too thick, the deformation of the conductor when the conductor is stressed is small. In that case, the conductor located below the lower surface 17U does not have the function of the conductive pillar 17. Or the ratio which contributes to an effect is small. According to the conductive pillar 17 of the embodiment, the stress is relieved in the thin part, and the strength of the conductive pillar 17 is ensured in the thick part. The position of the lower surface 17U is determined from the viewpoints of connection reliability, durability, stress relaxation, and the like according to the thickness of the conductor layer 17a that increases toward the lower surface 17U. In the example of FIG. 2B, the distance K between the lower surface 17U and the first surface 11a is 1 μm or more and 4 μm or less. When the distance K satisfies this range, it is difficult to apply a force directly to the lower surface 17U. The connection reliability between the conductive pillar 17 and the pad 12a is high.

  2B and 2C, unlike FIG. 2A, the top surface T of the pad 12a exposed from the conductive pillar 17 is inclined with respect to the first surface 11a. The angle between the side wall of the conductive pillar 17 and the top surface T of the pad 12a is preferably larger than 90 degrees. The thickness of the outer peripheral portion 12a1 (the distance between the back surface B and the top surface T) increases from the side wall of the pad 12a toward the central portion 12a2. In the example of FIGS. 2B and 2C, as described above, the exposed surface of the conductor layer 17a is thickened so that the thickness of the conductor layer 17a increases from the outer periphery of the lower surface 17U of the conductive pillar 17 toward the center of the lower surface 17U. Is tilted. The top surface T of the pad 12a and the exposed surface of the conductor layer 17a in FIG. 2B are flat surfaces, while the top surface T of the pad 12a and the exposed surface of the conductor layer 17a in FIG. 2C are bent. In the example of FIGS. 2B and 2C, since the side wall of the conductive pillar 17 and the top surface of the pad 12a do not intersect at 90 degrees, the stress applied to the corner C2 and the intersection C2 is dispersed. The reliability of the electrode 21 is increased. Further, in the example of FIG. 2C, since the top surface T is bent, it is considered that the deterioration of the pad 12a during the heat cycle is particularly small. The electrode 21 is unlikely to deteriorate during the heat cycle. It is considered that the connection reliability between the electrode 21 and the electronic component is high.

  The shape shown in FIG. 2B is obtained, for example, by using the conductive pillar 17 as a mask and etching the top surface T of the pad 12a and the metal foil with an etching solution. The shape shown in FIG. 2C is obtained, for example, when the conductive pillar 17 is used as a mask and the top surface T of the pad 12a and the metal foil are removed by etching by spraying an etching solution. Since the resin insulating layer 11 and the conductive pillar 17 interfere with the supply of the etching solution, the shape shown in FIG. 2C is obtained.

  FIG. 3A shows an example of the conductive pillar 17 having the recess 17d. The side surface of the metal layer 17b is recessed from the side surface of the metal film 17c. The side surface of the metal layer 17b is recessed from the side surface of the conductor layer 17a. FIG. 3B shows a conductive pillar 17 having a convex portion 17e. In FIG. 3B, the side wall of the metal layer 17b protrudes from the side wall of the metal film 17c. The side wall of the metal layer 17b protrudes from the side wall of the conductor layer 17a. When the conductive pillar 17 has the concave portion 17d and the convex portion 17e, the effect of stress relaxation by the conductive pillar 17 can be increased. However, if the size of the concave portion 17d and the convex portion 17e is too large, the conductive pillar 17 is likely to crack from the concave portion 17d and the convex portion 17e. When the thickness of the metal layer 17b is in the above-described range, the concave portion 17d and the convex portion 17e having an appropriate size can be formed. A method of forming the concave portion 17d and the convex portion 17e will be described later.

  An embodiment of a method for manufacturing the printed wiring board shown in FIG. 1 will be described with reference to FIGS.

  As shown in FIG. 4A, a support plate 18 is prepared. An example of the support plate 18 is a metal plate or a copper clad laminate. In FIG. 4A, a double-sided copper-clad laminate is used as the support plate 18. The metal foil 13 is laminated on both sides of the double-sided copper-clad laminate 18. The metal foil 13 has a first surface and a second surface opposite to the first surface. The first surface of the metal foil 13 is exposed. For example, the thickness of the metal foil 13 is 2 to 7 μm. A preferred thickness is 5 μm. The thickness of the insulating substrate 18a of the double-sided copper clad laminate 18 is 100 μm, and the thickness of the copper foil 18b is 18 μm. An adhesive layer (not shown) is formed between the double-sided copper-clad laminate 18 and the metal foil 13, and the double-sided copper-clad laminate 18 and the metal foil 13 are bonded with the adhesive layer. The adhesive strength of the adhesive layer is reduced by heating.

  A plating resist (not shown) is formed on the first surface of the metal foil 13. Then, the metal foil 13 is used as a seed layer, and the first conductor layer 12 is formed on the metal foil 13 exposed from the plating resist by an electrolytic copper plating method. Thereafter, the plating resist is removed. As shown in FIG. 4B, the first conductor layer 12 made of copper is formed on the metal foil 13.

  As shown in FIG. 4C, the resin film for the resin insulating layer 11 and the second metal foil 14 a are laminated on the first surface of the metal foil 13 and the first conductor layer 12. The resin film has a first surface and a second surface opposite to the first surface. The resin film is laminated so that the first surface of the resin film faces the first surface of the metal foil 13. Second metal foil 14a is laminated on the second surface of the resin film. Thereafter, a heating press is performed. The resin film is cured, and the resin insulating layer 11 is formed from the resin film. The first conductor layer 12 is buried on the first surface side of the resin film. Thereby, the concave portion 11 c for the first conductor layer 12 is formed on the first surface 11 a side of the resin insulating layer 11. The resin insulating layer 11 has a recess 11c for the first conductor layer 12 on the first surface 11a side. The first conductor layer 12 is formed in the recess 11c. The second metal foil 14 a adheres to the second surface 11 b of the resin insulating layer 11.

  The first conductor layer 12 has a plurality of pads 12a and wirings 12b for mounting electronic components. The resin insulating layer 11 is formed of inorganic particles such as silica and a resin such as epoxy. The resin insulating layer 11 may further include a reinforcing material such as a glass cloth. The resin insulating layer in FIG. 4C is formed of inorganic particles, a reinforcing material, and a resin.

  As shown in FIG. 4D, the second metal foil 14a is irradiated with laser light. An opening 11d that penetrates through the second metal foil 14a and the resin insulating layer 11 and reaches the first conductor layer is formed. A seed layer 14b is formed on the inner wall of the opening 11d and the second metal foil 14a by electroless plating or the like.

  As shown in FIG. 4E, the second conductor layer 14 having a predetermined conductor pattern is formed on the second surface 11b. A plating resist (not shown) having openings in a pattern corresponding to the conductor pattern of the second conductor layer 14 is formed on the seed layer 14b. By electrolytic plating, an electrolytic plating film 14c is formed on the surface of the seed layer 14b in the opening. The plating resist is removed. The portions of the second metal foil 14a and the seed layer 14b that are not covered with the electrolytic plating film 14c are removed by etching or the like. A second conductor layer 14 comprising the second metal foil 14a, the seed layer 14b on the second metal foil 14a, and the electrolytic plating film 14c on the seed layer 14b is formed. A via conductor 15 connecting the first conductor layer 12 and the second conductor layer 14 is formed in the opening 11d. The intermediate substrate 100 is completed on the support plate 18. Intermediate substrate 100 is formed of metal foil 13, first conductor layer 12, resin insulating layer 11, second conductor layer 14, and via conductor 15.

  As shown in FIG. 4F, the metal foil 13 and the support plate 18 are separated by heat. The intermediate substrate 100 is obtained. The first surface of the metal foil 13 of the intermediate substrate 100 is exposed.

  Next, as shown in FIG. 4G, a plating resist 19 having an opening 19 a is formed on the metal foil 13. The opening 19a exposes the metal foil 13 on the pad 12a. As shown in FIG. 4G, the diameter W4 of the opening 19a is smaller than the diameter W2 of the pad 12a. The diameter W4 and the diameter W1 of the conductive pillar 17 (see FIG. 2A) are substantially equal. The metal foil 13 on the outer periphery of the pad 12 a is covered with a plating resist 19. The metal foil 13 on the center portion of the pad 12 a is not covered with the plating resist 19. In FIG. 4G, the diameter W2 is 35 μm and the diameter W4 is 20 μm. The thickness of the plating resist 19 is about 20 μm. As shown in FIG. 4H, a metal film 17c is formed on the metal foil 13 exposed from the opening 19a. The metal foil 13 is used as a seed layer, and the metal film 17c is formed by electrolytic plating. In FIG. 4H, the metal film 17c is an electrolytic copper plating film formed by electrolytic copper plating. At this time, the protective film 190 is formed on the second surface 11b and the second conductor layer 14 of the resin insulating layer.

  The plating resist 19 is removed. The metal foil 13 is exposed by removing the plating resist 19. The metal film 17c is used as a mask, and the metal foil 13 is removed by etching or the like. As shown in FIG. 4I, the first surface 11a of the resin insulating layer 11 and the top surface T of the pad 12a are exposed. The top surface T of the first conductor layer 12 other than the pad 12a is exposed. When the metal foil 13 is removed by etching, the upper surface of the pad 12a exposed by removing the metal foil 13 is removed in order to prevent a short circuit between the adjacent pads 12a. The thickness of the upper surface of the pad to be removed is greater than 0 and 5 μm or less. In order to reduce the risk of a short circuit, the thickness to be removed is preferably 1 μm or more. The first conductor layer 12 including the pad 12a is formed. The top surface T of the first conductor layer 12 is recessed from the first surface 11a. An electrode 21 composed of the pad 12a and the conductive pillar 17 is completed. After removing the metal foil 13, the protective film 190 is removed.

  Solder resist layers 16 and 160 (see FIG. 1) are formed on both surfaces 11a and 11b of the resin insulating layer 11. The solder resist layer 16 is formed, for example, by a combination of application or lamination of a resin material constituting the solder resist layer 16 such as an epoxy resin or a polyimide resin, and pressing or partial removal of the resin material. Is called. For example, as shown in FIG. 4J, semi-cured resin layers 16b and 160b made of the material of the solder resist layers 16 and 160 are formed on the entire surfaces 11a and 11b of the resin insulating layer 11. The resin layers 16b and 160b can be formed by printing with an epoxy resin or the like, or by laminating resin films. The resin layer 16b can be formed so as to cover the upper surface 17T of the conductive pillar 17. Thereafter, the resin layer 16b is degassed by a vacuum press or mechanically pressed from above via a buffer material having appropriate elasticity. These pressings may be performed simultaneously with the formation of the resin layer 16b. A portion between the conductive pillars 17 formed thicker than a portion on the conductive pillar 17 in the resin layer 16b is contracted or compressed more than a portion on the conductive pillar 17 by a vacuum press or the like. . Thereby, the surface of the resin layer 16b between the conductive pillars 17 can be recessed. Along with this, the resin material on the conductive pillar 17 is attracted between the conductive pillars 17, whereby the upper surface 17 </ b> T of the conductive pillar 17 can be exposed.

  The portion of the resin layer 16b on the conductive pillar 17 may be removed from the state shown in FIG. 4J using a printing squeegee or the like. By using a squeegee having appropriate elasticity, the surface portion between the conductive pillars 17 of the resin layer 16b can be scraped off. Thereby, the surface between the conductive pillars 17 of the resin layer 16 b can be recessed from the upper surface 17 </ b> T of the conductive pillar 17. Further, from the state of FIG. 4J, the portion on the conductive pillar 17 of the resin layer 16b may be removed by jet blasting or wet blasting. By continuing the blast process even after the upper surface 17T of the conductive pillar 17 is exposed, the surface between the conductive pillars 17 of the resin layer 16b can be recessed from the upper surface 17T of the conductive pillar 17. Alternatively, as shown in FIG. 4K, first, the upper surface 17T of the conductive pillar 17 is exposed on the surface of the resin layer 16b by applying or laminating a resin material, or subsequent pressing or blasting. Thereafter, the surface between the conductive pillars 17 of the resin layer 16b may be recessed from the upper surface 17T of the conductive pillar 17 by a different processing method or squeezing than when the upper surface 17T is exposed. With the upper surface 17T of the conductive pillar 17 exposed, the resin layer 16b may be fully cured by ultraviolet irradiation or heating. For example, the solder resist layer 16 shown in FIG. 1 is formed by the above process.

  The resin layer 160b can be processed in the same manner as the resin layer 16b. However, since the second conductor layer 14 is thinner than the conductive pillar 17, it is not exposed on the resin layer 160b. The opening 160a can be formed by photolithography or laser light irradiation, and the lower solder resist layer 160 shown in FIG. 1 can be formed.

  Through the above steps, the printed wiring board 1 shown in FIG. 1 is completed. The thickness of the solder resist layer 16 in contact with the side surface of the conductive pillar 17 is substantially equal to the length h (see FIG. 2A) of the conductive pillar 17. The solder resist layer 16 covers the side surface of the conductive pillar 17 and the top surface T exposed from the conductive pillar 17 of the pad 12a. Further, the wiring 12 b of the first conductor layer 12 is also covered with the solder resist layer 16. The surface between the conductive pillars 17 of the solder resist layer 16 is recessed closer to the resin insulating layer 11 than the upper surface 17T of the conductive pillar 17.

  When the metal foil 13 is removed with an etching solution, the surface of the metal film 17c is also removed. When the upper surface of the pad 12a is removed with the etching solution, the surface of the metal film 17c and the side wall of the metal layer 17b are removed. When the etching rate of the metal layer 17b is faster than the etching rate of the metal film 17c, the conductive pillar 17 having the recess 17d is formed (see FIG. 3A). When the etching rate of the metal film 17c is higher than the etching rate of the metal layer 17b, the conductive pillar 17 having the convex portion 17e is formed (see FIG. 3B). By selecting the etching solution, the metal film 17c, and the material of the metal layer 17b, the shapes shown in FIGS. 3A and 3B can be obtained.

  A protective film can be formed on the surface of the electrode 21. The protective film is a film for preventing electrode oxidation. Examples of the protective film are OSP, Ni / Au, Ni / Pd / Au, and Sn. The protective film is not shown in the figure.

  By alternately laminating resin insulation layers and conductor layers on the resin insulation layer 11 and the second conductor layer 14, a multilayer printed wiring board having three or more conductor layers can be formed.

  The conductive pillar 17 having a predetermined height may be formed of a metal film 17c made of a plating film and a conductor layer 17a made of a plating film. An example is the conductive pillar 17 of FIG. In the example of FIG. 5, the process is simplified.

  In the example of FIG. 5, the pad 12a and the conductive pillar 17 are formed continuously. For example, they are formed of the same plating film. An electrolytic copper plating film is preferred. Therefore, the conductive pillar 17 of FIG. 5 does not have an interface with the pad 12a. Since the pad 12a and the conductive pillar 17 are integrally formed, even if the conductive pillar 17 is stressed, the electrode 21 starts from the corner C where the side wall of the conductive pillar 17 and the top surface T of the pad 12a intersect. It is difficult for cracks to occur. Even if stress concentrates on the corner C, the electrode 21 is unlikely to deteriorate.

  A method for manufacturing the conductive pillar 17 shown in FIG. 5 will be described below. In the electrode 21 of FIG. 5, the pad 12a and the conductive pillar 17 are formed at the same time, and they are integrated. A 200 μm nickel foil is prepared. Non-through holes are formed in the nickel foil. The shape of the non-through hole is a cylinder having a diameter of 20 μm and a depth of 20 μm. A plating resist is formed on the nickel foil. The plating resist has a non-through hole and an opening exposing the nickel foil around the non-through hole. An electrolytic copper plating film is formed in the opening of the non-through hole and the plating resist. The plating resist is removed. A first conductor layer including pads 12a is formed on the nickel foil. Conductive pillars 17 are formed in the non-through holes of the nickel foil. A resin insulating layer 11 is formed on the nickel foil exposed from the first conductor layer and the first conductor layer. The first surface 11a of the resin insulating layer 11 faces the nickel foil. A second conductor layer (not shown) is formed on the second surface 11b of the resin insulating layer 11 by a semi-additive method. A via conductor (not shown) that penetrates the resin insulating layer 11 and connects the first conductor layer and the second conductor layer is formed. The nickel foil is selectively removed by etching. The upper surface of the first conductor layer exposed from the conductive pillar 17 is removed by etching. The top surface T of the pad 12a is recessed from the first surface 11a. Through the above steps, the conductive pillar 17 shown in FIG. 5 is formed.

  An example of another shape of the conductive pillar 17 of FIG. 5 is shown in FIG. 6A. In FIG. 6A, the conductive pillar 17 gradually becomes thicker from the upper surface 17T of the conductive pillar 17 toward the pad 12a. Therefore, the conductive pillar 17 is unlikely to deteriorate. The resistance of the conductive pillar 17 does not increase in the heat cycle. The shape shown in FIG. 6A is obtained, for example, by immersing a printed wiring board having the conductive pillar 17 shown in FIG. 5 from the upper surface 17T of the conductive pillar 17 in an etching solution. The etching solution has a flow toward the side wall of the conductive pillar 17. The etching amount on the side surface of the conductive pillar 17 increases from the pad 12a side toward the upper surface 17T side. Therefore, the side wall of the conductive pillar 17 has a shape that is tapered so as to become thinner from the pad 12a toward the upper surface 17T of the conductive pillar 17.

  An example of yet another shape of the conductive pillar 17 of FIG. 5 is shown in FIG. 6B. In FIG. 6B, the conductive pillar 17 is gradually narrowed from the upper surface 17T of the conductive pillar 17 toward the pad 12a. Therefore, the conductive pillar 17 is easily deformed. The stress is relieved by the conductive pillar 17. The connection resistance between the printed wiring board and the electronic component does not increase during the heat cycle. The shape shown in FIG. 6B is obtained, for example, by immersing a printed wiring board having the conductive pillars 17 shown in FIG. 5 from the second surface 11b of the resin insulating layer 11 into the etching solution. Finally, the upper surface 17T of the conductive pillar 17 enters the etching solution. The etching solution has a flow toward the side wall of the conductive pillar 17. The etching amount of the side surface of the conductive pillar 17 increases from the upper surface 17T side toward the pad 12a side. Therefore, the side wall of the conductive pillar 17 has a shape that is tapered from the upper surface 17T of the conductive pillar 17 toward the pad 12a.

DESCRIPTION OF SYMBOLS 1 Printed wiring board 11 Resin insulating layer 11a 1st surface 11b 2nd surface 11c Recessed part 11d Opening 12 1st conductor layer 12a Pad 12b Wiring 13 Metal foil 14 Second conductor layer 14a Second metal foil 14b Seed layer 14c Electroplating film 15 Via conductor 16 Solder resist layer 160 Lower solder resist layer 16a Solder resist layer opening 160a Lower solder resist layer opening 17 Conductive pillar 17T Upper surface of conductive pillar 18 Support plate 19 Plating resist

Claims (8)

A resin insulation layer having a first surface and a second surface opposite to the first surface, and having a plurality of recesses formed on the first surface side;
A first conductor layer formed in the recess and including a pad;
A conductive pillar for mounting an electronic component formed on the pad and protruding from the first surface of the resin insulation layer;
A solder resist layer formed on the first surface of the resin insulating layer and covering one surface of the first conductor layer exposed on the first surface, and a printed wiring board comprising:
The solder resist layer covers the side surface of the conductive pillar,
An end surface of the conductive pillar opposite to the pad side is exposed from the solder resist layer. 2. The printed wiring board according to claim 1, wherein the side surface of the conductive pillar is covered with the solder resist layer to substantially the same height as the end surface. 2. The printed wiring board according to claim 1, wherein a plurality of the conductive pillars are formed, and a surface of the solder resist layer opposite to the resin insulating layer is recessed between the adjacent conductive pillars. It is out. 2. The printed wiring board according to claim 1, wherein the conductive pillar is formed of a metal layer formed on the pad and a metal film formed on the metal layer. 5. The printed wiring board according to claim 4, wherein the metal layer is formed of a copper foil, and the metal film is formed of a plating film. 5. The printed wiring board according to claim 4, wherein the metal layer has a first surface facing the metal film and a second surface opposite to the first surface of the metal layer, The second surface of the metal layer is located on the same plane as the first surface of the resin insulating layer. 2. The printed wiring board according to claim 1, wherein the pad is formed by a central portion under the conductive pillar and an outer peripheral portion exposed from the conductive pillar, and the thickness of the outer peripheral portion forming the pad is The thickness increases from the side wall of the pad toward the center of the pad. The printed wiring board according to claim 1, wherein the pad has a back surface facing the bottom surface of the recess and a top surface opposite to the back surface, and is exposed from the conductive pillar. The top surface of the pad is inclined with respect to the first surface of the resin insulating layer.

Images